Enhanced Frequency-Adaptive Phase-Locked Loop for
Distributed Power Generation System Applications
S. Eren, M. Karimi-Ghartemani, and A. Bakhshai
Queen’s University
Department of Electrical and Computer Engineering
Kingston, Ontario, Canada
Email: 2se1@queensu.ca, karimig@sharif.edu>, alireza.bakhshai@queensu.ca
Keywords
Distributed power generation system, distributed energy resources, grid synchronization,
phase-locked loop, power system signal processing.
Abstract
The standards governing the grid connection of distributed power generation systems
(DPGS) are becoming increasingly demanding due to the growing number of alternative
energies being connected to the grid. Grid connection standards now place greater
emphasis on the fault ride-through capabilities of the DPGS. In order to fulfill these
standards, improvements must be made to the grid-side control scheme, part of which
includes the grid synchronization technique. This has led to a need for a robust grid
synchronization technique, which is able to synchronize the phase angle of the injected
current output of the DPGS with that of the grid voltage vector, despite the presence of
grid frequency variations, grid voltage unbalance, and harmonic distortions. An
enhanced three-phase phase-locked loop is presented in this paper which can be used
for this purpose. It consists of a multi-block adaptive notch filter (ANF) integrated into a
conventional three-phase synchronous reference frame phase-locked loop (SRF-PLL).
The addition of the ANF to the phase-locked loop allows it to remove the double
frequency ripple which occurs in the conventional three-phase SRF-PLL as a result of
grid voltage unbalance. The structure of the multi-block ANF is composed of multiple
ANF units placed in parallel. Due to the parallel configuration of the ANF units, this
enhanced phase-locked loop is also able to simultaneously remove multiple signal
distortions, such as harmonics, without affecting the speed of the response. Finally, due
to the frequency-adaptive nature of the ANF, it is able to track changes in the grid
frequency. Thus, variations in the grid frequency do not significantly impede the
performance of the phase-locked loop. Simulations have been included to test the
performance of this enhanced phase-locked loop.
Introduction
Modern power systems include a growing number of distributed power generation
systems (DPGS), which are small-scale generation units connected closer to the load on
the grid. These DPGS units include a range of alternative energies, such as wind
turbines, photovoltaic cells, fuel cells, and micro turbines. The presence of an increasing
number of these DPGS units in the grid has caused the grid connection standards to
become more stringent in order to prevent grid instability from occurring [1]. The grid
connection standards now place more emphasis on the fault ride-through capability of
the DPGS. Thus, if there are small grid disturbances, the DPGS should be able to
continue operating without disconnecting from the grid. To fulfill this standard,
improvements must be made to the grid-side control scheme.
Grid synchronization is an important part of the grid-side control scheme. The grid
synchronization algorithm is responsible for detecting the phase angle of the grid voltage
vector. The detected phase angle can then be used to synchronize the control variables
of the system. In order to have a robust grid synchronization technique, a fast and
accurate detection of the phase angle is necessary. Ideally, the grid synchronization
technique should be able to detect the phase angle despite the presence of distortions,
voltage unbalance, and frequency variations in the phase-locked loop input signal.
Grid synchronization can be implemented with a variety of different techniques. The
zero-crossing method [2] is the most primitive technique available. This technique
detects the zero-crossing points of the grid voltage and it is then able to determine its
phase angle. However, since the zero-crossing points can only be detected at each half
cycle, the performance of the zero-crossing technique is considerably slow and
vulnerable to distortions in the grid voltage. The filtering method, in which the phase
angle of the grid voltage vector is obtained by filtering the grid voltages in the dq or αβ
reference frames, is another possible technique [3]. Finally, there is the three-phase
phase-locked loop (PLL), which is also the most commonly used technique at present.
The PLL is a closed-loop control system that drives the error signal to zero when the
phase angle it generates is equal to the phase angle of the input signal. Under ideal
operating conditions, the conventional three-phase synchronous reference frame phaselocked loop (SRF-PLL) performs satisfactorily [4]. However, when unbalance, harmonics
errors, and frequency variations are present in the PLL input signal the SRF-PLL
becomes inadequate [5]. For example, unbalance in the input signal causes a double
frequency ripple to propagate through the SRF-PLL.
Modifications to the grid-side control scheme have been proposed in the literature in
order to allow the PLL to operate under distorted grid conditions. In one case, notch
filters are added to the grid-side control system, which are able to remove the double
frequency ripple caused by voltage unbalance [6]. This modification yields good results,
but since these notch filters are not frequency adaptive, this system would not be able to
handle frequency variations in the input signal. In another case, a decoupled double
synchronous reference frame phase-locked loop is proposed, which can detect the
positive-sequence component of an unbalanced voltage vector [7], thus eliminating the
double frequency ripple caused by unbalance. The performance of the decoupled
double SRF-PLL is very good, but there is some room for improvement when the input
signal is distorted with harmonics.
The enhanced SRF-PLL proposed in this paper is able to remove the double frequency
ripple caused by an input voltage unbalance. It is also able to remove multiple harmonic
distortions, which are present in many power electronics systems. Finally, this enhanced
SRF-PLL is frequency-adaptive, and as such can continue to remove distortions even in
the presence of input frequency variations. This enhanced SRF-PLL is achieved by
integrating the multi-block adaptive notch filter (ANF) proposed in [8], [9], into a
conventional SRF-PLL. This enhanced SRF-PLL is a beneficial replacement to the
conventional SRF-PLL, and can be used as a grid synchronization technique for a
DPGS in both grid-connected and autonomous applications.
Enhanced PLL Structure
To discuss the structure of the enhanced SRF-PLL, a basic understanding of the
conventional SRF-PLL and the ANF is needed. The conventional SRF-PLL, seen in
Fig. 1, converts a three-phase input signal from its natural abc frame to the stationary αβ
frame and then to the synchronous dq frame using the linear transformations given in
equation set (1).
,
(1)
The q component of the dq signal, representative of the error signal e(t), is then
regulated to zero through the use of a PI controller (also known as a loop filter). When
the SRF-PLL generates a phase angle that is equal to the phase angle of the input
signal, e(t) becomes zero. The PI controller also functions as a filter, so it is able to
remove distortions in the input signal to a degree. However, when designing the loop
filter there is tradeoff between the speed of its response and the quality of its filtering.
Thus, if its control parameters are set such that it provides very sharp filtering, the speed
of the SRF-PLL in detecting the phase angle will suffer. Conversely, if the control
parameters are set such that the loop filter produces negligible delay, there will be a
sacrifice in the quality of its filtering and there will be more distortions present in the
system.
The approximated transfer function of the closed-loop system is given in equation (2).
(2)
where,
(3)
The SRF-PLL tracks the phase angle of the input signal quickly and accurately provided
that the input signal is balanced, has a constant frequency, and does not contain any
distortion. However, if the three-phase input signal becomes unbalanced, a double
frequency ripple is generated and distorts the phase angle output of the SRF-PLL.
Frequency variations and harmonics distortions in the input signal also lead to
distortions in the phase angle output of the SRF-PLL.
Figure 1: Three-phase synchronous reference frame phase-locked loop
The enhanced SRF-PLL contains a multi-block ANF that removes the distortions that the
conventional SRF-PLL is unable to remove. The structure of a single-block ANF consists
of a conventional notch filter with an added frequency estimation loop [9]. The frequency
estimation loop allows the ANF to track changes in the notch frequency. This allows the
ANF to continue filtering despite varying notch frequencies. The structure of a multiblock ANF, consisting of multiple ANF units connected in parallel, can be seen in Figure
2. In Figure 2, y(t) represents the input signal,
represents the output signal, and θ
represents the estimated frequency. The parallel configuration of the ANF units in the
multi-block ANF allows it to decompose a signal into its harmonics [8]. This configuration
is also advantageous because no matter how many ANF units are connected in parallel,
it will not affect the speed of the filtering as they will operate simultaneously. Equation
set (5) characterizes the dynamic behaviour of the multi-block ANF.
(5)
Where the value of i corresponds to the number of units, and where
following,
is defined as the
(6)
When the ith filter of Fig. 3(b) is in steady state, the output is given by,
(7)
Figure 2: (a) Multiple-block ANF structure, (b) Structure of the ANF building block
The enhanced SRF-PLL, seen in Fig. 3, has an ANF filter placed before the PI controller
which can remove multiple distortions, such as double frequency ripple and harmonics.
If the only distortion present in the system is a double frequency ripple, then only a
single-block ANF is required. If there are multiple distortions present in the system, then
a multi-block ANF is required. In this case each ANF unit removes at most only one
sinusoidal signal component. Also, since the ANF can continue to filter accurately during
input frequency variations, the proposed structure is able to continue removing double
frequency ripple and harmonics even if there are frequency variations present in the
input signal. In terms of applications, the ability of the enhanced SRF-PLL to be frequency-adaptive
is an especially important feature for a DPGS operating autonomously. This is because
frequency variations are negligible when a DPGS is connected to the utility grid, but are
amplified when the DPGS operates in islanding mode. Another important feature of the
enhanced SRF-PLL is its ability to remove harmonic distortions. The IEEE standards
require that the total harmonic distortion (THD) in a utility grid with a DPGS connected
must be less than 2.5 percent [1]. However, since the power electronic converters
present in a DPGS can be a source of harmonic distortions, this can be challenging. The
enhanced SRF-PLL is advantageous because the multi-block ANF configuration can be
used to remove multiple harmonics, where one or more ANF units can be assigned the
task of removing a particular harmonic. Finally, since the ANF units in a multi-block ANF
are placed in parallel with each other, no matter how many units are present the filter
delay will not increase.
Figure 3: Enhanced SRF-PLL
Simulation Results
The performance of the enhanced SRF-PLL was evaluated using Matlab/Simulink. To
evaluate the performance of the enhanced PLL structure, a conventional SRF-PLL is
first simulated for comparison. As can be seen in Fig. 4, when the input signal becomes
unbalanced at t=0.1s (a thirty percent negative sequence is injected into the input), the
conventional SRF-PLL generates a double frequency ripple in both the output frequency
and the output phase error.
Next, a conventional SRF-PLL equipped with a notch filter (instead of an ANF), seen in
Fig. 5, is simulated for comparison. It can be seen that there is no double frequency
ripple in the phase error and frequency output, despite an input signal unbalance
occurring at t=0.1s. This system is able to recover from the unbalance within 0.1s.
However, when the same system is subjected to an input frequency jump from 60Hz to
65Hz at t=0.05s, as seen in Fig. 6, it is no longer able remove the double frequency
ripple resulting from the input signal unbalance, occurring at t=0.2s, completely.
Finally, the enhanced SRF-PLL with a single-block ANF is simulated in a scenario where
there is both an input frequency variation and an input voltage unbalance (Fig. 7). The
parameters of the one-block ANF are set to ζ = 0.5, i = 1, and γ = 1 × 106. The
simulation results show that the double frequency ripple resulting from the input signal
unbalance is completely removed despite the input frequency jump. Thus, the enhanced
SRF-PLL is an improvement over both the conventional SRF-PLL and the conventional
SRF-PLL with an added notch filter.
Simulations are also performed to test whether the enhanced SRF-PLL can remove
multiple harmonics. In the first simulation, seen in Fig. 8, the enhanced SRF-PLL with a
single-block ANF is unable to remove both the double frequency ripple and multiple
harmonics (30 percent of the third harmonic and 20 percent of the fifth harmonic).
However, a second simulation is performed using a six-block ANF (Fig. 9), which is able
to completely remove both the double frequency ripple and the multiple harmonics. The
parameters of the six-block ANF are set to ζ = 0.5, i = 1, 2… 6, and γ = 1 × 106. This
demonstrates that when a multi-block ANF has a larger number of ANF units it can
remove a larger number of signal components.
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Figure 8: Conventional three-phase SRF-PLL with a single-block ANF. There is a
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Figure 9: Conventional three-phase SRF-PLL with a six-block ANF. There is a frequency
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harmonics are input into the system at t = 0.2s.
Conclusion
An enhanced SRF-PLL is proposed that is able to remove both a double frequency
ripple (caused by an unbalance in the three-phase input signal) and harmonic distortions
quickly and accurately, despite frequency variations in the input signal. The enhanced
SRF-PLL contains a multi-block ANF, unlike the conventional SRF-PLL. Simulations are
included which demonstrate that the enhanced SRF-PLL performs as expected.
Simulations are also included which compare the enhanced SRF-PLL with a
conventional SRF-PLL as well as with a conventional SRF-PLL equipped with a notch
filter. Results show that the enhanced SRF-PLL has the best performance amongst the
three cases. The enhanced SRF-PLL is a robust grid synchronization technique that can
be used in many DPGS applications.
References
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