International Journal of Emerging Trends in Engineering and Development
Available online on http://www.rspublication.com/ijeted/ijeted_index.htm
Issue 3, Vol.6 (November 2013)
ISSN 2249-6149
Comparative Study on Various Unipolar PWM Strategies for
Trinary DC source Multilevel Inverter
V.Arun#1, B.Shanthi#2, S.P.Natarajan#3
#1 Department of EEE, Arunai Engineering College, Thiruvannamalai, India
#2 Centralised Instrumentation and Service Laboratory, Annamalai University, Chidambaram
#3 Department of EIE, Annamalai University, Chidambaram, Tamilnadu, India
ABSTRACT
This paper proposes a trinary DC source 9-level inverter. Trinary DC source
multilevel inverter is triggered by the Unipolar PWM strategy having sinusoidal and
trapezoidal reference with triangular carriers. These Unipolar Pulse Width Modulating
(UPWM) techniques include Phase Disposition (PD), Alternate Phase Opposition Disposition
(APOD), Carrier Overlapping (CO). Performance factors like Total Harmonic Distortion
(THD), VRMS (fundamental), crest factor, distortion factor and form factor are evaluated for
various modulation indices. Simulations were performed using MATLAB-SIMULINK. It is
observed that UPDPWM strategy with sine reference provides output with relatively low
distortion and UCOPWM strategy with trapezoidal reference provides relatively higher
fundamental RMS output voltage.
Key words: APOD, CO, PD, UPWM.
Corresponding Author: V.Arun
INTRODUCTION
The need for high power apparatus in industry has increased in recent years. Multilevel inverters
have developed as easy alternatives for such power requirements. Multilevel inverters consist of
a group of semiconductor switches and a set of voltage source components like capacitors or
independent sources. The basic concept of these inverters depends on using this series of
switches and sources to synthesize a stepped or staircase output voltage waveform. Multilevel
inverters play a significant role in enhancing the quality of high power distribution networks,
power conditioning systems, variable speed drive systems etc because of the availability of
higher number of voltage levels at the output. Aghdam et al [1] proposed multicarrier PWM
methods for asymmetric multilevel inverter. Bensraj and Natarajan [2] developed multicarrier
trapezoidal PWM strategies for a single phase five level cascaded inverter. Bahr Eldin et al [3]
proposed new multicarrier based pwm for multilevel converter. Jing Zhao et al [4] developed a
novel pwm control method for hybrid-clamped multilevel inverters. Liu and Luo [5, 6]
developed Trinary hybrid multilevel inverter for motor drive with zero common mode voltage
and used in STATCOM with unbalanced voltages. Mauricio Rotella et al [7] introduced pwm
method to eliminate power sources in a non redundant 27-level inverter for machine drive
applications. Reza et al [8] proposed harmonics elimination in a multilevel inverter with unequal
dc sources using a genetic algorithm. Ramani and Krishnan [9] developed new hybrid 27 level
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Issue 3, Vol.6 (November 2013)
ISSN 2249-6149
multilevel inverter fed induction motor drive. Sujanarko in [10] developed advanced carrier
based pulse width modulation in asymmetric cascaded multilevel inverter. Sakthivel and Yousuf
[11]introduced cascaded multilevel inverter based harmonic reduction in STATCOM. Salam et
al [12] developed digital implementation of a new pwm switching scheme for modular structured
multilevel voltage source inverter. Urmila and Subbarayudu [13] undertook a comparative study
of pulse width modulation techniques for multilevel inverters. This paper presents a single phase
DC source 9-level inverter topology for investigation using unipolar sine and trapezoidal
reference PWM switching strategies. Simulations were performed using MATLAB-SIMULINK.
Harmonic analysis and evaluation of different performance measures for various modulation
indices have been carried out and presented.
II. BASIC OPERATION OF TRINARY MULTILEVEL INVERTER
Figure 1 shows a circuit configuration of a cascaded H-bridge multilevel inverter
employing trinary DC input source. It looks like a traditional cascaded H-bridge multilevel
inverter except input dc sources. By using VDC and 3VDC, it can synthesize nine output levels
-4VDC, -3VDC, -2VDC, -VDC, 0, VDC, 2VDC, 3VDC, 4VDC. The lower inverter (HB2) generates a
fundamental output voltage with three levels, and then the upper inverter (HB1) adds or subtracts
one level from the fundamental wave to synthesize stepped waves. Here, the final output voltage
levels becomes the sum of each terminal voltage of H-bridge, and it is given as
Vab  VHB1  VHB2
(1)
HB1
S1
S3
VDC
a
S2
S4
Vab
HB2
S5
S7
3VDC
b
S6
S8
Fig 1: Trinary DC source cascaded MLI
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Issue 3, Vol.6 (November 2013)
ISSN 2249-6149
In trinary DC source MLI, output voltage level is nine, if n number of H-bridge module has
independent DC sources in sequence of the power of 3, an expected output voltage level is given
as
Vn  3n , n  1, 2,3....
(2)
III. UNIPOLAR PULSE WIDTH MODULATION STRATEGY
The scheme uses a unipolar sine and trapezoidal as modulating signal and inverted sine as
carriers. In Inverted sine carrier PWM scheme, high frequency triangular carriers are compared
with unipolar sine and trapezoidal reference. The intersection between the unipolar reference
signal and the carrier signals defines the switching instant of the PWM pulse. The multiple
carriers used are positioned above zero level and the number of carriers is dependent on the
output voltage levels. For an m-level inverter, (m-1)/2 carriers with the same frequency fc and the
same amplitude Ac are disposed. The reference waveform has peak-to-peak amplitude Am and
frequency fm. The reference is continuously compared with each of the carrier signals. If the
reference is greater than a carrier signal, then the active device corresponding to that carrier is
switched on; and if the reference is less than a carrier signal, then the active device
corresponding to that carrier is switched off. There are many alternative strategies are possible,
some of them are tried in this paper and they are:
a.
Unipolar Phase disposition PWM strategy (UPDPWM).
b.
Unipolar Alternate phase opposition disposition PWM strategy (UAPODPWM).
c.
Unipolar Carrier overlapping PWM strategy (UCOPWM).
The formulae to find the Amplitude of modulation indices are as follows:
For UPDPWM, UAPODPWM:
ma  2 A m /(m 1) Ac )
For UCOPWM:
ma  Am / (2.5* Ac )
(3)
(4)
The frequency ratio mf are as follows:
m f  fc / f m
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(5)
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Issue 3, Vol.6 (November 2013)
ISSN 2249-6149
A) Unipolar Phase Disposition PWM
The triangular carriers of same amplitude and frequency are disposed such that bands they
occupy are contiguous. The carrier arrangement for trinary DC source multilevel inverter having
Sine reference and Trapezoidal are illustrated in figures 2 & 3 respectively
Fig 2. Carrier arrangement for UPDPWM strategy with sine reference (ma=0.9 and mf=40)
Fig 3. Carrier arrangement for UPDPWM strategy with Trapezoidal reference
(ma=0.9 and mf=40)
B) Unipolar Alternative Phase Opposition Disposition PWM
Carriers for trinary DC source multilevel inverter having Sine reference and Trapezoidal are
illustrated in figures 4 & 5 respectively. The triangular carriers of same amplitude are phase
displaced from each other by 180 degrees alternately.
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Fig 4. Carrier arrangement for UAPODPWM strategy with sine reference
(ma=0.9 and mf=40)
Fig 5. Carrier arrangement for UPDPWM strategy with Trapezoidal reference
(ma=0.9 and mf=40)
C) Unipolar Carrier Overlapping PWM (UCOPWM)
Carriers for trinary DC source multilevel inverter having Sine reference and Trapezoidal are
illustrated in figures 6 & 7 respectively. In carrier overlapping technique, (m-1)/2 carriers are
disposed such that the bands they occupy overlap each other; the overlapping vertical distance
between each carrier is Ac/2.
Fig. 6. Carrier arrangement for UCOPWM strategy with sine reference
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International Journal of Emerging Trends in Engineering and Development
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Issue 3, Vol.6 (November 2013)
ISSN 2249-6149
(ma=0.9 and mf=40)
Fig. 7. Carrier arrangement for UCOPWM strategy with Trapezoidal reference
(ma=0.9 and mf=40)
IV. SIMULATION RESULTS
The single phase trinary DC source nine level inverter is modeled in SIMULINK using power
system block set. Switching signals for trinary multilevel inverter using UPWM strategies are
simulated. Simulations were performed for different values of ma ranging from 0.8 to 1 and the
corresponding %THD are measured using the FFT block and their values are shown in Table 1.
Next table displays the Vrms of fundamental of inverter output for same modulation indices.
Table 3 and 4 display respectively the corresponding crest factor and form factor. Table 5 shows
% Distortion Factor of the output voltage. Figures 8 to19 show the simulated output voltage of
Trinary MLI and their corresponding harmonic spectrum with above strategies but for only one
sample of ma. Figure 8 & 9 displays the nine level output voltage generated by UPDPWM
strategy with sine reference and Trapezoidal reference and its FFT plot is shown in Figure 10 &
11. Figure 12 & 13 shows the nine level output voltage generated by UAPODPWM strategy with
sine reference and Trapezoidal reference and its FFT plot is shown in Figure 14 & 15. Figure 16
& 17 shows the nine level output voltage generated by UCOPWM strategy with sine reference
and Trapezoidal reference and its FFT plot is shown in Figure 18 & 19.
The following parameter values are used for simulation: VDC =75V, R (load) = 100 ohms,
fc=2000 Hz and fm=50Hz.
Fig. 8. Output voltage generated by UPDPWM strategy with sine reference
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Fig 9. Output voltage generated by UPDPWM strategy with Trapezoidal reference
Fig 10. FFT plot for output voltage of UPDPWM strategy with sine reference
Fig. 11. FFT plot for output voltage of UPDPWM strategy with Trapezoidal reference
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Fig. 12 Output voltage generated by UAPODPWM strategy sine reference
Fig. 13 Output voltage generated by UAPODPWM strategy Trapezoidal reference
Fig. 14. FFT plot for output voltage of UAPODPWM strategy with sine reference
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Fig. 15. FFT plot for output voltage of UAPODPWM strategy with Trapezoidal reference
Fig. 16. Output voltage generated by UCOPWM strategy with sine reference
Fig. 17. Output voltage generated by UCOPWM strategy with Trapezoidal reference
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Fig. 18. FFT plot for output voltage of UCOPWM strategy with sine reference
Fig. 19. FFT plot for output voltage of UCOPWM strategy with Trapezoidal reference
Table1. % THD for Different Modulation Indices
ma
UPDPWM
UAPODPWM
UCOPWM
Sine Ref.
Trapezoidal
Ref
Sine Ref.
Trapezoidal
Ref
Sine Ref.
Trapezoidal
Ref
1
13.44
11.75
13.33
12.11
18.18
16.68
0.95
15.66
15.03
15.64
15.24
19.97
19.37
0.9
16.76
17.01
16.75
16.76
22.03
21.12
0.85
16.94
17.72
16.93
17.75
23.76
22.85
0.8
16.97
17.17
17.28
17.52
26.16
24.15
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Table 2. VRMS for Different Modulation Indices
ma
UPDPWM
UAPODPWM
UCOPWM
Sine Ref.
Trapezoidal
Ref.
Sine Ref.
Trapezoidal
Ref.
Sine Ref.
Trapezoidal
Ref.
1
212.6
223.2
211.8
223.2
217.4
225.7
0.95
201.6
212.6
201.7
212
209.2
217
0.9
190.6
201.4
190.9
201
199.9
208.2
0.85
179.6
189
180.3
190.2
190.2
199
0.8
169.6
178.2
169.3
178.7
178.7
189.6
Table 3. Crest Factor for Different Modulation Indices
ma
UPDPWM
Sine Ref.
Trapezoidal
Ref.
1
1.413923
1.413978
0.95
1.414187
0.9
0.85
0.8
UAPODPWM
UCOPWM
Trapezoidal
Ref.
Sine Ref.
Trapezoidal
Ref.
1.414542
1.414426
1.414443
1.414266
1.413922
1.413981
1.414150
1.413958
1.413824
1.414481
1.414101
1.414353
1.414427
1.413707
1.414024
1414254
1.414285
1.414309
1.413774
1.413775
1.414070
1.412915
1.414141
1.414649
1.414166
1.414102
1.414029
Sine Ref.
Table 4. Form Factor for Different Modulation Indices
ma
UPDPWM
UAPODPWM
Sine Ref.
Trapezoidal
Ref.
1
8.84E+04
7.20E+04
8.58E+04
3.27E+05
1.48E+05
2.71E+04
0.95
1.37E+05
7.84E+04
7.59E+04
2.16E+05
1.29E+05
7.02E+04
0.9
4.87E+04
3.54E+04
6.04E+04
5.19E+04
4.48E+04
6.58E+04
0.85
4.75E+04
3.10E+04
5.48E+04
4.66E+04
4.55E+04
9.69E+04
0.8
7.30E+04
7.16E+04
8.18E+04
1.11E+05
4.18E+04
8.18E+04
Sine Ref.
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Trapezoidal
Ref.
UCOPWM
Sine Ref.
Trapezoidal
Ref.
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Table 5. % Distortion Factor for Different Modulation Indices
ma
UPDPWM
Sine Ref.
Trapezoidal
Ref.
UAPODPWM
Sine Ref.
Trapezoidal
Ref.
UCOPWM
Sine Ref.
Trapezoidal
Ref.
1
0.0261
0.155
0.0215
0.1604
0. 1717
0.2977
0.95
0.0585
0.1706
0.0143
0.1606
0. 2452
0.3264
0.9
0.0156
0.1774
0.0168
0.1667
0. 3758
0.3963
0.85
0.0568
0.1806
0.0163
0.1693
0. 528
0.5400
0.8
0.0379
0.1832
0.0103
0.1707
0. 6314
0.6737
It is observed (from Table 1) that the harmonic content of the output voltages is least with
UPDPWM strategy having Trapezoidal reference for modulation indices 0.95 & 1 where as the
harmonic content is found to be minimum in UPDPWM strategy having sine reference for ma=
0.8,0.85 & 0.9.From Table 2, it is found that the carrier overlapping strategies having
Trapezoidal reference provide high DC bus utilization. CF is relatively equal for all the strategies
(Table 3).From Table 4, it is found that the FF is higher in UAPODPWM strategy having
Trapezoidal reference. The %DF is relatively les with UAPODPWM strategy having sine
reference. it is observed from the Figures. (10, 11, 14, 15, 18, and 19) the harmonic energy is
dominant in: a) 39th order in UPDPWM with sine reference and 5th and 39th of trapezoidal
reference. b) 29th, 31st, 35th, 37th and 39th in UAPODPWM with sine reference and 5th, 29st, 31st,
37th and 39th of trapezoidal reference. c) 5th, 37th and 39th order in UCOPWM with both the
reference.
V.CONCLUSION
In this paper, UPWM techniques for Trinary DC source nine level inverter have been
presented. Trinary DC source multilevel inverter gives higher output voltage with low
harmonics. Performance factors like %THD, VRMS, CF, FF and %DF have been evaluated
presented and analyzed. It is found that the UPDPWM strategy with sine reference provides
relatively lower %THD, UCOPWM strategy with trapezoidal reference is found to perform
better since it provides relatively higher fundamental RMS output voltage. CF is almost same for
all the strategies. Depending on the performance measure required in a particular application of
chosen MLI based on the output quality appropriate PWM have to be employed.
REFERENCE
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[2] R. Bensraj and S.P. Natarajan, “Multicarrier Trapezoidal PWM Strategies for a Single
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