2003 11 07 v1.0 uFCBGA/uFCPGA NorthWood MT

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COMPAL CONFIDENTIAL
1
MODEL NAME : Sapporo XA
1
COMPAL P/N : DFL10
PCB NO : LA-2051
Revision : 1.0
2
2
Sapporo XA Schematics Document
uFCBGA/uFCPGA NorthWood MT
2003 11 07 v1.0
3
3
4
4
Compal Electronics, Inc.
Title
Cover Sheet
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
D
Size
Document Number
R ev
1.0
LA-2051
Date:
Friday, November 14, 2003
Sheet
E
1
of
51
A
B
C
D
E
http://laptopblue.vn
Compal confidential
Model : DFL10
Block Diagram
LA-2051
NorthWood-MT -- 533
Prescott-MT -- 533
Celeron-MT -- 400
Fan Control 1
1
+12VALW
+5VALW
page 37
CPU Bypass
+12VALW
+5VALW
+1.2VP
page 37
page 4,5,6
HA#(3..31)
Clock Generator
A DM1032AR
uFCPGA CPU 478pin
+CPU_CORE
page 6
Fan Control 2
1
Thermal Sensor
+5VS
ICS951402AGT
+3VS
page 6
page 16
HD#(0..63)
System Bus
400/533 MHz
Memory
BUS(DDR)
TV OUT Connector
+3VS
page 17
ATI RC300ML
+1.5VS
+5VS
+3VS
+2.5V
CRT Signal
CRT Connector
BANK 0, 1, 2, 3
+2.5V
+1.25VS
718 pin u-BGA
+3VS
page 18
DDR-DIMM X2
+2.5V 333MHz
+CPU_CORE
page 13,14,15
page 7,8,9,10,11,12
LVDS Signal
LVDS Connector
2
2
B+
page 18
USB2.0 CTRL.
A LINK
NEC uPD720101
+1.5VS
66MHz
page 24
IDSEL:AD18
PIRQC#
IDSEL:AD19
PIRQD#
LAN
RTL 8101L
Minipci CONN
WIRELESS & Dubug
+3V
+3VS
+5VS
+3V
+2.5VLAN page 22
page 25
IDSEL:AD20
PIRQB#
CardBus
+3V
+3VS
page 20
ATI IXP150
457 BGA
+1.5VALW
+CPU_CORE
VCC5REFSUS
R J45
page 23
+5VALW
+3V
1394 Conn.page
+3VALW
page 37
+3VS
RTC Batt.page
Embedded Controller
NS PC87591L
+3VS
+3VALW
page 34
page 37
IDE ODD
+5VS
+5VCD
page 30
AC97 Codec
ALC202A
SIDE IRQ14
+3VS
page32
Cable
PIDE IRQ15
page 31
+3VALW
page 34
DC/DC Interface
Suspend
MIC Phone
+5VDDA page 33
page 31
LINE IN
BIOS & Ext. IO
+3VALW
+5VALW
page 36
+5VDDA
page 32
INT. Speaker
Debug COM Port
+5V
page 33
page 34
4
+AUD_VREF
page 33
page 31
4
Touch Pad
FIR
+3VS
HeadPhone
LID SW & Kill SW
+3VALW
+5VS
page 34
page 31
LID Hibernation
Compal Electronics, Inc.
Title
+5VALW +RTC_VREF
page 39
Block Diagram
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Date:
B
C
D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Document Number
R ev
1.0
LA-2051
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
A
R J11
+5VALW -> +VDDA
page 30
EC DEBUG & Int. KB
Parallel
page 40
IDE HDD
AMP TPA0232
+5VALW page 33
37
+5VS
Power Circuit
DC/DC
3
Cable
page 21
SW Board Conn
+5VALW
page 23
+3VS
33MHz
19
Super I/O
LPC47N217
On/Off BTN &
User Keys
M DC
+5VS
+3VS
LPC BUS
+12VALW
+3VALW
ATA100
page 26,27,28,29
page 19
3
PWR Controller & Slot
page 27
AC-LINK
24.576MHz
VCC5REF
TSB43AB21
USB 2.0/1.1
+5V
+1.5VS
IEEE 1394
+3V
+3VS
48MHz
+3VALW
IDSEL:AD16
PIRQA#
CB1410
USB Ports X3
( X1 reserve )
+3VS
PCI BUS
+3VS 33MHz
Friday, November 14, 2003
Sheet
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of
51
5
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2
1
Power Managment table
http://laptopblue.vn
Voltage Rails
Power Plane
D
C
Description
S0-S1
S3
S5
VIN
Adapter power supply (19V)
N/A
N/A
N/A
B+
AC or battery power rail for power circuit.
N/A
N/A
N/A
+CPU_CORE
Core voltage for CPU
ON
OFF
OFF
+1.2V
The voltage for Processor VID select
ON
OFF
OFF
+1.25VS
1.25V switched power rail for DDR Vtt
ON
OFF
OFF
+1.5VS
1.5V I/O power rail for ATI-RS300M/RC300M NB AGP.
ON
OFF
OFF
+1.8VS
1.8V switched power rail for ATI-RS300M/RC300M NB.
ON
OFF
OFF
+2.5VALW
2.5V always on power rail
ON
ON
ON*
+2.5V
2.5V system power rail for DDR
ON
ON
OFF
+2.5VS
2.5V switched power rail
ON
OFF
OFF
+3VALW
3.3V always on power rail
ON
ON
ON*
+3V
3.3V system power rail for SB,LAN,CardReader and HUB.
ON
ON
OFF
+3VS
3.3V switched power rail
ON
OFF
OFF
+5VALW
5V always on power rail
ON
ON
ON*
+5V
5V system power rail .
ON
ON
OFF
+5VS
5V switched power rail
ON
OFF
OFF
+12VALW
12V always on power rail
ON
ON
ON*
RTCVCC
RTC power
ON
ON
ON
Signal
B
N/ A
N/ A
AGP _DEVSEL
N/ A
A
SOUT HBRIDGE
AD31 (INT.)
N/ A
N/ A
U SB
AD30 (INT.)
N/ A
D
AC97
AD31 (INT.)
N/ A
B
ATA 100
AD31 (INT.)
N/ A
A
ETHERNET
AD24(INT.)
N/ A
C
1394
AD16
0
A
L AN
AD19
1
D
CARD BUS
AD20
2
A
Wireless LAN(MINI PCI) AD18
3
C
EXT USB
AD23(EXT.)
ON
ON
ON
S1
ON
ON
ON
S3
ON
ON
OFF
S5 S4/AC
ON
OFF
OFF
S5 S4/AC don't exist
OFF
OFF
OFF
SKU ID Table for AD channel
EC SM Bus1 address
A
0
1
2
3
4
5
6
7
BOARD ID
A,C ,D
EC SM Bus2 address
Device
Address
Device
Address
Smart Battery
0001 011X b
ADM1032
1001 100X b
EEPROM(24C16)
1010 000X b
D
+CPU_CORE
C
A
4
+1.8VS
+3VS
S0
SKU ID
AGP BUS
+2.5V
+1.25VS
PIRQ
NB Internal VGA
+12VALW
+2.5VS
+1.5VS
Vcc
Ra
REQ/GNT #
+3V
State
External PCI Devices
IDSEL #
+5V
+5VALW
+5VS
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
DEVICE
+3VALW
Version
0
1
2
3
BID1
0
0
1
1
BID0
0
1
0
1
3.3V +/- 5%
100K +/- 5%
Rb
0
8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
NC
Sku ID
0
1
2
3
4
5
6
7
V AD_BID min
0 V
0.216 V
0.436 V
0.712 V
1.036 V
1.453 V
1.935 V
2.500 V
V AD_BID typ
0 V
0.250 V
0.503 V
0.819 V
1.185 V
1.650 V
2.200 V
3.300 V
CD PLAY FUNCTION
V AD_BID max
0 V
0.289 V
0.538 V
0.875 V
1.264 V
1.759 V
2.341 V
3.300 V
B
Short cut key
YES
YES
NO
NO
YES
NO
YES
NO
I2C / SMBUS ADDRESSING
A
DEVICE
HEX
ADDRESS
DD R SO-DIMM 0
A0
1010000X
DD R SO-DIMM 1
A2
1010001X
CLOCK GENERATOR (EXT.)
D2
1101001X
5
4
Compal Electronics, Inc.
Title
Note & Revision
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size
Document Number
R ev
1.0
LA-2051
Date:
Tuesday, November 18, 2003
Sheet
1
3
of
51
5
4
3
2
1
http://laptopblue.vn
+CPU_CORE
D
A10
A12
A14
A16
A18
A20
A8
AA10
AA12
AA14
AA16
AA18
AA8
AB11
AB13
AB15
AB17
AB19
AB7
AB9
AC10
AC12
AC14
AC16
AC18
AC8
AD11
AD13
AD15
AD17
AD19
AD7
AD9
AE10
AE12
AE14
AE16
AE18
AE20
AE6
AE8
AF11
AF13
AF15
AF17
AF19
AF2
AF21
AF5
AF7
AF9
B11
B13
B15
B17
B19
B7
B9
C10
C12
C14
C16
C18
C20
C8
D11
D13
D15
D17
D19
D7
D9
E10
D
HA#[3..31]
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
C
H_REQ#[0..4]
H_ADS#
+CPU_CORE
R4
R36 1
+CPU_CORE
B
2 56_0402_5%
1
7
7
7
7
H_BREQ0#
H_BPRI#
H_BNR#
H_LOCK#
16 CLK_CPU_BCLK
16 CLK_CPU_BCLK#
REQ#0
REQ#1
REQ#2
REQ#3
REQ#4
ADS#
AC1
V5
AA3
AC3
AP#0
AP#1
BINIT#
IERR#
H6
D2
G2
G4
BR0#
BPRI#
BNR#
LOCK#
Northwood-MT
Prescott-MT
HOST
ADDR
CONTROL
2 51_0402_5%
CLK_CPU_BCLK AF22
CLK_CPU_BCLK# AF23
F3
E3
E2
BCLK0
BCLK1
CLK
CON
HIT#TROL
HITM#
GND
DEFER#
FOX_PZ47803-274A-42_Prescott
H1
H4
H23
H26
A11
A13
A15
A17
A19
A21
A24
A26
A3
A9
AA1
AA11
AA13
AA15
AA17
AA19
AA23
AA26
AA4
AA7
AA9
AB10
AB12
AB14
AB16
AB18
AB20
AB21
AB24
AB3
AB6
AB8
AC11
AC13
AC15
AC17
AC19
AC2
AC22
AC25
AC5
AC7
AC9
AD10
AD12
AD14
AD16
AD18
AD21
AD23
AD4
AD8
VSS_0
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
7
H_HIT#
7
H_HITM#
7 H_DEFER#
J1
K5
J4
J3
H3
G1
HOST
ADDR
POWER
VCC_81
VCC_82
VCC_83
VCC_84
VCC_85
VCC_80
VCC_79
VCC_78
VCC_77
VCC_76
VCC_75
VCC_74
7
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_ADS#
HD#[0..63]
D#0
D#1
D#2
D#3
D#4
D#5
D#6
D#7
D#8
D#9
D#10
D#11
D#12
D#13
D#14
D#15
D#16
D#17
D#18
D#19
D#20
D#21
D#22
D#23
D#24
D#25
D#26
D#27
D#28
D#29
D#30
D#31
D#32
D#33
D#34
D#35
D#36
D#37
D#38
D#39
D#40
D#41
D#42
D#43
D#44
D#45
D#46
D#47
D#48
D#49
D#50
D#51
D#52
D#53
D#54
D#55
D#56
D#57
D#58
D#59
D#60
D#61
D#62
D#63
POWER
BOOTSELECT
H_REQ#[0..4]
A#3
A#4
A#5
A#6
A#7
A#8
A#9
A#10
A#11
A#12
A#13
A#14
A#15
A#16
A#17
A#18
A#19
A#20
A#21
A#22
A#23
A#24
A#25
A#26
A#27
A#28
A#29
A#30
A#31
A#32
A#33
A#34
A#35
B21
B22
A23
A25
C21
D22
B24
C23
C24
B25
G22
H21
C26
D23
J21
D25
H22
E24
G23
F23
F24
E25
F26
D26
L21
G26
H24
M21
L22
J24
K23
H25
M23
N22
P21
M24
N23
M26
N26
N25
R21
P24
R25
R24
T26
T25
T22
T23
U26
U24
U23
V25
U21
V22
V24
W26
Y26
W25
Y23
Y24
Y21
AA25
AA22
AA24
HD#[0..63] 7
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
C
B
F13
F15
F17
F19
F9
F11
E8
E20
E18
E16
E14
E12
7
K2
K4
L6
K1
L3
M6
L2
M3
M4
N1
M1
N2
N4
N5
T1
R2
P3
P4
R3
T2
U1
P6
U3
T4
V2
R6
W1
T5
U4
V3
W2
Y1
AB1
AD1
HA#[3..31]
VCC_0
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
VCC_73
JCPU1A
7
+CPU_CORE
2
1
R8
0_0402_5%
A
BOOTSELECT
A
Title
Compal Electronics, Inc.
Prescott / P4 uFCPGA (1/2)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
3
2
Size
Custom
Date:
Document Number
R ev
1.0
LA-2051
Friday, November 14, 2003
Sheet
1
4
of
51
5
4
3
2
1
http://laptopblue.vn
7
7
12,16
12,16
H_DBSY#
H_DRDY#
BSEL0
BSEL1
2
R51
1ITP_TMS
39.2_0603_1%
C
6 H_THERMDA
6 H_THERMDC
2ITP_TDO
75_0402_5%
2
R43
1ITP_TRST#
680_0402_5%
2
R52
1ITP_TCK
27.4_0603_1%
1
D1
E5
W5
AB25
LINT0
LINT1
INIT#
RESET#
C423
@33U_D2_8M_R35
2
H5
H2
AD6
AD5
B3
C4
THERMDA
THERMDC
A2
THERMTRIP#
BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5
ITP_TCK
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
D4
C1
D5
F7
E6
TCK
TDI
TDO
TMS
TRST#
AD20
AE23
B
AF26
SKTOCC#
MISC
GROUND
56_0402_5%
2 H_ FERR#
FOX_PZ47803-274A-42_Prescott
+3VS
Reserve
for EMI.
Near CPU.
1
2
3
4
10K_1206_8P4R_5%
RP1
8
7
6
5
TESTHI0
TESTHI1
TESTHI2
TESTHI3
TESTHI4
TESTHI5
TESTHI6
TESTHI7
TESTHI8
TESTHI9
TESTHI10
TESTHI11
TESTHI12
DSTBN#0
DSTBN#1
DSTBN#2
DSTBN#3
E22
K22
R22
W22
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
DSTBP#0
DSTBP#1
DSTBP#2
DSTBP#3
F21
J23
P23
W23
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
ADSTB#0
ADSTB#1
L5
R5
H_ADSTB#0
H_ADSTB#1
DBI#0
DBI#1
DBI#2
DBI#3
E21
G25
P26
V21
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
DBR#
AE25
PROCHOT#
MCERR#
SLP#
C3
V6
AB26
NC1
NC2
NC3
NC4
NC5
A22
A7
AF25
AF24
AE21
1
56_0402_5%
2 H_RESET#
1
R408
1
R409
2
+CPU_CORE
1
1
1
1
1
1
1
2
2
2
2
2
2
2
56_0402_5%
2
56_0402_5%
R58
R60
R38
R45
R39
R35
R405
56_0402_5%
56_0402_5%
56_0402_5%
56_0402_5%
56_0402_5%
300_0402_5%
56_0402_5%
H_DSTBN#[0..3] 7
C
H_DSTBP#[0..3]
H_DSTBP#[0..3] 7
H_ADSTB#0 7
H_ADSTB#1 7
H_DBI#[0..3]
2
R410
1
R10
H_PROCHOT#
H_DBI#[0..3] 7
1
+3VALW
150_0402_5%
2
+CPU_CORE
100K_0402_1%
H_PROCHOT# 26,46
H_SLP#
H_SLP# 26
B
GTL Reference Voltage
Layout note :
1. Place R_A and R_B near CPU (Within 1.5").
+CPU_CORE
1
Pop: Prescott
Depop: Northwood
R12
@2.43K_0603_1%
2
1
C1
0.1U_0402_10V6K
2
R74
49.9_0603_1%
+1.2V
+H_GTLREF
1
1
1
0_0402_5%
2
2 10K_0402_5%
2 10K_0402_5%
1
R67
100_0603_1%
H_VID_PW RGD 38
47 CPU_VID[0..5]
R9
4.7K_0402_5%
2
2
1
R66
R6
R5
1
+3VS
56_0402_5%
2 H_THERMTRIP#
R_G
+1.2V
Place near CPU
R1
D
R404
1
AD24
AA2
AC21
AC20
AC24
AC23
AA20
AB22
U6
W4
Y3
H_ GHI#
A6
AD25 H_DPSLPR#
MISC
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
If CP U is P 4 , Change the
res is tor R53 9,R540 value to
5 1.1_0603_1%,or pres cott
6 1 . 9 _ 0603_1%
Place near SB200
R560
1
DATA
COMP0
COMP1
COMP1
2
51.1_0603_1%
1
R11
+CPU_CORE
ADDR
VSSA
L24
P1
COMP0
2
51.1_0603_1%
1
R96
Comp0/1 need keep 25
mils trace width
DATA
MISC
ITP
ITP_CLK0
CLK
ITP_CLK1
2
H_DSTBN#[0..3]
Northwood-MT
Prescott-MT
ITP
VCCSENSE
VSSSENSE
VCCVIDLB
AC26
AD26
16 CLK_CPU_ITP
16 CLK_CPU_ITP#
THER
MAL
MISC
VCCIOPLL
VCCA
VCCSENSE
A5
VSSSENSE
A4
2
AF3
0_0402_5%
AD22
47
47
AE26
MISC
H_THERMDA
H_THERMDC
AC6
AB5
AC4
Y6
AA5
AB4
OPTIMIZED/COMPAT#
ITP
DBSY#
DRDY#
BSEL0
BSEL1
ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
ITP_BPM#4
ITP_BPM#5
AA21
AA6
F20
F6
LEGACY
C47
1
220P_0603_50V8J
GTLREF0
GTLREF1
GTLREF2
GTLREF3
REF
H_THERMTRIP#
VCCSENSE
VSSSENSE
+
1
+1.2V
C422
R587
33U_D2_8M_R35
2
VSSA
+
2
H_ INTR
H_NMI
H_INIT#
H_RESET#
VCCIOPLL
VC CA
1
AE11
AE13
AE15
AE17
AE19
AE22
AE24
AE7
AE9
AF1
AF10
AF12
AF14
AF16
AF18
AF20
AF6
AF8
B10
B12
B14
B16
B18
B20
B23
B26
B4
B8
C11
C13
C15
C17
C19
C2
C22
C25
C5
C7
C9
D10
D12
D14
D16
D18
D20
D21
D24
D3
D6
D8
E1
E11
E13
E15
E17
E19
E23
E26
E4
E7
E9
F10
F12
F14
F16
F18
F2
F22
F25
F5
A20M#
FERR#
IGNNE#
SMI#
PWRGOOD
STPCLK#
6 H_THERMTRIP#
R586
+CPU_CORE
L27
1
2
LQG21F4R7N00_0805
1
2
LQG21F4R7N00_0805
L26
C6
B6
B2
B5
AB23
Y4
H_D BSY#
H_DRD Y#
BSEL0
BSEL1
CPU_GHI# 27
1
1 ITP_TDI
150_0402_5%
2
R42
0_0402_5%
2
H_INTR
H_NMI
H_INIT#
H_RESET#
H_A20M#
H_ FERR#
H_I GNNE#
H_SMI#
H_PW RGD
H_STPCLK#
J26
K25
K26
L25
VCCVID
26
26
26
7,26
CON
TROL
AF4
H_A20M#
H_FERR#
H_IGNNE#
H_SMI#
H_PW RGD
H_STPCLK#
1
+H_GTLREF
GROUND
VIDPWRGD
26
26
26
26
26
26
H_ GHI#
R403
@33_0402_5%
DP#0
DP#1
DP#2
DP#3
AD2
2
R2
H_TRDY#
H_TRDY#
RS#0
RS#1
RS#2
RSP#
TRDY#
VID0
VID1
VID2
VID3
VID4
VID5
7
F1
G5
F4
AB2
J6
AE5
AE4
AE3
AE2
AE1
AD3
H_RS#0
H_RS#1
H_RS#2
+CPU_CORE
1
H_RS#[0..2]
H_RS#[0..2]
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
D
7
2 ITP_BPM#0
51_0402_5%
2 ITP_BPM#1
51_0402_5%
2 ITP_BPM#2
51_0402_5%
2 ITP_BPM#3
51_0402_5%
2 ITP_BPM#4
51_0402_5%
2 ITP_BPM#5
51_0402_5%
1
R56
1
R59
1
R47
1
R46
1
R55
1
R57
F8
G21
G24
G3
G6
J2
J22
J25
J5
K21
K24
K3
K6
L1
L23
L26
L4
M2
M22
M25
M5
N21
N24
N3
N6
P2
P22
P25
P5
R1
R23
R26
R4
T21
T24
T3
T6
U2
U22
U25
U5
V1
V23
V26
V4
W21
W24
W3
W6
Y2
Y22
Y25
Y5
+CPU_CORE
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
JCPU1B
H_SKTOCC#
1
GND
C50
1U_0603_6.3V6M
H_PW RGD
2
300_0402_5%
A
1
1
R64
Q1
MMBT3904_SOT23
1
2
1
3
R7
10,16,26,47 PM_STPCPU#
2
4.7K_0402_5%
Q2
MMBT3904_SOT23
2
Title
3
A
2
H_DPSLPR#
Prescott / P4 uFCPGA & Thermal sensor (2/2)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
Compal Electronics, Inc.
4
3
2
Size
Custom
Date:
Document Number
R ev
1.0
LA-2051
Friday, November 14, 2003
Sheet
1
5
of
51
A
B
C
D
E
F
G
H
I
http://laptopblue.vn
J
+CPU_CORE
Layout note :
Layout note :
Place close to CPU, Use 2~3 vias per PAD.
Place 22uF caps x31 pcs, populated 14pcs.
1
1
+
Place close to CPU power and
ground pin as possible
(<1inch)
1
C382
@470U_D2_2.5VM
+
2
1
+
C392
470U_D4_2.5VM
2
1
+
C401
470U_D4_2.5VM
2
1
C404
470U_D4_2.5VM
2
+CPU_CORE
For Desktop's CPU:
+CPU_CORE
Place on CPU inside
1
2
2
470uFx15/12mOhm H=1.8 each
Total 0.923m ohm
1
C396
22U_1206_6.3V6M
1
C388
22U_1206_6.3V6M
2
2
1
C383
22U_1206_6.3V6M
2
1
C379
22U_1206_6.3V6M
2
1
+
1
C397
22U_1206_6.3V6M
+
2
C389
22U_1206_6.3V6M
2
+
1
C384
22U_1206_6.3V6M
1
C380
22U_1206_6.3V6M
2
2
1
C398
22U_1206_6.3V6M
2
1
C390
22U_1206_6.3V6M
2
C40
470U_D4_2.5VM
1
C385
22U_1206_6.3V6M
2
1
+
C30
470U_D4_2.5VM
2
2
1
1
1
+
C33
470U_D4_2.5VM
2
C36
470U_D4_2.5VM
2
2
1
1
1
+
C419
470U_D4_2.5VM
+CPU_CORE
+CPU_CORE
2
1
C407
470U_D4_2.5VM
2
C381
22U_1206_6.3V6M
+
1
+
C48
470U_D4_2.5VM
2
+
C58
470U_D4_2.5VM
2
C65
470U_D4_2.5VM
2
3
3
+CPU_CORE
Please place these cap on the socket north side
1
2
1
C409
22U_1206_6.3V6M
2
1
C408
22U_1206_6.3V6M
2
1
C418
22U_1206_6.3V6M
1
C410
22U_1206_6.3V6M
2
C411
22U_1206_6.3V6M
2
+CPU_CORE
4
4
+CPU_CORE
1
1
1
C412
22U_1206_6.3V6M
2
1
C413
22U_1206_6.3V6M
2
1
C414
22U_1206_6.3V6M
2
1
C415
22U_1206_6.3V6M
2
1
C416
22U_1206_6.3V6M
2
C417
22U_1206_6.3V6M
2
1
C82
@0.22U_0603_10V7K
2
1
C81
@0.22U_0603_10V7K
2
1
C80
@0.22U_0603_10V7K
2
1
C18
@0.22U_0603_10V7K
2
1
C17
@0.22U_0603_10V7K
2
C16
@0.22U_0603_10V7K
2
5
5
+CPU_CORE
1
2
Please place these cap on the socket sourth side
1
C21
22U_1206_6.3V6M
2
1
C22
22U_1206_6.3V6M
1
C23
22U_1206_6.3V6M
2
1
C19
22U_1206_6.3V6M
2
1
C72
22U_1206_6.3V6M
2
2
C73
22U_1206_6.3V6M
R3
+CPU_CORE
2
1 300_0402_5%
C2
2
1 @1U_0603_10V6K
+CPU_CORE
2
2SC2411K_SC59
B
6
1
C20
22U_1206_6.3V6M
2
5 H_THERMTRIP#
H_THERMTRIP#
6
Q3
1
C
2
1
C75
22U_1206_6.3V6M
E
2
1
C74
22U_1206_6.3V6M
3
MAINPWON 41,42,44
CPU Temperature Sensor
+3VS
7
7
R63
200_0402_5%
2
1
C39
2200P_0402_50V7K
5 H_THERMDC
8
1
H_THERMDA
C42
0.1U_0402_10V6K
U4
2
2
H_THERMDC
3
35
8
EC_SMC2
7
35 EC_SMD2
D+
VDD1
D-
ALERT#
SCLK
SDATA
R54
10K_0402_5%
2
5 H_THERMDA
+3VS_VDD
2
1
1
THERM#
GND
1
6
4
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
ADM1032ARM_RM8
A
B
C
Compal Electronics, Inc.
8
CPU Decoupling CAP.
5
D
E
F
G
H
Size
Custom
Date:
Document Number
R ev
1.0
LA-2051
Friday, November 14, 2003
I
Sheet
6
of
J
51
5
4
3
2
1
http://laptopblue.vn
HA#[3..31]
HA#[3..31] 4
H_REQ#[0..4]
H_REQ#[0..4] 4
HD#[0.. 63]
HD#[0..63] 4
--> 412_0402_1%
R485
1
L
Note: PLACE CLOSE TO RC300M,
USE 10/10 WIDTH/SPACE
+CPU_CORE
PLACE CLOSE TO U27 Ball
W28, USE 20/20
WIDTH/SPACE
2
B
R428
5,26
5
5
5
H_RESET#
H_RS#2
H_RS#1
H_RS#0
5
4
4
H_TRDY#
H_HIT#
H_HITM#
L27
K25
H26
J27
L26
G27
F25
K26
H_RESET#
H_RS#2
H_RS#1
H_RS#0
A17
G25
G26
J25
H_TRDY#
H _HIT#
H_HITM#
F26
J26
H25
2
A9
AH5
AG5
C7
+CPU_CORE
R437 1
2 24.9_0402_1% COMP_N
V28
R436 1
2 49.9_0402_1% COMP_P
L31
C PVDD
1
2
HB-1M2012-121JT03_0805
1U_0603_10V6K
1
2CPVSS
C492
NB_GTLREF
W29
H23
J23
W28
CPU_ADS#
CPU_BNR#
CPU_BPRI#
CPU_DEFER#
CPU_DRDY#
CPU_DBSY#
CPU_BR0#
CPU_LOCK#
CPU_CPURSET#
CPU_RS2#
CPU_RS1#
CPU_RS0#
CPU_TRDY#
CPU_HIT#
CPU_HITM#
DATA GROUP 0
ADDR. GROUP 0
DATA GROUP 1
H_ADS#
H_BNR#
H_BPRI#
H_DEFER#
H_DRD Y#
H _DBSY#
H_BREQ0#
H_LOCK#
CPU_RSET
SUS_STAT#
SYSRESET#
POWERGOOD
CPU_COMP_N
CPU_COMP_P
CPVDD
CPVSS
CPU_VREF
1
R429
2
100_0603_1%
2
C433
1U_0603_10V6K
1
2
C441
Y29
Y28
220P_0402_50V8K
B17
THERMALDIODE_N
THERMALDIODE_P
TESTMODE
1
C441 CLOSE
TO Ball W28
MISC.
1
1
H_ADS#
H_BNR#
H_BPRI#
H_DEFER#
H_DRDY#
H_DBSY#
H_BREQ0#
H_LOCK#
27
SUS_STAT#
330_0402_5%
26,30,34,35 NB_RST#
17
NB_PW RGD
+1.8VS
49.9_0603_1%
H_ADSTB#1
CPU_A17#
CPU_A18#
CPU_A19#
CPU_A20#
CPU_A21#
CPU_A22#
CPU_A23#
CPU_A24#
CPU_A25#
CPU_A26#
CPU_A27#
CPU_A28#
CPU_A29#
CPU_A30#
CPU_A31#
CPU_ADSTB1#
DATA GROUP 2
0.1U_0402_10V6K
C590
2
1
5
4
4
4
4
5
5
4
4
U30
T30
R28
R25
U25
T28
V29
T26
U29
U26
V26
T25
V25
U27
U28
T29
DATA GROUP 3
C
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
H_ADSTB#1
CPU_A3#
CPU_A4#
CPU_A5#
CPU_A6#
CPU_A7#
CPU_A8#
CPU_A9#
CPU_A10#
CPU_A11#
CPU_A12#
CPU_A13#
CPU_A14#
CPU_A15#
CPU_A16#
CPU_REQ0#
CPU_REQ1#
CPU_REQ2#
CPU_REQ3#
CPU_REQ4#
CPU_ADSTB0#
ADDR. GROUP 1
H_ADSTB#0
M28
P25
M25
N29
N30
M26
N28
P29
P26
R29
P30
P28
N26
N27
M29
N25
R26
L28
L29
R27
CPU_D0#
CPU_D1#
CPU_D2#
CPU_D3#
CPU_D4#
CPU_D5#
CPU_D6#
CPU_D7#
CPU_D8#
CPU_D9#
CPU_D10#
CPU_D11#
CPU_D12#
CPU_D13#
CPU_D14#
CPU_D15#
CPU_DBI0#
CPU_DSTBN0#
CPU_DSTBP0#
CPU_D16#
CPU_D17#
CPU_D18#
CPU_D19#
CPU_D20#
CPU_D21#
CPU_D22#
CPU_D23#
CPU_D24#
CPU_D25#
CPU_D26#
CPU_D27#
CPU_D28#
CPU_D29#
CPU_D30#
CPU_D31#
CPU_DBI1#
CPU_DSTBN1#
CPU_DSTBP1#
PENTIUMAGTL+ I/F
IV
5
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_ADSTB#0
CONTROL
D
PART 1 OF 6
U24A
R469
CPU_D32#
CPU_D33#
CPU_D34#
CPU_D35#
CPU_D36#
CPU_D37#
CPU_D38#
CPU_D39#
CPU_D40#
CPU_D41#
CPU_D42#
CPU_D43#
CPU_D44#
CPU_D45#
CPU_D46#
CPU_D47#
CPU_DBI2#
CPU_DSTBN2#
CPU_DSTBP2#
CPU_D48#
CPU_D49#
CPU_D50#
CPU_D51#
CPU_D52#
CPU_D53#
CPU_D54#
CPU_D55#
CPU_D56#
CPU_D57#
CPU_D58#
CPU_D59#
CPU_D60#
CPU_D61#
CPU_D62#
CPU_D63#
CPU_DBI3#
CPU_DSTBN3#
CPU_DSTBP3#
L30
K29
J29
H28
K28
K30
H29
J28
F28
H30
E30
D29
G28
E29
D30
F29
E28
G30
G29
H D#0
H D#1
H D#2
H D#3
H D#4
H D#5
H D#6
H D#7
H D#8
H D#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
H_DBI#0
H_DSTBN#0
H_DSTBP#0
B26
C30
A27
B29
C28
C29
B28
D28
D26
B27
C26
E25
E26
A26
B25
C25
A28
D27
E27
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
H_DBI#1
H_DSTBN#1
H_DSTBP#1
F24
D24
E23
E24
F23
C24
B24
A24
F21
A23
B23
C22
B22
C21
E21
D22
D23
E22
F22
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
H_DBI#2
H_DSTBN#2
H_DSTBP#2
B21
F20
A21
C20
E20
D20
A20
D19
C18
B20
E18
B19
D18
B18
C17
A18
F19
E19
F18
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
H_DBI#3
H_DSTBN#3
H_DSTBP#3
D
H_DBI#0 5
H_DSTBN#0 5
H_DSTBP#0 5
C
H_DBI#1 5
H_DSTBN#1 5
H_DSTBP#1 5
H_DBI#2 5
H_DSTBN#2 5
H_DSTBP#2 5
B
H_DBI#3 5
H_DSTBN#3 5
H_DSTBP#3 5
CHS-216IGP9050A21_BGA718
2
4.7K_0402_5%
+CPU_CORE
0.1U_0402_10V6K
C486
22U_1206_16V4Z_V1
1
2
A
C541
1
C525
1
2
2
0.1U_0402_10V6K
C490
0.1U_0402_10V6K
1
C466
1
C465
0.1U_0402_10V6K
1
C464
2
2
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
2
C463
1
1
2
2
0.1U_0402_10V6K
C507
0.1U_0402_10V6K
A
Compal Electronics, Inc.
Title
ATI RC300M-AGTL+
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Size
Document Number
R ev
1.0
LA-2051
Date:
Friday, November 14, 2003
Sheet
1
7
of
51
5
4
3
2
1
http://laptopblue.vn
U24B
D
13
13
13
AH19
AJ17
AK17
AH16
AK16
AF17
AE18
AF16
AE17
AE16
AJ20
AG15
AF15
AE23
AH20
AE25
DDR_SBS0
DDR_SBS1
DDR_SMA15
DDR _DM0
DDR _DM1
DDR _DM2
DDR _DM3
DDR _DM4
DDR _DM5
DDR _DM6
DDR _DM7
13
13
DDR_SRAS#
DDR_SCAS#
13
DDR_SW E#
C
13 DDR_CLK0
13 DDR_CLK0#
13 DDR_CLK1
13 DDR_CLK1#
AH7
AF10
AJ14
AF21
AH23
AK28
AD29
AB26
DD R_SRAS#
DD R_SCAS#
AF24
AF25
D DR_SW E#
AE24
DDR_ DQS0
DDR_ DQS1
DDR_ DQS2
DDR_ DQS3
DDR_ DQS4
DDR_ DQS5
DDR_ DQS6
DDR_ DQS7
AJ8
AF9
AH13
AE21
AJ23
AJ27
AC28
AA25
DDR _CLK0
DDR _CLK0#
AK10
AH10
DDR _CLK1
DDR _CLK1#
AH18
AJ19
AG30
AG29
14 DDR_CLK3
14 DDR_CLK3#
14 DDR_CLK4
14 DDR_CLK4#
DDR _CLK3
DDR _CLK3#
AK11
AJ11
DDR _CLK4
DDR _CLK4#
AH17
AJ18
AF28
AG28
B
+1.8VS
13,14
13,14
14
14
DDR_SCKE0
DDR_SCKE1
DDR_SCKE2
DDR_SCKE3
13,14
13,14
14
14
DDR_SCS#0
DDR_SCS#1
DDR_SCS#2
DDR_SCS#3
DD R_SCKE0
DD R_SCKE1
DD R_SCKE2
DD R_SCKE3
AF13
AE13
AG14
AF14
DD R_SCS#0
DD R_SCS#1
DD R_SCS#2
DD R_SCS#3
AH26
AH27
AF26
AG27
MPVDD
AC18
L34 1
2
HB-1M2012-121JT03_0805
C516
1
2MPVSS
AD18
MEM_A0
MEM_A1
MEM_A2
MEM_A3
MEM_A4
MEM_A5
MEM_A6
MEM_A7
MEM_A8
MEM_A9
MEM_A10
MEM_A11
MEM_A12
MEM_A13
MEM_A14
MEM_A15
PART 2 OF 6
MEM_DM0
MEM_DM1
MEM_DM2
MEM_DM3
MEM_DM4
MEM_DM5
MEM_DM6
MEM_DM7
MEM_RAS#
MEM_CAS#
MEM_WE#
MEM_DQS0
MEM_DQS1
MEM_DQS2
MEM_DQS3
MEM_DQS4
MEM_DQS5
MEM_DQS6
MEM_DQS7
MEM_CK0
MEM_CK0#
MEM_CK1
MEM_CK1#
MEM_CK2
MEM_CK2#
MEM_CK3
MEM_CK3#
MEM_CK4
MEM_CK4#
MEM_CK5
MEM_CK5#
MEM_CKE0
MEM_CKE1
MEM_CKE2
MEM_CKE3
MEM_CS#0
MEM_CS#1
MEM_CS#2
MEM_CS#3
MEM I/F
DDR_SMA0
DDR_SMA1
DDR_SMA2
DDR_SMA3
DDR_SMA4
DDR_SMA5
DDR_SMA6
DDR_SMA7
DDR_SMA8
DDR_SMA9
DDR_SMA10
DDR_SMA11
DDR_SMA12
MEM_DQ0
MEM_DQ1
MEM_DQ2
MEM_DQ3
MEM_DQ4
MEM_DQ5
MEM_DQ6
MEM_DQ7
MEM_DQ8
MEM_DQ9
MEM_DQ10
MEM_DQ11
MEM_DQ12
MEM_DQ13
MEM_DQ14
MEM_DQ15
MEM_DQ16
MEM_DQ17
MEM_DQ18
MEM_DQ19
MEM_DQ20
MEM_DQ21
MEM_DQ22
MEM_DQ23
MEM_DQ24
MEM_DQ25
MEM_DQ26
MEM_DQ27
MEM_DQ28
MEM_DQ29
MEM_DQ30
MEM_DQ31
MEM_DQ32
MEM_DQ33
MEM_DQ34
MEM_DQ35
MEM_DQ36
MEM_DQ37
MEM_DQ38
MEM_DQ39
MEM_DQ40
MEM_DQ41
MEM_DQ42
MEM_DQ43
MEM_DQ44
MEM_DQ45
MEM_DQ46
MEM_DQ47
MEM_DQ48
MEM_DQ49
MEM_DQ50
MEM_DQ51
MEM_DQ52
MEM_DQ53
MEM_DQ54
MEM_DQ55
MEM_DQ56
MEM_DQ57
MEM_DQ58
MEM_DQ59
MEM_DQ60
MEM_DQ61
MEM_DQ62
MEM_DQ63
MEM_CAP1
MEM_CAP2
MPVDD
MEM_COMP
MPVSS
MEM_DDRVREF
DDR_D Q0
DDR_D Q1
DDR_D Q2
DDR_D Q3
DDR_D Q4
DDR_D Q5
DDR_D Q6
DDR_D Q7
DDR_D Q8
DDR_D Q9
DDR_ DQ10
DDR_ DQ11
DDR_ DQ12
DDR_ DQ13
DDR_ DQ14
DDR_ DQ15
DDR_ DQ16
DDR_ DQ17
DDR_ DQ18
DDR_ DQ19
DDR_ DQ20
DDR_ DQ21
DDR_ DQ22
DDR_ DQ23
DDR_ DQ24
DDR_ DQ25
DDR_ DQ26
DDR_ DQ27
DDR_ DQ28
DDR_ DQ29
DDR_ DQ30
DDR_ DQ31
DDR_ DQ32
DDR_ DQ33
DDR_ DQ34
DDR_ DQ35
DDR_ DQ36
DDR_ DQ37
DDR_ DQ38
DDR_ DQ39
DDR_ DQ40
DDR_ DQ41
DDR_ DQ42
DDR_ DQ43
DDR_ DQ44
DDR_ DQ45
DDR_ DQ46
DDR_ DQ47
DDR_ DQ48
DDR_ DQ49
DDR_ DQ50
DDR_ DQ51
DDR_ DQ52
DDR_ DQ53
DDR_ DQ54
DDR_ DQ55
DDR_ DQ56
DDR_ DQ57
DDR_ DQ58
DDR_ DQ59
DDR_ DQ60
DDR_ DQ61
DDR_ DQ62
DDR_ DQ63
AG6
AJ7
AJ9
AJ10
AJ6
AH6
AH8
AH9
AE7
AE8
AE12
AF12
AF7
AF8
AE11
AF11
AJ12
AH12
AH14
AH15
AH11
AJ13
AJ15
AJ16
AF18
AG20
AG21
AF22
AF19
AF20
AE22
AF23
AJ21
AJ22
AJ24
AK25
AH21
AH22
AH24
AJ25
AK26
AK27
AJ28
AH29
AH25
AJ26
AJ29
AH30
AF29
AE29
AB28
AA28
AE28
AD28
AC29
AB29
AC26
AB25
Y26
W26
AE26
AD26
AA26
Y27
DDR_D M[0..7]
DDR_DQ [0..63]
DDR_DQ S[0..7]
D DR_SMA[0..12]
DDR_DM[0..7] 13,14
DDR_DQ[0..63] 13,14
DDR_DQS[0..7] 13,14
DDR_SMA[0..12] 13
C
AF6
C645 1
2
0.47U_0603_16V7K
AA29
C432 1
2
0.47U_0603_16V7K
MEN_COMP R468 1
AK19
AK20
2 49.9_0402_1%
B
+SDREF
1U_0603_10V6K
CHS-216IGP9050A21_BGA718
D
2
C489
0.1U_0402_10V6K
1
C724
+SDREF
2
1
+2.5V
0.1U_0402_10V6K
Close to U24.AK20
+2.5V
0.1U_0402_10V6K
A
A
C547
0.1U_0402_10V6K
1
2
C475
1
C572
2
1
2
0.1U_0402_10V6K
C450
1
2
1
2
C600
0.1U_0402_10V6K
0.1U_0402_10V6K
Compal Electronics, Inc.
Title
ATI RC300M-DDR I/F
Size
Document Number
Rev
1.0
LA-2051
Date:
5
4
3
2
Friday, November 14, 2003
Sheet
1
8
of
51
5
4
A_AD[0..31]
12,26 A_AD[0..31]
2
1
http://laptopblue.vn
A_CBE#[0..3]
12,26 A_CBE#[0..3]
3
U24C
AD5
AC6
AC5
AD2
W4
AD3
AD6
A_SBREQ#
A_SBGNT#
W5
W6
1
2 R500
8.2K_0402_5%
+3VS
V5
V6
AGP8X_DET#
?
ALINK_SBREQ#
ALINK_SBGNT#
PCI_REQ#0/ALINK_NC
PCI_GNT#0/ALINK_NC
AGP2_GNT#/AGP3_GNT
AGP2_REQ#/AGP3_REQ
M5
AGPREF_8X
J6
+1.5VS
+1.5VS
AGP2_IRDY#/AGP3_IRDY/GPIO8/I2C_CLK
AGP2_TRDY#/AGP3_TRDY/TMDS_DVI_CLK
AGP2_STOP#/AGP3_STOP/GPIO10/DDC_DATA
AGP_PAR
AGP2_FRAME#/AGP3_FRAME/TMDS_DVI_DATA
AGP2_DEVSEL#/AGP3_DEVSEL/GPIO9/I2C_DATA
AGP2_PIPE#/AGP3_DBI_HI
AGP2_NC/AGP3_DBI_LO
AGP2_RBF#/AGP3_RBF
AGP2_WBF#/AGP3_WBF
AGP8X_DET#
AGP2_SBA0/AGP3_SBA#0/GPIO0/VDDC_CNTL0
AGP2_SBA1/AGP3_SBA#1/GPIO1/VDDC_CNTL1
AGP2_SBA2/AGP3_SBA#2/GPIO2/LVDS_BLON#
AGP2_SBA3/AGP3_SBA#3/GPIO3/LVDS_DIGON
AGP2_SBA4/AGP3_SBA#4/GPIO4/STP_AGP#
AGP2_SBA5/AGP3_SBA#5/GPIO5/AGP_BUSY#
AGP2_SBA6/AGP3_SBA#6/GPIO6/LVDS_SSOUT
AGP2_SBA7/AGP3_SBA#7/GPIO7/LVDS_SSIN
AGP_VREF/TMDS_VREF
1
Rb
2
AGP_COMP
J5
AGP_COMP
AGP_ST0
AGP_ST1
AGP_ST2
@52.3_0603_1%
R529
1K_0402_1%
Ra
2
1
Xin/CLK SSCLK
S0
SSCC
1
1
2
8
1
AGP_SBA7
1
C657
R601
2
5
1
1
Xout
S1
S1
1
@SM561BS_SO8
R276
@0_0402_5%
LVDS SPREAD SPECTRUM
R293
@0_0402_5%
@10P_0402_25V8K
2
R274
3
1
EXT_LVDS_SSIN 38
@0_0402_5%
2
@0_0402_5%
2
2
2
L
R535
LVDS_SSIN2
4
1
7
6
E5
E6
T3
U2
G3
H2
@0_0402_5%
@0_0402_5%
S0
@0_0402_5%
D
AGP_SBA6
@10P_0402_25V8K
2
R275
2
@0_0402_5%
R277
R294
2
R295
2
@0_0402_5%
U44
VDD
R296
VSS
2
L42 1
2
+3VS
@BLM21P300S_0805
R534
LVDS_SSOUT2
1
1
C651
@0_0402_5%
@0_0402_5%
1
2
@10U_0805_6.3V6M
C656
1
1
Note: PLACE CLOSE TO U2 (NB RC300M)
R3
M1
L3
H1
P5
R6
T6
T5
P6
R5
C1
D3
N6
N5
+3VS
R518
2.2K_0402_5%
D DC_CLK
D DC_DAT
AGP_SBA2
AGP_SBA3
AGP_SBA4
AGP_SBA5
AGP_SBA6
AGP_SBA7
C3
C2
D4
E4
F6
F5
G6
G5
R519
2.2K_0402_5%
ENBKL#
35
ENVDD
18
AGP_STP# 27
AGP_BUSY# 27
R628
1.2K_0402_5%
L6
M6
L5
+3VS
B
CHS-216IGP9050A21_BGA718
2
AGPREF_8X
1
2
B
2
0.1U_0402_10V6K
R523
1
EXT_LVDS_SSOUT 38
C
AGP2_CBE#0/AGP3_CBE0/TMD2_D7
AGP2_CBE#1/AGP3_CBE1/TMD2_DE
AGP2_CBE#2/AGP3_CBE2
AGP2_CBE#3/AGP3_CBE3/TMD1_D5
C615
1
1
1
K5
K6
PCI_PAR/ALINK_NC
PCI_FRAME#/ALINK_STROBE#
PCI_IRDY#/ALINK_ACAT#
PCI_TRDY#/ALINK_END#
INTA#
ALINK_DEVSEL#
PCI_STOP#/ALINK_OFF#
+3VS_SSVDD
@0.1U_0402_10V6K
C653
2
A_PAR
A_STROBE#
A_ACAT#
A_END#
2 0_0402_5%
A_DEVSEL#
A_OFF#
1
@0_0402_5%
2
A_SBREQ#
A_SBGNT#
1
AGP2_SBSTB/AGP3_SBSTBF/NC/LVDS_BLON
AGP2_SBSTB#/AGP3_SBSTBS/NC/ENA_BL
AGP2_ADSTB0/AGP3_ADSTBF0/TMD2_CLK#
AGP2_ADSTB0#/AGP3_ADSTBS0/TMD2_CLK
AGP2_ADSTB1/AGP3_ADSTBF1/TMD1_CLK#
AGP2_ADSTB1#/AGP3_ADSTBS1/TMD1_CLK
R600
2
1
A_DEVSEL#
A_OFF#
26
26
R517
ALINK_CBE#0
ALINK_CBE#1
ALINK_CBE#2
ALINK_CBE#3
Y2
W3
W2
V3
V2
V1
U1
U3
T2
R2
P3
P2
N3
N2
M3
M2
L1
L2
K3
K2
J3
J2
J1
H3
F3
G2
F2
F1
E2
E1
D2
D1
2
12,26
A_PAR
26
A_STROBE#
26
A_ACAT#
26
A_END#
19,20,24,26 PCI_PIRQA#
26
26
AG4
AE2
AC3
AA3
AGP_AD0/TMD2_HSYNC
AGP_AD1/TMD2_VSYNC
AGP_AD2/TMD2_D1
AGP_AD3/TMD2_D0
AGP_AD4/TMD2_D3
AGP_AD5/TMD2_D2
AGP_AD6/TMD2_D5
AGP_AD7/TMD2_D4
AGP_AD8/TMD2_D6
AGP_AD9/TMD2_D9
AGP_AD10/TMD2_D8
AGP_AD11/TMD2_D11
AGP_AD12/TMD2_D10
AGP_AD13
AGP_AD14
AGP_AD15
AGP_AD16/TMD1_VSYNC
AGP_AD17/TMD1_HSYNC
AGP_AD18/TMD1_DE
AGP_AD19/TMD1_D0
AGP_AD20/TMD1_D1
AGP_AD21/TMD1_D2
AGP_AD22/TMD1_D3
AGP_AD23/TMD1_D4
AGP_AD24/TMD1_D7
AGP_AD25/TMD1_D6
AGP_AD26/TMD1_D9
AGP_AD27/TMD1_D8
AGP_AD28/TMD1_D11
AGP_AD29/TMD1_D10
AGP_AD30/TMDS_HPD
AGP_AD31
PART 3 OF 6
1
C
A_CBE#0
A_CBE#1
A_CBE#2
A_CBE#3
ALINK_AD0
ALINK_AD1
ALINK_AD2
ALINK_AD3
ALINK_AD4
ALINK_AD5
ALINK_AD6
ALINK_AD7
ALINK_AD8
ALINK_AD9
ALINK_AD10
ALINK_AD11
ALINK_AD12
ALINK_AD13
ALINK_AD14
ALINK_AD15
ALINK_AD16
ALINK_AD17
ALINK_AD18
ALINK_AD19
ALINK_AD20
ALINK_AD21
ALINK_AD22
ALINK_AD23
ALINK_AD24
ALINK_AD25
ALINK_AD26
ALINK_AD27
ALINK_AD28
ALINK_AD29
ALINK_AD30
ALINK_AD31
PCI Bus 0 / A-Link I/F
D
AK5
AJ5
AJ4
AH4
AJ3
AJ2
AH2
AH1
AG2
AG1
AG3
AF3
AF1
AF2
AF4
AE3
AE4
AE5
AE6
AC2
AC4
AB3
AB2
AB5
AB6
AA2
AA4
AA5
AA6
Y3
Y5
Y6
PCI BUS 1 / AGP Bus (GPIO , TMDS , ZVPort)
A_AD0
A_AD1
A_AD2
A_AD3
A_AD4
A_AD5
A_AD6
A_AD7
A_AD8
A_AD9
A_AD10
A_AD11
A_AD12
A_AD13
A_AD14
A_AD15
A_AD16
A_AD17
A_AD18
A_AD19
A_AD20
A_AD21
A_AD22
A_AD23
A_AD24
A_AD25
A_AD26
A_AD27
A_AD28
A_AD29
A_AD30
A_AD31
R533
1K_0402_1%
Rc
R504
Ra
Rb
Rc
1
2
@47K_0402
AGP8X_DET#
8X(M9+M10@)
4X(NAGP@)
169_0402_1%
52.1_0402_1%
324_0402_1%
1K_0402_1%
100_0402_1%
1K_0402_1%
ATI request
+1.5VS
+3VS
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
+1.5VS
10U_0805_10V4Z
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
@0.01U_0402_16V7Z
@0.01U_0402_16V7Z
@0.01U_0402_16V7Z
@0.01U_0402_16V7Z
@0.01U_0402_16V7Z
1
1
1
C557
47U_B_6.3VM
+
2
C506
1
1
C540
2
0.1U_0402_10V6K
2
C530
1
C524
2
0.1U_0402_10V6K
1
2
C513
1
C555
2
0.1U_0402_10V6K
+1.5VS
1
2
C549
1
C529
2
0.1U_0402_10V6K
+1.5VS
0.1U_0402_10V6K
1
1
2
C515
C580
2
0.1U_0402_10V6K
1
C633
2
1
C639
1
C638
1
1
C617
2
2
2
0.1U_0402_10V6K
0.1U_0402_10V6K
2
C618
1
C602
1
2
2
0.1U_0402_10V6K
C601
1
1
C605
C568
2
2
0.1U_0402_10V6K
1
C498
1
C569
1
C610
1
C585
1
C619
1
C609
1
C514
C595
1
C558
2
2
2
2
2
2
2
2
2
2
@0.01U_0402_16V7Z @0.01U_0402_16V7Z @0.01U_0402_16V7Z @0.01U_0402_16V7Z @0.01U_0402_16V7Z
PIR LAYOUT 92.06.23
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
1
A
C487
47U_B_6.3VM
+
2
C523
1
C508
1
C565
1
1
2
2
2
2
0.1U_0402_10V6K
0.1U_0402_10V6K
C548
C564
0.1U_0402_10V6K
1
2
C539
1
C554
1
2
2
0.1U_0402_10V6K
C640
1
C641
1
C628
1
C627
2
2
2
0.1U_0402_10V6K
0.1U_0402_10V6K
L
1
2
C629
1
1
C630
2
2
0.1U_0402_10V6K
C631
1
C556
1
2
2
0.1U_0402_10V6K
C571
1
C589
1
2
2
0.1U_0402_10V6K
C620
1
C608
1
A
2
2
0.1U_0402_10V6K
Note: PLACE CLOSE TO U27 (NB RC300M)
Compal Electronics, Inc.
Title
ATI RC300M-AGP, ALINK BUS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Size
Document Number
R ev
1.0
LA-2051
Date:
Friday, November 14, 2003
Sheet
1
9
of
51
5
4
3
2
1
http://laptopblue.vn
D
D
+3VS
L39
+2.5VS
+ 3VS_VDDR
1
1
1
L35
2
B14
C13
1
C537
1
+1.8VS_AVDDQ
A15
C536
B15
0.1U_0402_10V6K
C
2
2
0.1U_0402_10V6K
L38
1
2
KC FBM-L11-201209-221LMAT_0805
C577
10U_0805_10V4Z
0.1U_0402_10V6K
+1.8VS
+PLLVDD_18
1
2
C578
1
1
2
2
C586
F14
F15
E14
C8
D9
2 715 _0402_1% NB_RSET
RC300M_X1
RC300M_X2
1
16 REFCLK1_NB
1
R506
2
56_0402_5%
1
2
2
@10_0402_5%
2
C282
A4
B4
CLK_NB_BCLK
CLK_NB_BCLK#
@10_0402_5%
A5
B5
B6
A6
C634
@15P_0402_50V8J
D8
B2
@15P_0402_50V8J
16 CLK_AGP_66M
16 CLK_MEM_66M
CLK_MEM_66M
PLLVSS
B3
CLK_MEM_66M
A3
LPVDD_18
LPVSS
RED
GREEN
BLUE
DACHSYNC
DACVSYNC
LVDDR_18
LVDDR_18
RSET
LVSSR
LVSSR
XTALIN
XTALOUT
C_R
HCLKIN
HCLKIN#
SYS_FBCLKOUT
SYS_FBCLKOUT#
OUT
ST
GND
3
27M_TV 2
R497
127M_TV_R
@22_0402_5%
2
C5
@27MHZ_20P_6N
DACSCL
ALINK_CLK
DACSDA
R505
1
A12
+1.8VS_LPVDD
C
+1.8VS
1
KC FBM-L11-201209-221LMAT_0805
0.1U_0402_10V6K
1
2
L32
1
1
C576
C518
A11
LPVSS
C591
B12
C12
+1.8VS_LVDDR
2
2
0.1U_0402_10V6K
B11
C11
LVSSR
E15
TV_CRMA 17
C15
TV_LUMA 17
D15
TV_COMPS 17
C566
1
+1.8VS
KC FBM-L11-201209-221LMAT_0805
0.1U_0402_10V6K
1
2
L36
1
1
C567
C587
2
0.1U_0402_10V6K
D6
2
10U_0805_10V4Z
2
2
10U_0805_10V4Z
I NTD DCCK 18
C6
I NTD D CDA 18
AGPCLKOUT
Q45
AGPCLKIN
CPUSTOP#
D5
1
3
@2N7002_SOT23
PM_STPCPU#
PM_STPCPU# 5,16,26,47
EXT_MEM_CLK
SYSCLK
USBCLK
REF27
CLK. GEN.
SYSCLK#
A8
PCIRST# 19,20,21,22,24,25,26,34,35
B8
1
R457
OSC
2
@0_0402_5%
R588
CHS-216IGP9050A21_BGA718
R461
2
1K_0402_5%
B
+3VS
@0.1U_0402_16V7K
@10_0402_5%
4.7K_0402_5%
2
2
LCD_A0- 18
LCD_A0+ 18
LCD_A1- 18
LCD_A1+ 18
LCD_A2- 18
LCD_A2+ 18
LCD_ACLK- 18
LCD_ACLK+ 18
1
C271
@15P_0402_50V8J
D7
B7
Y_G
COMP_B
E10
D10
B9
C9
D11
E11
B10
C10
1
1
C592
VCC
1
4
1
2
2
CLK_AGP_66M
X4
@10_0402_5%
1
PLLVDD_18
TXOUT_L0N
TXOUT_L0P
TXOUT_L1N
TXOUT_L1P
TXOUT_L2N
TXOUT_L2P
TXCLK_LN
TXCLK_LP
+3VS
R271
B
AVSSQ
LCD_B0- 18
LCD_B0+ 18
LCD_B1- 18
LCD_B1+ 18
LCD_B2- 18
LCD_B2+ 18
LCD_BCLK- 18
LCD_BCLK+ 18
2
2
AVDDQ
+3VS
L
Note: PLACE CLOSE TO U27 (NB CHIP)
RC300M_X1
1
1
38 EXCLK_27M_TV
1
1
C14
R520
16 CLK_NB_BCLK
16 CLK_NB_BCLK#
1
CLK_AGP_66M
R272
AVSSDI
0.1U_0402_10V6K
18 I NTCRT_R
18 I NTCRT_G
18 I NTCRT_B
18 I NTC R T_ HSYNC
18 I NTC R T_VSYNC
R474 1
H11
G11
AVDDDI_18
D12
E12
F11
F12
D13
D14
E13
F13
S
+1.8VS_AVDDDI
2
2
L33 10_0603_5%
TXOUT_U0N
TXOUT_U0P
TXOUT_U1N
TXOUT_U1P
TXOUT_U2N
TXOUT_U2P
TXCLK_UN
TXCLK_UP
AVSSN
D
1
PART 4 OF 6
AVDD_25
SVID
0.1U_0402_10V6K
+1.8VS
B13
VDDR3
VDDR3
2
G
2
G9
H9
A14
CRT
+1.8VS
C551
0.1U_0402_10V6K
LVDS
+2.5VS_AVDD
1
KC FBM-L11-201209-221LMAT_0805
L37
1
2
1
C550
FBM-11-160808-121-T_0603
0.1U_0402_10V6K
U2 4D
2
KC FBM-L11-201209-221LMAT_0805
2
C622
R531
2
2
@1M_0402_1%
RC300M_X2
C650
2
@18P_0402_50V8K
Y5
@14.31818MHZ_20P_6X1430004201
1
C649
2
@18P_0402_50V8K
A
A
Compal Electronics, Inc.
Title
ATI RC300M-VIDEO I/F
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Size
D o c ument Number
R ev
1.0
LA-2051
Date:
Friday, November 14, 2003
1
Sheet
10
of
51
5
4
3
2
1
http://laptopblue.vn
+1.5VS
+2.5V
U24F
AA1
AA7
AA8
AC7
AC8
AD1
AD7
AD8
AK3
W8
B
VDDL_ALINK
VDDL_ALINK
VDDL_ALINK
VDDL_ALINK
VDDL_ALINK
VDDL_ALINK
VDDL_ALINK
VDDL_ALINK
VDDL_ALINK
VDDL_ALINK
MEM I/F PWR
CORE PWR
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP/VDDP33
VDDP_AGP/VDDP33
VDDP_AGP/VDDP33
AGP PWR
+3VS
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
POWER
C16
D16
D17
E16
E17
F16
F17
G17
G21
G23
G24
H16
H17
H19
H21
H24
K23
K24
M23
P23
P24
T23
T24
U23
U24
W30
CPU I/F PWR
+CPU_CORE
C
ALINK PWR
D
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
PART 5 OF 6
U24E
F10
F9
G12
H12
H13
M12
M13
M14
M17
M18
M19
N12
N13
N14
N17
N18
N19
P12
P13
P14
P17
P18
P19
U12
U13
U14
U17
U18
U19
V12
V13
V14
V17
V18
V19
W12
W13
W14
W17
W18
W19
VDD_18
VDD_18
VDD_18
VDD_18
AA23
AA27
AB30
AC10
AC12
AC13
AC15
AC17
AC19
AC21
AC23
AC24
AC25
AC27
AD10
AD12
AD13
AD15
AD17
AD19
AD21
AD23
AD24
AD25
AD27
AE10
AE14
AE15
AE19
AE20
AE30
AE9
AF27
AG11
AG12
AG17
AG18
AG23
AG24
AG26
AG8
AG9
AJ30
AK14
AK23
AK8
V23
W23
W24
W25
Y25
A29
AB23
AB24
AB27
AB4
AB8
AC1
AC11
AC14
AC16
AC20
AC30
AD11
AD14
AD16
AD20
AD4
AE27
AF30
AF5
AG10
AG13
AG16
AG19
AG22
AG25
AG7
AH28
AH3
AJ1
AK13
AK2
AK22
AK29
AK4
AK7
B1
B16
B30
C19
C23
C27
C4
D21
D25
E3
E8
E9
F27
F4
F8
G14
G15
G18
G20
H14
H15
H18
H20
H27
H4
H8
J7
+1.5VS
A2
G4
H5
H6
H7
J4
K8
L4
M7
M8
N4
P1
P7
P8
R4
T8
U4
U5
U6
E7
F7
G8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
PART 6 OF 6
GND
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
R23
R7
R8
T12
T13
T14
T15
T16
T17
T18
T19
T27
T4
U15
U16
U7
U8
V15
V16
V27
V4
V7
V8
W15
W16
W27
Y1
Y23
Y24
Y30
Y4
Y7
Y8
R19
R18
R17
R16
R15
R14
R13
R12
R1
P4
P27
P16
P15
N8
N24
N23
N16
N15
M4
M27
M16
M15
L8
L7
L25
L24
L23
K4
K27
J8
D
C
CHS-216IGP9050A21_BGA718
B
+3VS
AC22
AC9
H10
H22
+1.8VS
CHS-216IGP9050A21_BGA718
+2.5V
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C429
+1.8VS
100U_D2_10VM
0.1U_0402_10V6K
C581
10U_0805_10V4Z
1
2
C575
1
C482
2
0.1U_0402_10V6K
1
2
C481
1
2
0.1U_0402_10V6K
1
2
+
2
C505
1
C445
2
0.1U_0402_10V6K
1
2
C570
1
C462
2
0.1U_0402_10V6K
1
2
C436
1
C553
2
0.1U_0402_10V6K
1
2
C538
1
C522
2
0.1U_0402_10V6K
1
2
C461
1
C446
2
0.1U_0402_10V6K
1
2
C457
1
C437
2
0.1U_0402_10V6K
1
1
2
2
C438
0.1U_0402_10V6K
C588
0.1U_0402_10V6K
A
A
Compal Electronics, Inc.
Title
ATI RC300M-POWER
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Size
Document Number
R ev
1.0
LA-2051
Date:
Friday, November 14, 2003
Sheet
1
11
of
51
5
4
3
2
1
http://laptopblue.vn
9,26
A_AD[0..31]
A_AD[0..31]
A_CBE#[0..3]
9,26 A_CBE#[0..3]
R418 1
A_AD31
A_AD30
D
R420
1
R419
1
2
2
2 10K_0402_5%
4.7K_0402_5% 2
D44
A_AD[31..30] : FSB CLK SPEED
+3VS
4.7K_0402_5% 2
1
D45
RB751V_SOD323
R417 1
2 10K_0402_5%
1
BSEL1
5,16
DEFAULT: 01
+3VS
BSEL0
5,16
A_AD18
R537
1
2@4.7K_0402_5%
R290
1
24.7K_0402_5%
+3VS
A_AD18 : ENABLE PHASE CALIBRATION
DEFAULT: 0
00: 100 MHZ
01: 133 MHZ
10: 200MHZ
11:166 MHZ
0: DISABLE
1:ENABLE
D
RB751V_SOD323
R549 1
A_AD29
R278
1
2 10K_0402_5%
A_AD29: STRAP CONFIGURATION
+3VS
2@4.7K_0402_5%
A_AD17
R538
1
2@4.7K_0402_5%
R289
1
24.7K_0402_5%
+3VS
DEFAULT:1
R544 1
R283
1
2 @10K_0402_5%
A_AD28: SPREAD SPECTRUM ENABLE
+3VS
24.7K_0402_5%
DEFAULT:0
0: DISABLE
1: ENABLE
9,26
R548 1
A_AD27
R279
1
2 10K_0402_5%
A_AD27: FrcShortReset#
+3VS
2@4.7K_0402_5%
A_PAR
A_PAR
R288
1
2@4.7K_0402_5%
R539
1
24.7K_0402_5% +3VS
A_AD26
R280
1
2 10K_0402_5%
PAR: EXTENDED DEBUG MODE
DEFAULT : 1
0: DEBUG MODE
1: NORMAL
DEFAULT: 1
0: TEST MODE
1: NORMAL MODE
R547 1
DEFAULT: 0
00: 1.05V
01: 1.35V
11: 1.75V
10: 1.45V
0: REDUCEDE SET
1: FULL SET(internal Pull high)
A_AD28
A_AD25/A_AD17 : CPU VOLTAGE[1..0]
A_AD26 : ENABLE IOQ
+3VS
2@4.7K_0402_5%
DEFAULT: 1
C
C
0: IOQ=1
1: IOQ=12
R545 1
A_AD25
R282
1
2 10K_0402_5%
A_AD25/A_AD17 : CPU VOLTAGE[1..0]
+3VS
2@4.7K_0402_5%
DEFAULT: 10
00: 1.05V
01: 1.35V
11: 1.75V
10: 1.45V
A_AD24
R543 1
2 10K_0402_5%
AD25=1 DESTOP CPU
AD25=0 MOBILE CPU
AD17--DON'T CARE
A_AD24 : MOBILE CPU SELECT
+3VS
DEFAULT: 1
0: BANIAS CPU
1: OTHER CPU
R541 1
A_AD23
R286
1
2 10K_0402_5%
A_AD23 : CLOCK BYPASS DISABLE
+3VS
2@4.7K_0402_5%
DEFAULT: 1
0: TEST MODE
1: NORMAL(internal Pull high)
B
B
A_AD22
R284
1
2@4.7K_0402_5%
A_AD22 : OSC PAD OUTPUT PCICLK
DEFAULT : 1
0:PCICLK OUT
1: OSC CLK OUT
R542 1
A_AD21
R285
1
2 10K_0402_5%
A_AD21 : AUTO_CAL ENABLE
+3VS
2@4.7K_0402_5%
DEFAULT : 1
0: DISABLE
1: ENABLE
A_AD20
R540
1
2@4.7K_0402_5%
R287
1
24.7K_0402_5%
A_AD20 : INTERNAL CLK GEN ENABLE
+3VS
DEFAULT : 0
0: DISABLE
1: ENABLE
A_CBE#3
R546
1
2@4.7K_0402_5%
R281
1
2@4.7K_0402_5%
R536
1
2@4.7K_0402_5%
R291
1
2@4.7K_0402_5%
+3VS
A_CBE#3: NOT USED
+3VS
A_CBE#0 :NO USED
A
A
A_CBE#0
Compal Electronics, Inc.
Title
ATI RC300M-SYSTEM STRAP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Size
Document Number
R ev
1.0
LA-2051
Date:
Friday, November 14, 2003
Sheet
1
12
of
51
A
B
C
D
E
F
G
H
+2.5V
DDR_ DQ[0 ..6 3]
http://laptopblue.vn
DDR_ DQ[0 ..6 3] 8,14
+2.5V
C725
2
+ SDREF
+2.5V
D D R_ DQ7
D D R_ DQ5
0.1U_0402_10V6K
D DR_ DQS0
D D R_ DQ1
D D R_ DQ3
D D R_ DQ8
1
D D R_ DQ9
D DR_ DQS1
DDR_ DQ1 1
DDR_ DQ1 0
8
8
DDR_ CL K0
DDR_ CL K0#
DDR_ DQ2 0
DDR_ DQ2 1
D DR_ DQS2
DDR_ DQ2 3
DDR_ DQ1 8
DDR_ DQ2 8
DDR_ DQ2 6
D DR_ DQS3
DDR_ DQ2 7
DDR_ DQ3 1
2
DDR_ DQ[0 ..6 3]
DDR_ DQS[0 ..7 ]
DDR_ DQ[0 ..6 3] 8 ,14
DDR_ DQS[0 ..7 ] 8 ,14
R592
8 ,14
1
DDR_ SCKE1
2
10_0402_5%
DDR_ DM[0 .. 7]
DDR_ SMA[ 0..12]
DDR_ DQS[0 ..7 ]
JP17
1
DDR_ DM[0 ..7] 8 ,14
DDR_ S MA12
DDR_ S MA9
DDR_ S MA7
DDR_ S MA5
DDR_ S MA3
DDR_ S MA1
DDR_ SMA[0..12] 8
8 ,14 DDR_ SCS# 0
8
10_0402_5%
R594
1
2
DDR_ SMA15
DDR_ S MA10
DDR_ SB S0
D DR_ SWE#
DDR_ S MA15
DDR_ DQ3 2
DDR_ DQ3 4
D DR_ DQS4
DDR_ DQ3 9
DDR_ DQ3 7
DDR_ DQ4 1
DDR_ DQ4 4
D DR_ DQS5
3
DDR_ DQ4 7
DDR_ DQ4 3
DDR_ DQ4 8
DDR_ DQ4 9
D DR_ DQS6
DDR_ DQ5 4
DDR_ DQ5 5
DDR_ DQ6 1
DDR_ DQ6 3
D DR_ DQS7
DDR_ DQ6 2
DDR_ DQ5 7
14,16,27 SMDATA
14,16,27 SMCLK
+3VS
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
VREF
VSS
DQ0
DQ1
VDD
DQS0
DQ2
VSS
DQ3
DQ8
VDD
DQ9
DQS1
VSS
DQ10
DQ11
VDD
CK0
CK0#
VSS
DQ16
DQ17
VDD
DQS2
DQ18
VSS
DQ19
DQ24
VDD
DQ25
DQS3
VSS
DQ26
DQ27
VDD
CB0
CB1
VSS
DQS8
CB2
VDD
CB3
DU
VSS
CK2
CK2#
VDD
CKE1
DU/A13
A12
A9
VSS
A7
A5
A3
A1
VDD
A10/AP
BA0
WE#
S0#
DU
VSS
DQ32
DQ33
VDD
DQS4
DQ34
VSS
DQ35
DQ40
VDD
DQ41
DQS5
VSS
DQ42
DQ43
VDD
VDD
VSS
VSS
DQ48
DQ49
VDD
DQS6
DQ50
VSS
DQ51
DQ56
VDD
DQ57
DQS7
VSS
DQ58
DQ59
VDD
SDA
SCL
VDD_SPD
VDD_ID
VREF
VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7
DQ12
VDD
DQ13
DM1
VSS
DQ14
DQ15
VDD
VDD
VSS
VSS
DQ20
DQ21
VDD
DM2
DQ22
VSS
DQ23
DQ28
VDD
DQ29
DM3
VSS
DQ30
DQ31
VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7
DU/RESET#
VSS
VSS
VDD
VDD
CKE0
DU/BA2
A11
A8
VSS
A6
A4
A2
A0
VDD
BA1
RAS#
CAS#
S1#
DU
VSS
DQ36
DQ37
VDD
DM4
DQ38
VSS
DQ39
DQ44
VDD
DQ45
DM5
VSS
DQ46
DQ47
VDD
CK1#
CK1
VSS
DQ52
DQ53
VDD
DM6
DQ54
VSS
DQ55
DQ60
VDD
DQ61
DM7
VSS
DQ62
DQ63
VDD
SA0
SA1
SA2
DU
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
+ SDREF
D D R_ DQ6
D D R_ DQ0
DDR_ DM[0 .. 7]
D DR_ DM0
D D R_ DQ4
C679
0.1U_0402_10V6K
2
DDR_ DQS[0 ..7 ] 8 ,14
DDR_ DM[0 ..7 ] 8 ,14
DDR_ SMAA[ 0..12]
1
DDR_ S MAA15
DDR_ SMAA[0..12] 14
DDR_ SMAA15 14
D D R_ DQ2
DDR_ DQ1 2
1
DDR_ DQ1 3
D DR_ DM1
DDR_ DQ1 5
DDR_ DQ1 4
8
8
10_1206_8P4R_5%
DDR_ S MA15 5
4
D DR_ SWE#
6
3
DDR_ SB S0
7
2
DDR_ S MA10 8
1
D DR_ SWE#
DDR_ SBS0
DDR_ S MAA15
DDR_ S MAA10
D D R _ WE# 14
D DR_ BS0 14
RP1 9
10_1206_8P4R_5%
DDR_ S MA1
5
4
DDR_ S MA3
6
3
DDR_ S MA5
7
2
DDR_ S MA7
8
1
DDR_ DQ1 6
DDR_ DQ1 7
D DR_ DM2
DDR_ DQ2 2
DDR_ S MAA1
DDR_ S MAA3
DDR_ S MAA5
DDR_ S MAA7
RP2 7
DDR_ DQ1 9
DDR_ DQ2 4
DDR_ S MA9
2
R234
DDR_ DQ2 5
D DR_ DM3
DDR_ S MAA9
1
10_0402_5%
DDR_ DQ2 9
DDR_ DQ3 0
DDR_ S MA12 2
R239
8
8
8
R593
1
2
10_0402_5%
DDR_ S MA6
DDR_ S MA4
DDR_ S MA2
DDR_ S MA0
DDR_ SB S1
DDR_ SRAS#
DDR_ SCAS#
1
10_1206_8P4R_5%
DDR_ SCAS#
5
4
DDR_ SRAS#
6
3
DDR_ SB S1
7
2
DDR_ S MA0
8
1
DDR_ SCAS#
DDR_ SRAS#
DDR_ SBS1
DDR_ S MA11
DDR_ S MA8
DDR_ S MAA12
1
10_0402_5%
RP1 8
D DR_ SCKE0 8,14
10_1206_8P4R_5%
DDR_ S MA2
5
DDR_ S MA4
6
DDR_ S MA6
7
DDR_ S MA8
8
DDR_ S MAA0
DDR_ S MAA2
DDR_ S MAA4
DDR_ S MAA6
DDR_ S MAA8
4
3
2
1
RP2 8
DDR_ S MA11 2
R238
2
D DR_ CAS# 14
D DR_ RAS# 14
D DR_ BS1 14
DDR_ S MAA11
1
10_0402_5%
R595
2
10_0402_5%
DDR_ SCS# 1 8 ,14
DDR_ DQ3 3
DDR_ DQ3 6
D DR_ DM4
DDR_ DQ3 5
DDR_ DQ3 8
DDR_ DQ4 0
DDR_ DQ4 5
D DR_ DM5
3
DDR_ DQ4 2
DDR_ DQ4 6
DDR_ CL K1# 8
D DR_ CL K1 8
DDR_ DQ5 3
DDR_ DQ5 2
D DR_ DM6
DDR_ DQ5 0
Layout note
DDR_ DQ5 1
DDR_ DQ6 0
Place these resistor
close by DIMM0,
all trace length
Max=1.4"
DDR_ DQ5 6
D DR_ DM7
DDR_ DQ5 9
DDR_ DQ5 8
KLINK_5746-2-111
4
4
Layout note
Place these resistors
close to DIMM0,
all trace length<500 mil
DDR TOPOLOGY 1 FOR SMAA[0, 3, 6:12], SBA[1, 0], SRAS#, SCAS#, SWE#
Compal Electronics, Inc.
Title
DDR-SODIMM SLOT0
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
D
E
F
Size
Do cu me n t Number
Rev
1 .0
LA-2051
Fr id a y, No ve mber 14, 2003
Da te :
G
Sheet
13
H
of
51
A
B
RP37
DD R_DQ7
DD R_DQ5
D DR_DQS0
DD R_DQ1
8
7
6
5
RP91
1
2
3
4
56_0804_8P4R_5%
C
C726
+1.25VS
8
7
6
5
2
DD R_DQ6
DD R_DQ0
DDR_DM0
DD R_DQ4
1
JP20
+2.5V
0.1U_0402_10V6K
DD R_DQ7
DD R_DQ5
D DR_DQS0
DD R_DQ1
56_0804_8P4R_5%
DD R_DQ3
DD R_DQ8
1
RP35
DD R_DQ3
DD R_DQ8
DD R_DQ9
D DR_DQS1
8
7
6
5
56_0804_8P4R_5%
8
7
6
5
8
7
6
5
1
2
3
4
DD R_DQ2
D DR_DQ12
D DR_DQ13
DDR_DM1
D DR_DQ11
D DR_DQ10
8
8
56_0804_8P4R_5%
RP33
D DR_DQ11
D DR_DQ10
D DR_DQ20
D DR_DQ21
DD R_DQ9
D DR_DQS1
RP84
1
2
3
4
DDR_CLK3
DDR_CLK3#
D DR_DQ20
D DR_DQ21
RP73
1
2
3
4
56_0804_8P4R_5%
8
7
6
5
1
2
3
4
D DR_DQ15
D DR_DQ14
D DR_DQ16
D DR_DQ17
D DR_DQS2
D DR_DQ23
D DR_DQ18
D DR_DQ28
56_0804_8P4R_5%
D DR_DQ26
D DR_DQS3
RP32
D DR_DQS2
D DR_DQ23
D DR_DQ18
D DR_DQ28
8
7
6
5
D DR_DQ27
D DR_DQ31
RP71
1
2
3
4
56_0804_8P4R_5%
8
7
6
5
1
2
3
4
DDR_DM2
D DR_DQ22
D DR_DQ19
D DR_DQ24
56_0804_8P4R_5%
2
RP30
RP68
R596
D DR_DQ26
D DR_DQS3
D DR_DQ27
D DR_DQ31
8
7
6
5
1
2
3
4
56_0804_8P4R_5%
8
7
6
5
8
7
6
5
D DR_DQ25
DDR_DM3
D DR_DQ29
D DR_DQ30
8
DDR_SCKE3
DDR_SCKE3
1
56_0804_8P4R_5%
8
7
6
5
DDR_CKE3
DDR_SMAA12
DDR_SMAA9
DDR_SMAA7
DDR_SMAA5
DDR_SMAA3
DDR_SMAA1
RP58
1
2
3
4
2
10_0402_5%
56_0804_8P4R_5%
RP15
D DR_DQ32
D DR_DQ34
D DR_DQS4
D DR_DQ39
1
2
3
4
1
2
3
4
D DR_DQ33
D DR_DQ36
DDR_DM4
D DR_DQ35
8
DDR_SCS#2
13
DDR_BS0
13
DDR_W E#
DDR_SCS#2 1
13
DDR_SMAA15
DDR_SMAA10
DDR_BS0
DDR_W E#
2R598 DDR_CS#2
DDR_SMAA15
10_0402_5%
D DR_DQ32
D DR_DQ34
56_0804_8P4R_5%
D DR_DQS4
D DR_DQ39
RP13
3
D DR_DQ37
D DR_DQ41
D DR_DQ44
D DR_DQS5
8
7
6
5
56_0804_8P4R_5%
8
7
6
5
8
7
6
5
1
2
3
4
D DR_DQ38
D DR_DQ40
D DR_DQ45
DDR_DM5
D DR_DQ44
D DR_DQS5
D DR_DQ47
D DR_DQ43
56_0804_8P4R_5%
RP11
D DR_DQ47
D DR_DQ43
D DR_DQ48
D DR_DQ49
D DR_DQ37
D DR_DQ41
RP55
1
2
3
4
RP52
1
2
3
4
56_0804_8P4R_5%
8
7
6
5
1
2
3
4
D DR_DQ42
D DR_DQ46
D DR_DQ53
D DR_DQ52
56_0804_8P4R_5%
Layout note
Place these resistor
closely DIMM1,
all trace
length<=800mil
D DR_DQ48
D DR_DQ49
D DR_DQS6
D DR_DQ54
D DR_DQ55
D DR_DQ61
D DR_DQ63
D DR_DQS7
RP7
D DR_DQS6
D DR_DQ54
D DR_DQ55
D DR_DQ61
8
7
6
5
D DR_DQ62
D DR_DQ57
RP42
1
2
3
4
56_0804_8P4R_5%
8
7
6
5
1
2
3
4
E
http://laptopblue.vn
+SDREF
1
2
3
4
D
+2.5V
+2.5V
DDR_DM6
D DR_DQ50
D DR_DQ51
D DR_DQ60
13,16,27 SMDATA
13,16,27 SMCLK
+3VS
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
VREF
VSS
DQ0
DQ1
VDD
DQS0
DQ2
VSS
DQ3
DQ8
VDD
DQ9
DQS1
VSS
DQ10
DQ11
VDD
CK0
CK0#
VSS
VREF
VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7
DQ12
VDD
DQ13
DM1
VSS
DQ14
DQ15
VDD
VDD
VSS
VSS
DQ16
DQ17
VDD
DQS2
DQ18
VSS
DQ19
DQ24
VDD
DQ25
DQS3
VSS
DQ26
DQ27
VDD
CB0
CB1
VSS
DQS8
CB2
VDD
CB3
DU
VSS
CK2
CK2#
VDD
CKE1
DU/A13
A12
A9
VSS
A7
A5
A3
A1
VDD
A10/AP
BA0
WE#
S0#
DU
VSS
DQ32
DQ33
VDD
DQS4
DQ34
VSS
DQ35
DQ40
VDD
DQ41
DQS5
VSS
DQ42
DQ43
VDD
VDD
VSS
VSS
DQ48
DQ49
VDD
DQS6
DQ50
VSS
DQ51
DQ56
VDD
DQ57
DQS7
VSS
DQ58
DQ59
VDD
SDA
SCL
VDD_SPD
VDD_ID
DQ20
DQ21
VDD
DM2
DQ22
VSS
DQ23
DQ28
VDD
DQ29
DM3
VSS
DQ30
DQ31
VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7
DU/RESET#
VSS
VSS
VDD
VDD
CKE0
DU/BA2
A11
A8
VSS
A6
A4
A2
A0
VDD
BA1
RAS#
CAS#
S1#
DU
VSS
DQ36
DQ37
VDD
DM4
DQ38
VSS
DQ39
DQ44
VDD
DQ45
DM5
VSS
DQ46
DQ47
VDD
CK1#
CK1
VSS
DQ52
DQ53
VDD
DM6
DQ54
VSS
DQ55
DQ60
VDD
DQ61
DM7
VSS
DQ62
DQ63
VDD
SA0
SA1
SA2
DU
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
+SDREF
DD R_DQ6
DD R_DQ0
DDR_DM0
DD R_DQ4
1
DD R_DQ2
D DR_DQ12
2
C672
0.1U_0402_10V6K
D DR_DQ13
DDR_DM1
1
D DR_DQ15
D DR_DQ14
D DR_DQ16
D DR_DQ17
DDR_DM2
D DR_DQ22
D DR_DQ19
D DR_DQ24
+1.25VS
D DR_DQ25
DDR_DM3
RP24
DDR_SMAA9
DDR_SMAA7
DDR_SMAA5
DDR_SMAA3
D DR_DQ29
D DR_DQ30
8
7
6
5
RP62
1
2
3
4
33_0804_8P4R_5%
8
7
6
5
56_0804_8P4R_5%
8
7
6
5
8
7
6
5
DDR_SMAA4
DDR_SMAA2
DDR_SMAA0
DDR_BS1
R597
DDR_CKE2
1
DDR_SMAA11
DDR_SMAA8
2DDR_SCKE2
DDR_SMAA6
DDR_SMAA4
DDR_SMAA2
DDR_SMAA0
DDR_BS1
DDR_RAS#
DDR_CAS#
DDR_CS#31
R599
DDR_SCKE2 8
33_0804_8P4R_5%
RP20
8,13 DDR_SCS#1
8,13 DDR_SCS#0
2
10_0402_5%
DDR_BS1 13
DDR_RAS# 13
DDR_CAS# 13
DDR_SCS#3
DDR_SCS#2
DDR_SMAA15
8
7
6
5
RP60
1
2
3
4
33_0804_8P4R_5%
8
7
6
5
DDR_RAS#
DDR_CAS#
DDR_SCS#3
1
2
3
4
33_0804_8P4R_5%
DDR_SCS#3 8
D DR_DQ33
D DR_DQ36
DDR_DM4
D DR_DQ35
33_0804_8P4R_5%
10_0402_5%
RP25
8,13 DDR_SCKE0
8,13 DDR_SCKE1
D DR_DQ38
D DR_DQ40
DDR_SCKE3
DDR_SMAA12
8
7
6
5
1
2
3
4
33_0804_8P4R_5%
D DR_DQ45
DDR_DM5
3
D DR_DQ42
D DR_DQ46
DDR_CLK4# 8
DDR_CLK4 8
D DR_DQ53
D DR_DQ52
DDR_DM6
D DR_DQ50
DD R_DQS[0..7]
DDR_DQS[0..7] 8,13
DD R_DQ[0..63]
D DR_DQ51
D DR_DQ60
DDR_DQ[0..63] 8,13
D DR_DM[0..7]
DDR_DM[0..7] 8,13
D DR_DQ56
DDR_DM7
DDR_SMAA[0..12]
D DR_DQ59
D DR_DQ58
DDR_SMAA[0..12] 13
+3VS
Layout note
Place these resistor
close by DIMM1,
all trace length
Max=0.8"
RP41
1
2
3
4
1
2
3
4
RP61
1
2
3
4
DDR-SODIMM_200_STD_H4.0
8
7
6
5
DDR_SCKE2
DDR_SMAA11
DDR_SMAA8
DDR_SMAA6
2
DDR_SMAA1
DDR_SMAA10
DDR_BS0
DDR_W E#
4
D DR_DQ63
D DR_DQS7
D DR_DQ62
D DR_DQ57
1
2
3
4
33_0804_8P4R_5%
RP23
56_0804_8P4R_5%
RP6
8
7
6
5
1
2
3
4
D DR_DQ56
DDR_DM7
D DR_DQ59
D DR_DQ58
4
DDR TOPOLOGY 1 FOR SMAA[0, 3, 6:12], SBA[1, 0], SRAS#, SCAS#, SWE#
Compal Electronics, Inc.
56_0804_8P4R_5%
Title
DDR-SODIMM SLOT1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
D
Size
Document Number
R ev
1.0
LA-2051
Date:
Friday, November 14, 2003
Sheet
E
14
of
51
A
B
Layout note :
C
D
http://laptopblue.vn
Distribute as close as possible
to DDR-SODIMM1.
Distribute as close as possible
to DDR-SODIMM0.
+2.5V
+2.5V
1
1
1
+
E
Layout note :
1
C686
220U_D2_4VM
2
1
C289
0.1U_0402_10V6K
2
1
C146
0.1U_0402_10V6K
2
1
C291
0.1U_0402_10V6K
2
1
C122
0.1U_0402_10V6K
2
1
C246
0.1U_0402_10V6K
2
1
C170
0.1U_0402_10V6K
2
1
C191
0.1U_0402_10V6K
2
+
C150
0.1U_0402_10V6K
1
C92
220U_D2_4VM
2
1
C139
0.1U_0402_10V6K
2
1
C151
0.1U_0402_10V6K
2
1
C274
0.1U_0402_10V6K
2
1
C111
0.1U_0402_10V6K
2
1
C165
0.1U_0402_10V6K
2
1
C245
0.1U_0402_10V6K
2
1
C171
0.1U_0402_10V6K
2
C292
0.1U_0402_10V6K 1
2
2
1
2
1
1
C227
0.1U_0402_10V6K
1
C184
0.1U_0402_10V6K
2
1
C136
0.1U_0402_10V6K
2
1
C248
0.1U_0402_10V6K
2
1
C174
0.1U_0402_10V6K
2
1
C266
0.1U_0402_10V6K
2
1
C106
0.1U_0402_10V6K
2
1
C258
0.1U_0402_10V6K
2
1
C265
0.1U_0402_10V6K
+
C93
220U_D2_4VM
220U_D2_4VM
2
2
1
C113
0.1U_0402_10V6K
2
1
C277
0.1U_0402_10V6K
2
1
C247
0.1U_0402_10V6K
2
1
C137
0.1U_0402_10V6K
2
1
C226
0.1U_0402_10V6K
2
1
C185
0.1U_0402_10V6K
2
1
C261
0.1U_0402_10V6K
2
1
C290
0.1U_0402_10V6K
2
C176
0.1U_0402_10V6K
Layout note :
1
C322
+
2
for EMI solution
2
+2.5V
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
Layout note :
Place one cap close to every 2 pull up resistors termination to
+1.25VS
2
C714
2
1000P_0402_50V7K
1
C283
0.1U_0402_10V6K
2
1
C426
0.1U_0402_10V6K
2
1
C228
0.1U_0402_10V6K
2
1
C255
0.1U_0402_10V6K
2
1
C263
0.1U_0402_10V6K
C715
1
C716
1
C717
1
C718
1
C719
1
C720
1
C721
1
C722
1
2
+1.25VS
1
1
2
1
C132
0.1U_0402_10V6K
2
1
C156
0.1U_0402_10V6K
2
1
C625
0.1U_0402_10V6K
2
2
2
1000P_0402_50V7K
1
C281
0.1U_0402_10V6K
2
2
2
1000P_0402_50V7K
2
2
2
2
2
1000P_0402_50V7K
C434
0.1U_0402_10V6K
1000P_0402_50V7K
+1.25VS
1
2
1
C425
0.1U_0402_10V6K
2
1
C671
0.1U_0402_10V6K
2
1
C606
0.1U_0402_10V6K
2
1
C456
0.1U_0402_10V6K
2
1
C287
0.1U_0402_10V6K
2
1
C474
0.1U_0402_10V6K
2
1
C483
0.1U_0402_10V6K
2
1
C635
0.1U_0402_10V6K
2
1
C449
0.1U_0402_10V6K
2
C510
0.1U_0402_10V6K
+1.25VS
1
3
2
1
C197
0.1U_0402_10V6K
2
1
C662
0.1U_0402_10V6K
2
1
C276
0.1U_0402_10V6K
2
1
C149
0.1U_0402_10V6K
2
1
C209
0.1U_0402_10V6K
2
C424
0.1U_0402_10V6K
3
+1.25VS
1
2
1
C208
0.1U_0402_10V6K
2
1
C169
0.1U_0402_10V6K
2
1
C177
0.1U_0402_10V6K
2
1
C220
0.1U_0402_10V6K
2
1
C249
0.1U_0402_10V6K
2
1
C440
0.1U_0402_10V6K
2
1
C616
0.1U_0402_10V6K
2
1
C219
0.1U_0402_10V6K
2
1
C664
0.1U_0402_10V6K
2
C642
0.1U_0402_10V6K
+1.25VS
1
2
1
C294
0.1U_0402_10V6K
2
1
C244
0.1U_0402_10V6K
2
1
C183
0.1U_0402_10V6K
2
1
C187
0.1U_0402_10V6K
2
1
C126
0.1U_0402_10V6K
2
1
C427
0.1U_0402_10V6K
2
1
C120
0.1U_0402_10V6K
2
1
C270
0.1U_0402_10V6K
2
1
C115
0.1U_0402_10V6K
2
C439
0.1U_0402_10V6K
+1.25VS
4
1
2
1
C428
0.1U_0402_10V6K
2
1
C225
0.1U_0402_10V6K
2
1
C535
0.1U_0402_10V6K
2
1
C194
0.1U_0402_10V6K
2
4
1
C497
0.1U_0402_10V6K
2
C528
0.1U_0402_10V6K
Compal Electronics, Inc.
Title
DDR SODIMM Decoupling
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
D
Size
Document Number
R ev
1.0
LA-2051
Date:
Sheet
Friday, November 14, 2003
E
15
of
51
A
B
C
D
E
F
G
H
CLK_BCLK
R158
1
2@0_0402_5%
CLK_CPU_ITP 5
CLK_BCLK#
R152
1
2@0_0402_5%
CLK_CPU_ITP# 5
http://laptopblue.vn
+3V_CLK
+3VS
L7
1
0.1U_0402_10V6K
2
HB-1M2012-121JT03_0805
Width=40C145
mils
1
C141
2
10U_0805_10V4Z
1
2
0.1U_0402_10V6K
C118
1
C95
2
0.1U_0402_10V6K
1
C105
2
1
C89
2
0.1U_0402_10V6K
1
2
0.1U_0402_10V6K
1
1
R146 @10_0402_5%
2
10P_0402_50V8K
XTALIN_CLK
2
1
1
U16
6
Y2
VDDCPU
VDDSD
VDDAGP
VDD48M
VDDPCI
VDDPCI
VDDREF
VDDXTAL
C116
1
1
38 EXCLK_CLKGEN
42
48
30
29
19
13
1
9
+3VS_VDDA
XIN
VDDA
C104
R577
10K_0402_5%
2
2
1
1
+3VS
XTALOUT_CLK
2
14.31818MHZ_20P_6X1430004201
10P_0402_50V8K
7
CPUT0
35
34
13,14,27 SMCLK
13,14,27 SMDATA
R578
10K_0402_5%
VSSA
XOUT
SCLK
SDATA
CPUC0
5,10,26,47 PM_STPCPU#
26 PCI_STP#
2
@0_0402_5%
2
2
R580
@0_0402_5%
CPUT1
2
2
17,27 VTT_PWRGD
R579
1
1
VTT_PWRGD
PCI33/66#
10
45
12
26
11
VTTPWRGD/PD#
CPU_STP#
PCI_STOP#
24/48#SEL
PCI33/66#SEL
CPUC1
CLK_SB_48M
R109 1
2 33_0402_5%
32 CLK_AUDIO_14M
10 REFCLK1_NB
34 CLK_SIO_14M
27 CLK_SB_14M
R159 1
R161 1
R165 1
R174 1
2 @33_0402_5%
2 68_0402_5%
2 33_0402_5%
2 33_0402_5%
27
R173 1
26 CLK_14M_APIC
1
1
C99
C90
L4
1
2
+3VS
CHB2012U121_0805
0.1U_0402_10V6K
1
C138
1
1
2
2
C110
R150
@1M_0402_5%
1
C112
+3VS_VDDA
36
CLK_48M
FS2
FS1
FS0
27
28
4
3
2
SDRAMOUT
48MHz_1
48MHz_0
AGPCLK0
AGPCLK1
FS3/PCICLK_F0
FS4/PCICLK_F1
FS2/REF2
FS1/REF1
FS0/REF0
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
2 @33_0402_5%
38
IREF
2
C LK_IREF
R144
CLK_BCLK
40
R148 1
0.1U_0402_10V6K
2 33_0402_5%
CLK_CPU_BCLK 4
R147 1
2 49.9_0402_1%
R139 1
2 49.9_0402_1%
39
CLK_BCLK#
R142 1
2 33_0402_5%
44
CLK_NB
R164 1
2 33_0402_5%
CLK_CPU_BCLK# 4
CLK_NB_BCLK 10
R163 1
2 49.9_0402_1%
R155 1
2 49.9_0402_1%
2
43
CLK_NB#
R156 1
2 33_0402_5%
CLK_NB_BCLK# 10
47
MEM_66M
R168 1
2 33_0402_5%
CLK_MEM_66M 10
32
31
AGP_66M
R125 1
2 33_0402_5%
CLK_AGP_66M 10
14
15
FS3
FS4
R115 1
2 33_0402_5%
CLK_ALINK_SB 26
16
17
20
21
22
23
8
5
18
24
25
33
46
41
1
GNDXTAL
GNDREF
GNDPCI
GNDPCI
GND48M
GNDAGP
GNDSD
GNDCPU
475_0402_1%
0.1U_0402_10V6K
0.1U_0402_10V6K
2
2
2
VSSA
10U_0805_10V4Z
37
ICS951402AGT_TSSOP48
3
3
CLOCK FREQUENCY SELECT TABLE
*
R160
Spreaf OFF OR
Center spread +/-0.3%
FS1
FS0
FS2
FS3
FS4
PCI33/66#
+3V_CLK
R172
R167
10K_0402_5%
Note: 0 = PULL LOW
1 = PULL HIGH
4
R169
5,12
BSEL1
D20
1
2 RB751V_SOD323
5,12
BSEL0
D21
1
2 RB751V_SOD323
2
2
2
10K_0402_5%
2
10K_0402_5%
1
1
1
+3VS
1
1
+3VS
R124
1
R120
@10K_0402_5% @10K_0402_5%
@10K_0402_5%
R127
2
1 00
10K_0402_5%
1
1 33
1 00
R171
R166
R170
R153
R121
R123
R133
10K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
@10K_0402_5%
2
1 33
0
1
1
0
2
0
0
1
0
0
2
0
0
1
0
+3V_CLK
2
2 00
1
2 00
2
0
1
1
2
0
1
0
2
0
With Spread Enabled…
1
MEM
2
CPU
2
**
FS4 FS3 FS2 FS1 FS0
4
A-LINK FREQ
**
PCI33/66# = HIGH
66MHZ
PCI33/66# = LOW
33MHZ
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
D
E
F
Clock Generator
Size
Document Number
R ev
1.0
LA-2051
Date:
Friday, November 14, 2003
G
Sheet
16
H
of
51
A
B
C
D
E
F
G
H
http://laptopblue.vn
+3VS
SN74LVC32APWLE_TSSOP14
1
R413
+3VALW
+3VALW
1
14
C87
1
I
O
6
9
I
O
G
0.47U_0603_16V7K 5
U12C
R97
8
1
2 47_0603_5%
SB_PWRGD 27
1
P
R122
1
2
330K_0402_5%
7
4
O
U12B
P
14
I
2
U12D
R106
SN74LVC14APWLE_TSSOP14
@10K_0402_5%
2
SN74LVC14APWLE_TSSOP14
SN74LVC14APWLE_TSSOP14
SN74LVC14APWLE_TSSOP14
2
1K_0402_5%
3
G
2
U12A
7
O
1
2
2
0.1U_0402_16V7K
I
G
1
C103
G
1
2
330K_0402_5%
P
R128
3
R416
1M_0402_5%
14
14
U10A
O
B
7
1
R415
A
P
14
2
P
1
G
2
0_0402_5%
7
1
1
VGATE
+3VALW
VTT_PWRGD 16,27
2
R581
47
+3VALW
+3VALW
10K_0402_5%
7
1
1
+2.5VS
R149
2
1K_0402_5%
1
1
NB_PW RGD 7
D
Q19
2N7002_SOT23
R143
47K_0402_5%
S
2
3
2
G
2
2
1
1
TV-OUT CONN.
3
C360 1
10
TV_LUMA
L23
1
LUMA
L22
1
CRMA
COMPS
2
CHB2012U170_0805
LUMA_1
2
2 @33P_0402_50V8J
1
2
3
4
CHB2012U170_0805
CRMA_1
2
1
2
3
4
R375
75_0402_1%
R376
75_0402_1%
1
2
2
2
R377
75_0402_1%
1
1
SUYIN_030008FR004T100ZL
1
TV_CRMA
TV_COMPS
2 @33P_0402_50V8J
JP14
C359 1
10
10
3
D32
V-PORT-0603-220 M-V05_0603
2
D31
V-PORT-0603-220 M-V05_0603
2
1
C371
100P_0402_50V8K
2
1
1
4
2
C370
2
C361
270P_0402_25V8K
C358
4
270P_0402_25V8K
100P_0402_50V8K
Title
Compal Electronics, Ltd.
CH-7011& TV-CONN.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
D
E
F
Size
Document Number
CustomLA-2051
Date:
Friday, November 14, 2003
G
R ev
1.0
Sheet
17
H
of
51
A
B
C
D
E
+CRT_VCC
http://laptopblue.vn
2
2
1
R21
2.2K_0402_5%
+CRT_VCC
CH491D_SC59 1A_6VDC_MINISMDC110
R23
10K_0402_5%
1
1
2
1
2
F1
2
2
D1
R359
2.2K_0402_5%
2
+R_CRT_VCC
+5VS
+3VS
1
1
+3VS
R357
2.2K_0402_5%
R370
10K_0402_5%
@V-PORT-0603-220 M-V05_0603
Q34
2N7002_SOT23
2
G
@V-PORT-0603-220 M-V05_0603
@V-PORT-0603-220 M-V05_0603
1
1
1
1
3
2
S
INTDDCDA 10
Q5
2
G
D
1
1
1
1
C12
0.1U_0402_16V4Z
C RT_G
10 INTCRT_B
L19 FCM2012C-800_0805
1
2
1
1
R367
R368
75_0402_1%
1
C7
8P_0402_50V8K
2
2
C9
8P_0402_50V8K
2
C11
8P_0402_50V8K
S
CRT Connector
1
L18
CHB1608B121_0603
2
1
L17
CHB1608B121_0603
2
CRT_H SYNC
U1
3
2
2
1
SUYIN_070549MR015S200ZU
H SYNC
4
Y
G
A
2
1
5
P
OE#
2
75_0402_1%
2
75_0402_1%
INTDDCCK 10
JP12
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
C RT_B
1
R369
3
2N7002_SOT23
2
L20 FCM2012C-800_0805
1
2
1
D28
2
C RT_R
10 INTCRT_G
2
3.3P_0402_50V8C
2
2
10 INTCRT_R
3.3P_0402_50V8C
2
L21 FCM2012C-800_0805
1
2
+CRT_VCC
10 INTCRT_HSYNC
D29
1
C367
1
3.3P_0402_50V8C
1
C366
D
D30
1
C365
2
SN74AHCT1G125GW_SOT353-5
R22
2
CRT_VSYNC
1
C10
27P_0402_50V8J
2
1
C13
27P_0402_50V8J
2
5
1
1
1K_0402_5%
P
OE#
1
2
A
VSYNC
4
Y
C14
100P_0402_50V8K
G
10 INTCRT_VSYNC
1
1
2
2
C8
2
C15
100P_0402_50V8K
3
U2
100P_0402_50V8K
SN74AHCT1G125GW_SOT353-5
B+
Protect for EC
+3VS
+3VS
RP39
8
7
6
5
R384
4.7K_0402_5%
2
2
+3VALW
10U_1210_35V4Z
D36
@RB751V
10K_1206_8P4R_5%
DISPOFF#
R380
RB751V_SOD323
1
C386
IB+
1000P_0402_50V7K
B+
1
1
+12VALW
2
1
1
1
S
3
Q39
DTC124EK_SC59
4
Q54
S
G
1
C391
150K_0402_5% 1000P_0402_50V7K
2
1
1
2
2
G
S
2
35
INVT_PWM
1
BR IG
3
D37
@RB751V
1K_0402_5%
IB+
D39
@RB751V
+LCDVDD
C394
0.1U_0402_16V4Z
2
10
10
LCD_A0+
LCD_A0-
10
10
LCD_A1+
LCD_A1-
10
10
LCD_A2+
LCD_A2-
10 LCD_ACLK+
10 LCD_ACLKC387
34
PID0
34
PID2
4.7U_1206_16V6K
P ID0
P ID2
JP1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
2
PWM
1K_0402_5%
R382
+LCDVDD
DISPOFF#
PWM
D ISP_OFF#
1
2
D ISP_OFF#
1K_0402_5%
LCD_B0+ 10
LCD_B0- 10
LCD_B1+ 10
LCD_B1- 10
LCD_B2+ 10
LCD_B2- 10
P ID1
P ID3
LCD_BCLK+ 10
LCD_BCLK- 10
PID1
34
PID3
34
HRS_DF23C-40DS-0.5V
4
2N7002_SOT23
E NVDD 2
SI2302DS: N CHANNEL
VGS: 4.5V, RDS: 85 mOHM
VGS: 2.5V, RDS: 115mOHM
Id(MAX): 2.8A
VGS(MAX): +-8V
3
ENVDD
D
3
1 2
R386
100K_0402_5%
2
G
3
2
R391
Q38 D
2N7002_SOT23
1
2
100_0402_5%
9
+LCDVDD
1
1
100K_0402_5%
CHB2012U170_0805
2
2
CHB2012U170_0805
BR IG
Q37
SI2302DS_SOT23
R379
L25
1
1
L24
C378
4.7U_1206_16V6K
D
2
+12VALW
R389
DAC_BRIG
2
R381
+3V
+LCDVDD
35
1
2
2
1
2
2
1
BKOFF#
2
2
35
0.1U_0603_50V4Z
C376
1
D38
3
1
2
3
4
1
1
1
C373
P ID0
P ID1
P ID2
P ID3
1
Title
Compal Electronics, Ltd.
CRT& LVDS CONN.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
D
Size
Document Number
CustomLA-2051
Date:
R ev
1.0
Sheet
Friday, November 14, 2003
E
18
of
51
A
B
C
D
E
http://laptopblue.vn
+3VS
1
R568
1
R571
1
R572
1
R556
2
R557
+3VS
CYCLEOUT/CARDBUS
CNA
TEST17
TEST16
87
CYCLEIN
CPS
106
NC/(TPBIAS1)
NC/(TPA1+)
NC/(TPA1-)
NC/(TPB1+)
NC/(TPB1-)
125
124
123
122
121
BIAS CURRENT
R0
OSCILLATOR
118
R1
119
X0
6
8
7
6
5
89
90
SCL_1394
SDA_1394
GPIO3
GPIO2
2
C316
0.1U_0402_16V4Z
1
2
C324
0.1U_0402_16V4Z
1
2
1
C325
0.1U_0402_16V4Z
2
1
C332
0.1U_0402_16V4Z
2
C334
0.1U_0402_16V4Z
+3VS
2
+1394_PLLVDD
+3VS
C347
1000P_0402_50V7K
2
1
C348
1000P_0402_50V7K
2
1
C346
1000P_0402_50V7K
2
1
C319
1000P_0402_50V7K
2
C335
1000P_0402_50V7K
L16
BLM21A601SPT_0805
0.01U_0402_16V7K
1
2
+3VS
1
1
C312
C306
2
1
R334
1
1
2
4.7U_0805_10V4Z
2
1K_0402_5%
2
1
2
R317
6.34K_0402_1%
C313 1
2 22P_0402_50V8J
3
FILTER1
4
C314 1
C682 1
EEPROM 2 WIRE BUS SDA
92
SDA_1394
SCL
91
SCL_1394
PC0
PC1
PC2
99
98
97
POWER CLASS
PHY PORT 1
TPBIAS0
TPA0+
TPA0TPB0 +
TPB0 -
2 22P_0402_50V8J
2
R311
0.1U_0402_16V4Z
1
2
R322
56.2_0402_1%
TPBIAS0
TPA0+
TPA0TPB0+
TPB0-
116
115
114
113
112
1
1
2
C315
1
101
102
104
105
2
C690
0.33U_0603_16V4Z
R325
56.2_0402_1%
4
3
2
1
JP23
3
SANTA_360302
R328
56.2_0402_1%
2
94
95
TEST3
TEST2
TEST1
TEST0
1
R563
56.2_0402_1%
4
3
2
1
2
TEST9
TEST8
EXCLK_1394 38
@10_0402_5%
1
5
2
X1
FILTER0
1
FILTER
CLK_PCI_1394
4
0.1U_0402_16V4Z
X2
24.576MHz_16P_3XG-24576-43E1
8
9
109
110
111
117
126
127
128
17
23
30
33
44
55
64
68
75
83
93
103
220_1206_8P4R_5%
1
C310
1
1
2
3
4
2
+3VS
1
G_RST
15
27
39
51
59
72
88
100
7
1
2
107
108
120
TSB43AB21A
/(TSB43AB22)
PCI BUS INTERFACE
14
0.1U_0402_16V4Z
1
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
PLLVDD
AVDD
AVDD
AVDD
AVDD
AVDD
PLLGND1
REG_EN
AGND
AGND
AGND
AGND
AGND
AGND
AGND
DGND
DGND
REG18
DGND
DGND
DGND
DGND
DGND
DGND
DGND
REG18
DGND
RP92
1
C311
1
TSB43AB21A_PQFP128
2
C326
R330
5.11K_0402_1%
220P_0402_50V7K
2
PCIRST#
2
1
3
20,22,24,25,26 PCI_FRAME#
20,22,24,25,26 PCI_IRDY#
20,22,24,25,26 PCI_TRDY#
20,22,24,25,26 PCI_DEVSEL#
20,22,24,25,26 PCI_STOP#
20,22,24,25,26 PCI_PERR#
9,20,24,26 PCI_PIRQA#
20,22,24,25,35 1394_PME#
20,22,24,25,26 PCI_SERR#
20,22,24,25,26 PCI_PAR
20,22,24,25,26,34,35 PM_CLKRUN#
10,20,21,22,24,25,26,34,35 PCIRST#
0.1U_0402_16V4Z
2
2 1394_IDSEL
100_0402_5%
20,22,24,25,26 PCI_C/BE#3
20,22,24,25,26 PCI_C/BE#2
20,22,24,25,26 PCI_C/BE#1
20,22,24,25,26 PCI_C/BE#0
26 CLK_PCI_1394
26
PCI_GNT#0
26
PCI_REQ#0
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_C/BE3
PCI_C/BE2
PCI_C/BE1
PCI_C/BE0
PCI_CLK
PCI_GNT
PCI_REQ
PCI_IDSEL
PCI_FRAME
PCI_IRDY
PCI_TRDY
PCI_DEVSEL
PCI_STOP
PCI_PERR
PCI_INTA/CINT
PCI_PME/CSTSCHG
PCI_SERR
PCI_PAR
PCI_CLKRUN
PCI_RST
1
C678
2
1
R324
84
82
81
80
79
77
76
74
71
70
69
67
66
65
63
61
46
45
43
42
41
40
38
37
32
31
29
28
26
25
24
22
34
47
60
73
16
18
19
36
49
50
52
53
54
56
13
21
57
58
12
85
2
1
IDSEL:PCI_AD16
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0
CLK_PCI_1394
PCI_GNT#0
PCI_REQ#0
1394_IDSEL
PCI_FRAME#
PCI_ IRDY#
PC I_TRDY#
PCI_DEVSEL#
PCI_STOP#
PCI_PERR#
PCI_PIRQA#
1394_PME#
PCI_SERR#
PCI_PAR
VDDP
VDDP
VDDP
VDDP
VDDP
U29
2
PCI_AD16
20
35
48
62
78
PCI_AD[0..31]
20,22,24,25,26,29 PCI_AD[0..31]
1
86
96
10
11
1
+3VS
2
4.7K_0402_5%
2
10K_0402_5%
2
4.7K_0402_5%
2
4.7K_0402_5%
1
4.7K_0402_5%
C698
0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
4
2
R309
10_0402_5%
1
2
C305
Compal Electronics, Inc.
Title
10P_0402_50V8K
TI 1394 Controller TSB43AB21A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
D
Size
Document Number
Custom LA-2051
Date:
Friday, November 14, 2003
R ev
1.0
Sheet
E
19
of
51
5
4
3
2
1
http://laptopblue.vn
CARD BUS
AD20 REQ#2/GNT#2 PCI_PIRQA#
+3V
D
+3V
D
+S1_VCC
0.1U_0402_16V4Z
1
1
1
C284
4.7U_0805_10V4Z
C307
1
1
1
2
C285
0.1U_0402_16V4Z
2
C280
C278
0.1U_0402_16V4Z 0.1U_0402_16V4Z
2
2
+3V
1
C231
0.1U_0402_16V4Z
1
1
C257
2
2
0.1U_0402_16V4Z
C272
0.1U_0402_16V4Z
1
1
C288
2
2
0.1U_0402_16V4Z
C308
2
2
0.1U_0402_16V4Z
C254
0.1U_0402_16V4Z
2
+3V
VPPD0
VPPD1
VCCD0#
VCCD1#
1
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
C
3
4
5
7
8
9
10
11
15
16
17
19
23
24
25
26
38
39
40
41
43
45
46
47
49
51
52
53
54
55
56
57
19,22,24,25,26 PCI_C/BE#3
19,22,24,25,26 PCI_C/BE#2
19,22,24,25,26 PCI_C/BE#1
19,22,24,25,26 PCI_C/BE#0
12
27
37
48
10,19,21,22,24,25,26,34,35 PCIRST#
19,22,24,25,26 PCI_FRAME#
19,22,24,25,26 PCI_IRDY#
19,22,24,25,26 PCI_TRDY#
19,22,24,25,26 PCI_DEVSEL#
+3V
19,22,24,25,26 PCI_STOP#
19,22,24,25,26 PCI_PERR#
19,22,24,25,26 PCI_SERR#
19,22,24,25,26 PCI_PAR
26
PCI_REQ#2
10K_0402_5%
26
PCI_GNT#2
R306
26 CLK_PCI_CB
20
28
29
31
32
33
34
35
36
1
2
21
1
B
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
63
VCCI
138
122
102
86
50
30
14
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
126
90
44
18
VCCP0
VCCP1
VCCSK0
VCCSK1
PQFP 144
22.2 X 22.2 X 1.60
C/BE3#
C/BE2#
C/BE1#
C/BE0#
CAD31/D10
CAD30/D9
CAD29/D1
CAD28/D8
CAD27/D0
CAD26/A0
CAD25/A1
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6
CAD19/A25
CAD18/A7
CAD17/A24
CAD16/A17
CAD15/IOWR#
CAD14/A9
CAD13/IORD#
CAD12/A11
CAD11/OE#
CAD10/CE2#
CAD9/A10
CAD8/D15
CAD7/D7
CAD6/D13
CAD5/D6
CAD4/D12
CAD3/D5
CAD2/D11
CAD1/D4
CAD0/D3
CC/BE3#/REG#
CC/BE2#/A12
CC/BE1#/A8
CC/BE0#/CE1#
RST#
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#
PAR
REQ#
GNT#
PCLK
CRST#/RESET
CFRAME#/A23
CIRDY#/A15
CTRDY#/A22
CDEVSEL#/A21
CSTOP#/A20
CPERR#/A14
CSERR#/WAIT#
CPAR/A13
CREQ#/INPACK#
CGNT#/WE#
CCLK/A16
RI_OUT#/PME#
SUSPEND#
CSTSCHG/BVD1
CCLKRUN#/WP
144
142
141
140
139
129
128
127
124
121
120
118
116
115
113
98
96
97
93
95
92
91
89
87
85
82
83
80
81
77
79
76
S1_D10
S1_D9
S1_D1
S1_D8
S1_D0
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A25
S1_A7
S1_A24
S1_A17
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_D3
125
112
99
88
S1_REG#
S1_A12
S1_A8
S1_CE1#
119
111
110
109
107
105
104
133
101
123
106
108
135
136
S1_RST
S1_A23
S1_A15
S1_A22
S1_A21
S1_A20
S1_A14
S1_WAIT#
S1_A13
S1_INPACK#
S1_WE#
A16_CLK 1
R310
S1_BVD1
S1_WP
103
S1_A19
2
CLK_PCI_PCM
72
71
74
73
VCCD1#
VCCD0#
U25
PCI_AD[0..31]
19,22,24,25,26,29 PCI_AD[0..31]
2
C232
0.1U_0402_16V4Z
VPPD1
VPPD0
21
21
21
21
PCM_ID
2
100_0603_1%
9,19,24,26 PCI_PIRQA#
26,34,35 SERIRQ
PM_CLKRUN#
19,22,24,25,26,34,35 PM_CLKRUN#
CLK_PCI_PCM
1
21,24
13
60
61
64
65
67
68
69
66
CBRST#
CBLOCK#/A19
MFUNC0
MFUNC1
MFUNC2
MFUNC3
MFUNC4
MFUNC5
MFUNC6
VCC/GRST#
CINT#/READY
SPKOUT
CAUDIO/BVD2
CCD2#/CD2#
CCD1#/CD1#
CVS2/VS2#
CVS1/VS1#
A
S 1_RDY#
PCM_SPK#
S1_BVD2
137
75
117
131
S1_VS2
S1_VS1
S1_A[0..25] 21
S1_D[0..15]
S1_D[0..15] 21
C
S1_IOWR# 21
S1_IORD# 21
S1_OE#
S1_CE2#
21
21
S1_REG# 21
S1_CE1#
21
S1_RST
21
B
S1_WAIT# 21
S1_INPACK# 21
S1_WE# 21
S1_A16
2
33_0402_5%
S1_BVD1
S1_WP
21
21
S1_RDY# 21
PCM_SPK# 33
S1_BVD2 21
S1_CD2# 21
S1_CD1# 21
S1_VS2
S1_VS1
21
21
1
C260
1
C309
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
A
S1_D2
S1_A18
S1_D14
1
2
132
62
134
PCI1410_LQFP144
2
6
22
42
58
78
94
114
130
R256
10_0402_5%
IDSEL
RSVD/D14
RSVD/A18
RSVD/D2
PCI_AD20 1
R257
84
100
143
2
D24
RB751V_SOD323
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
1
32,35,36,40 SUSP#
59
70
19,22,24,25,35 PCM_PME#
S1_A[0..25]
C222
10P_0402_50V8K
Title
Compal Electronics, Ltd.
CardBus Controller<TI PCI1410>
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Size
Document Number
CustomLA-2051
Date:
R ev
1.0
Sheet
Friday, November 14, 2003
1
20
of
51
http://laptopblue.vn
PCMCIA Power Controller
+12VALW
+S1_VCC
1
C119
1U_0805_25V4Z
13
12
11
AVCC1
AVCC2
AVCC3
2
9
+S1_VPP
1
U17
12V
2
C134
0.1U_0402_16V4Z
+S1_VPP
C199
0.01U_0402_25V4Z
+5VALW
1
1
2
2
C198
4.7U_1206_16V4Z
1
AVPP
1
C131
0.1U_0402_16V4Z
5
6
5V_1
5V_2
2
2
7
2
SHDN#
3.3V_1
3.3V_2
GND
3
4
C128
1U_0805_25V4Z
VCCD0#
VCCD1#
VPPD0
VPPD1
+S1_VCC
20
20
20
20
C204
0.1U_0402_16V4Z
8
OC#
1
1
2
2
C205
10U_0805_10V4Z
20
S1_A[0..25]
20
S1_D[0..15]
TPS2211IDBR_SSOP16
16
1
1
2
15
14
VCCD0#
VCCD1#
VPPD0
VPPD1
+3VALW
C135
0.1U_0402_16V4Z
10
S1_A[0..25]
S1_D[0..15]
CardBus Socket
CBRST#
+3VALW
1
2
JP18
+5VALW
1
C140
10U_0805_10V4Z
S1_D3
S1_D4
S1_D5
S1_D6
S1_D7
S1_CE1#
S1_A10
S1_OE#
S1_A11
S1_A9
S1_A8
S1_A13
S1_A14
S1_WE#
S 1_RDY#
C129
10U_0805_10V4Z
2
20
S1_CE1#
20
S1_OE#
20
20
S1_WE#
S1_RDY#
+S1_VCC
+S1_VPP
PCMRST# 35
20
+3V
1
O
3
P
S1_A23
1
S1_WP
1
2
CBRST#
G
I
OE#
2
7
10,19,20,22,24,25,26,34,35 PCIRST#
S1_WP
R189
10K_0402_5%
1
14
+3V
U18A
SN74LVC125APWLE_TSSOP14
+3V POWER
CBRST#
20,24
S1_OE#
2
R217
22K_0402_5%
2
R151
22K_0402_5%
1
2
R262
43K_0402_5%
S1_CE1#
1
S1_CE2#
1
S1_RST
2
R265
43K_0402_5%
2
R263
43K_0402_5%
1
2
R195
43K_0402_5%
+S1_VCC
S1_A16
S1_A15
S1_A12
S1_A7
S1_A6
S1_A5
S1_A4
S1_A3
S1_A2
S1_A1
S1_A0
S1_D0
S1_D1
S1_D2
S1_WP
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
GND
GND
GND
GND
GND
GND
GND
GND
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
GND
GND
GND
GND
GND
GND
GND
GND
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
S1_CD1#
S1_D11
S1_D12
S1_D13
S1_D14
S1_D15
S1_CE2#
S1_VS1
S1_IORD#
S1_IOWR#
S1_A17
S1_A18
S1_A19
S1_A20
S1_A21
S1_A22
S1_A23
S1_A24
S1_A25
S1_VS2
S1_RST
S1_WAIT#
S1_INPACK#
S1_REG#
S1_BVD2
S1_BVD1
S1_D8
S1_D9
S1_D10
S1_CD2#
S1_CD1# 20
S1_CE2# 20
S1_VS1
20
S1_IORD# 20
S1_IOWR# 20
+S1_VCC
+S1_VPP
S1_VS2
20
S1_RST
20
S1_WAIT# 20
S1_INPACK# 20
S1_REG# 20
S1_BVD2 20
S1_BVD1 20
S1_CD2# 20
+S1_VCC
+S1_VCC
FOXCONN_1CA415M1-TA_68P
(APL11)
+S1_VCC
+S1_VCC
+S1_VCC
Title
Compal Electronics, Ltd.
PCMCIA SOCKET
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Size
Document Number
CustomLA-2051
Date:
Friday, November 14, 2003
R ev
1.0
Sheet
21
of
51
5
4
3
2
1
http://laptopblue.vn
LAN AD19 REQ#1/GNT#1 PCI_PIRQD#
R88
+2.5V_LAN_1
TRACE=20mil
2
D
1
98
IDSEL
19,20,24,25,26 PCI_PAR
19,20,24,25,26 PCI_FRAME#
19,20,24,25,26 PCI_IRDY#
19,20,24,25,26 PCI_TRDY#
19,20,24,25,26 PCI_DEVSEL#
19,20,24,25,26 PCI_STOP#
24
18
19
20
21
23
PAR
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
19,20,24,25,26 PCI_PERR#
19,20,24,25,26 PCI_SERR#
25
26
PERR#
SERR#
83
82
REQ#
GNT#
80
79
57
INTA#
INTB#
PME#
81
97
50
RST#
PCICLK
CLKRUN#
6
22
37
49
90
95
VDD
VDD
VDD
VDD
VDD
VDD
PCI_AD19 1
R108
26
26
2 LAN_IDSEL
100_0402_5%
PCI_REQ#1
PCI_GNT#1
24,25,26 PCI_PIRQD#
24,25,26 PCI_PIRQC#
19,20,24,25,35 LAN_PME#
B
10,19,20,21,24,25,26,34,35 PCIRST#
26 CLK_PCI_LAN
19,20,24,25,26,34,35 PM_CLKRUN#
CLK_PCI_LAN
+3V
1
CLK_PCI_LAN
AVDD25
58
+2.5V_LAN
TRACE=20mil
AVDD
59
+3V_LAN_VDD1
TRACE=20mil
AVDD
70
+3V_LAN_VDD2
TRACE=20mil
AVDD
75
+3V_LAN_VDD3
TRACE=20mil
EEDO
EEDI
EESK
EECS
52
53
54
55
LAN_EEDO
LAN_EEDI
LAN_EECLK
LAN_EECS
LED0
LED1
LED2
78
77
76
TXD+
TXD-
72
71
RXIN+
RXIN-
68
67
LAN_TD+
LAN_TDLAN_RD+
LAN_RD-
X1
61
LAN_X1
X2
60
LWAKE
64
RTL8101L has internal
+2.5V generator at pin58
1
PCI I/F
LAN I/F
PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3
ISOLATE#
74
RTSET
65
RTT3
63
VCTRL
AC-Link
19,20,24,25,26 PCI_C/BE#0
19,20,24,25,26 PCI_C/BE#1
19,20,24,25,26 PCI_C/BE#2
19,20,24,25,26 PCI_C/BE#3
48
94
AC_RST#
AC_SYNC
AC_DOUT
AC_DIN
AC_BCK
GPIO0
GPIO1
ROMCS/OE#
NC
+2.5V_LAN
1
LQG21N4R7K10_0805
+3V
TRACE=30mil
R394 5.6K_0402_5%
2
+3V
U42
4 DO
GND 5
3 DI
NC 6
2 SK
NC 7
1 CS
VCC 8
1
C56
1
C52
2
22U_1206_16V4Z_V1
2
0.1U_0402_16V4Z
+3V
Place closed to
RTL8101L pin58
+3V
1
2
1
2
1
2
C55
AT93C46-10SI-2.7_SO8
ACTIVITY#
LINK10_100#
2
L2
ACTIVITY# 23
LINK10_100# 23
1
2
C57
C38
0.1U_0402_16V4Z
C51
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
1
2
C69
0.1U_0402_16V4Z
2
C77
0.1U_0402_16V4Z
2
1
1
1
2
C60
0.1U_0402_16V4Z
2
C67
0.1U_0402_16V4Z
2
C97
0.1U_0402_16V4Z
0.1U_0402_16V4Z
LAN_TD+ 23
LAN_TD- 23
+3V
C
LAN_RD+ 23
LAN_RD- 23
LAN_X2
1
2
R80
1K_0402_5%
+3VS
R76
49.9_0603_1%
1
2
R79
15K_0402_5%
1
2
R78
5.6K_0603_1%
C98
0.1U_0402_16V4Z
1
C/BE#0
C/BE#1
C/BE#2
C/BE#3
C
D
1
VDD25
VDD25
1
38
27
17
84
PCI_AD[0..31]
19,20,24,25,26,29 PCI_AD[0..31]
+2.5V_LAN
C61
0.1U_0402_16V4Z
R77
49.9_0603_1%
2
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
Power
47
46
45
43
42
41
40
39
36
35
34
33
32
30
29
28
15
14
13
12
11
10
9
8
96
93
92
91
89
87
86
85
1
2
U11
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
C71
0.1U_0402_16V4Z
2
0_0805_5%
2
1
56
2
1
3
4
5
7
C49
0.1U_0402_16V4Z
Place as close to
U4(LAN Chip)
100
99
B
51
69
Y1
DGND1
DGND2
DGND3
DGND4
DGND5
AGND1
AGND2
AGND3
Power
2
16
31
44
88
62
66
73
LAN_X1
2
1
LAN_X2
25MHZ_20P_1BX25000CK1A
1
2
1
C53
27P_0402_50V8J
2
C54
27P_0402_50V8J
RTL8101L_LQFP100
2
R98
10_0402_5%
1
2
C84
10P_0402_50V8K
A
A
Title
Compal Electronics, Inc.
LAN REALTEK RTL8101L
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Size
Document Number
R ev
1.0
LA-2051
Date:
Friday, November 14, 2003
Sheet
1
22
of
51
5
4
3
2
1
http://laptopblue.vn
Keep Out 40mil
Layout Note
H0013 pls close to
conn.
D
T=10mil
12
Amber LED+
11
Amber LED-
U38
SHLD4
8
RJ45_RX+
RJ45_RX-
16
15
14
13
12
11
10
9
H0013
R388
49.9_0603_1%
SHLD3
6
PR3-
4
R27
75_0402_5%
RJ45_RX+
3
RJ45_TX-
2
RJ45_TX+
1
PR3+
PR2+
PR1SHLD2
PR1+
SHLD1
10
1
RJ45_GND
+Green_LED
T=10mil
9
13
Green LED+
SANTA_130401-1
1
Place as close to Magnetic ( U3)
R32
75_0402_5%
1
R33
75_0402_5%
C
14
Green LED-
2
C395
0.1U_0402_16V4Z
2
2
2
C393
0.1U_0402_16V4Z
15
PR2-
5
RJ45_TX+
RJ45_TX-
16
PR4+
2
1
PR4-
7
RJ45_RX-
R26
75_0402_5%
2
2
R387
49.9_0603_1%
RX+
RXCT
NC
NC
CT
TX+
TX-
1
LAN_TD+
LAN_TD-
LAN_TD+
LAN_TD-
RD+
RDCT
NC
NC
CT
TD+
TD-
1
1
22
22
1
2
3
4
5
6
7
8
1
LAN_RD+
LAN_RD-
LAN_RD+
LAN_RD-
2
22
22
D
JP15
+Amber_LED
C
LAYOUT NOTICE: This area do not
connect to power plan include Vcc and
GND in any layer
+3V
RJ45_GND
C24
1
L ANGND
2
3
1000P_1206_2KV7K
47K
Q10
DTA114YKA_SC59
22
ACTIVITY#
ACTIVITY#
2
1
10K
1
C5
@0.1U_0402_16V4Z
2
C6
@4.7U_0805_10V4Z
1
2
R49
1
+Amber_LED
2
B
B
Termination plane should be copled
to chassis ground and also depends
on safety concern
300_0402_5%
3
+3V
47K
Q12
DTA114YKA_SC59
LINK10_100#
LINK10_100#
2
10K
1
22
R61
1
2
+Green_LED
300_0402_5%
A
A
Title
Compal Electronics, Ltd.
RJ11/RJ45 Connector
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Size
Document Number
CustomLA-2051
Date:
R ev
1.0
Sheet
Friday, November 14, 2003
1
23
of
51
1
2
3
@10_0402_5%
2
1
1
2 @0_0402_5%
2 @0_0402_5%
+3V_USB20
EXCLK_USB20 38
+3VS_USBPCI
@30Mhz 16pf 30ppmY3
1
2
L
R243
2
@10_0402_5%
2
2
C221
@15P_0402_50V8J
A6
B6
C5
A5
C4
B5
A4
B4
C1
C2
D2
D1
D3
E1
E3
F2
J1
J2
K3
K1
L3
K2
L1
L2
M1
N3
M3
N4
P4
N5
P5
M5
PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0
C3
F1
J3
M2
PCI_PAR
PCI_FRAME#
PCI_IR DY#
PCI_ TRDY#
PCI_STOP#
2 @100_0402_5%
PCI_DEVSEL#
PCI_REQ#
PCI_GNT#
PCI_PERR#
PCI_SERR#
PCI_PIRQA#
PC I_PIRQC#
PC I_PIRQD#
CLK_PCI_USB20
J4
F3
F4
G1
G3
B3
G2
C6
D6
H2
H1
C7
B7
A7
A8
B8
D9
PCI_C/BE#[0..3]
19,20,22,25,26 PCI_C/BE#[0..3]
19,20,22,25,26 PCI_PAR
19,20,22,25,26 PCI_FRAME#
19,20,22,25,26 PCI_IRDY#
19,20,22,25,26 PCI_TRDY#
19,20,22,25,26 PCI_STOP#
PCI_AD23
R241
1
19,20,22,25,26 PCI_DEVSEL#
19,20,22,25,26 PCI_PERR#
19,20,22,25,26 PCI_SERR#
9,19,20,26 PCI_PIRQA#
22,25,26 PCI_PIRQC#
22,25,26 PCI_PIRQD#
26 CLK_PCI_USB20
20,21
CBRST#
19,20,22,25,35 USB20_PME#
27
L6
L7
USB_SMI#
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
XT1/SCLK
XT2
RSDM1
DM1
DP1
RSDP1
RSDM2
DM2
DP2
RSDP2
RSDM3
DM3
DP3
RSDP3
RSDM4
DM4
DP4
RSDP4
USB 2.0 CONTROLLER
uPD720101F1-EA8
FBGA144
CBE3#
CBE2#
CBE1#
CBE0#
PAR
FRAME#
IRDY#
TRDY#
STOP#
IDSEL
DEVSEL#
REQ0#
GNT0#
PERR#
SERR#
INTA#
INTB#
INTC#
PCLK
VBBRST#
PME#
PPON1
PPON2
PPON3
PPON4
PPON5
SMI#
LEGC
NTEST1
N6
USB20_NEC_P0-_R
USB20_NEC_P0USB20_NEC_P0+
USB20_NEC_P0+_R
R530 1
2 @36_0603_1%
R524 1
2 @36_0603_1%
K14
K12
J14
J12
USB20_NEC_P1-_R
USB20_NEC_P1USB20_NEC_P1+
USB20_NEC_P1+_R
R525 1
2 @36_0603_1%
R508 1
2 @36_0603_1%
H11
G11
G13
G14
USB20_NEC_P2-_R
USB20_NEC_P2USB20_NEC_P2+
USB20_NEC_P2+_R
R509 1
2 @36_0603_1%
R507 1
2 @36_0603_1%
F12
F14
E12
E14
USB20_NEC_P3USB20_NEC_P3+
E13
D14
C13
C14
USB20_NEC_P4USB20_NEC_P4+
SRCLK
SRDTA
SRMOD
VCCRST#
CRUN#
2 @0_0402_5%
USB20_NEC_P0- 31
USB20_NEC_P0+ 31
L
USB20_NEC_P1- 31
USB20_NEC_P1+ 31
Note: PLACE CLOSE TO USB2.0 CONTROLLER
For NEC USB2.0 only .
USB20_NEC_P2- 31
USB20_NEC_P2+ 31
2
P11
N11
USB20_NEC_P0- R297 1
USB20_NEC_P0+ R298 1
@0.1U_0402_10V6K
2 @15K_0402_5%
2 @15K_0402_5%
RP83
1
R304
B12
B11
B10
A10
B9
C293
2
C296
@0.1U_0402_10V6K
OVCUR_USB20#0
OVCUR_USB20#1
OVCUR_USB20#3
OVCUR_USB20#4
USB20_NEC_P1USB20_NEC_P1+
USB20_NEC_P2USB20_NEC_P2+
OVCUR_USB20#0 31
OVCUR_USB20#1 31
OVCUR_USB20#2 31
2 @10K_0402_5%
2 @10K_0402_5%
R245 1
R244 1
USB20_NEC_P3USB20_NEC_P3+
USB20_NEC_P4USB20_NEC_P4+
+3V
1
2
3
4
8
7
6
5
@15K_1206_8P4R_5%
RP66
1
8
2
7
3
6
4
5
@15K_1206_8P4R_5%
C12
A11
C11
C10
A9
M8
+3V
M7
P7
N7
L8
M10
C317
3
1
@0.1U_0402_10V6K
U28
8
7
6
5
M9
N9
P9
1
R315
1
R299
2
@1.5K_0402_5%
2
@1.5K_0402_5%
+3V
VCC
WC
SCL
SDA
A0
A1
A2
GND
2
1
2
3
4
@AT24C02N-10SC-2.7_SO8
P13
M12
@UPD720101F1-EA8_FBGA144
2
2 @0_0402_5%
2 @0_0402_5%
R292 1
M14
M13
L14
K13
AVSS
AVSS
PM_CLKRUN# R302 1
R301 1
N.C.
N.C
B1
N1
P10
N14
H14
B14
A2
B2
N2
N13
B13
M11
L12
H12
D12
G4
J11
F11
D8
19,20,22,25,26,34,35 PM_CLKRUN#
@16P_0603_50V8J
1
L9
P8
1
OCI1
OCI2
OCI3
OCI4
OCI5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C9
10,19,20,21,22,25,26,34,35 PCIRST#
2
Note: PLACE CLOSE TO USB2.0 CONTROLLER
For NEC USB2.0 only .
C286
+3V_USB20
SMC
AMC
TEB
TEST
NANDTEST
P6
M6
@100_0402_5%
2
@9.1K_0402_1%2
+3V
2 @1.5K_0402_5%
2 @1.5K_0402_5%
2 @1.5K_0402_5%
RSDM5
DM5
DP5
RSDP5
RREF
AVSS(R)
3
R510 1
R303 1
R511 1
1
R273
2
P2
P3
P12
A13
A12
A3
E2
N8
L13
J13
H13
F13
D13
G12
H4
D7
N10
N12
AVDD
AVDD
@16P_0603_50V8J
1
1
1
CLK_PCI_USB20
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
C242
2
1
1
VDD_PCI
VDD_PCI
VDD_PCI
U27
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
H3
M4
C8
1
R516
R532
PCI_AD[0..31]
19,20,22,25,26,29 PCI_AD[0..31]
5
http://laptopblue.vn
+3V
+3VS
+3V
4
R266
1
1
R300
@1.5K_0402_5%
+3V
+3V_USB20
@0.1U_0402_10V6K
4
25,26
25,26
25,26
25,26
PCI_REQ#3
PCI_REQ#4
PCI_GNT#3
PCI_GNT#4
PCI_REQ#3
PCI_REQ#4
PCI_GNT#3
PCI_GNT#4
R493
R494
R495
R496
1
1
1
1
2
2
2
2
@0_0402_5%
@0_0402_5%
@0_0402_5%
@0_0402_5%
PCI_REQ#
PCI_GNT#
C594
@0.1U_0402_10V6K
1
2
C593
1
C623
2
@0.1U_0402_10V6K
1
2
C644
@0.1U_0402_10V6K @10U_0805_10V4Z
1
R305
1
C648
2
1
2
@0.1U_0402_10V6K
C223
1
C295
2
@10U_0805_10V4Z
1
2
C646
R551
1
@0.1U_0402_10V6K
2
@0_0603_5%
1
C647
1
C655
1
1
2
2
2
@0_0603_5% 2
2
@0.1U_0402_10V6K @10U_0805_10V4Z
C654
4
@10U_0805_10V4Z
Title
Compal Electronics, Inc.
NEC uPD720101 - USB2.0 Controller
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1
2
3
4
Size
Document Number
R ev
1.0
LA-2051
Date:
Friday, November 14, 2003
Sheet
5
24
of
51
http://laptopblue.vn
+3V
C202
1
2
AD18 REQ#3/GNT#3 PCI_ PIRQC#
1
W L_OFF#
2
KILL_SW#
PCI_AD[0..31]
U20
A
4
TC7SH08FU_SSOP5
JP19
TIP
LANRESERVED
L11
+3V
RB751V_SOD323
D23
1
2
INTB#
+3VS_MINIPCI
1
PC I_PIRQD#
22,24,26 PCI_PIRQD#
W=40mils
2
24,26 PCI_REQ#4
CHB1608B121_0603
26 CLK_PCI_MINI
C259
0.1U_0402_16V4Z
2
1
+5VS_MINIPCI
2
24,26 PCI_REQ#3
PCI_AD31
PCI_AD29
C235
0.1U_0402_16V4Z
1
PCI_AD27
PCI_AD25
19,20,22,24,26 PCI_C/BE#3
1
C253
2
1
2
C143
0.1U_0402_16V4Z
1
2
C96
0.1U_0402_16V4Z
PCI_AD23
PCI_AD21
PCI_AD19
1
2
PCI_AD17
C262
10U_0805_10V4Z
19,20,22,24,26 PCI_C/BE#2
19,20,22,24,26 PCI_IRDY#
19,20,22,24,26,34,35 PM_CLKRUN#
19,20,22,24,26 PCI_SERR#
1000P_0402_50V7K
19,20,22,24,26 PCI_PERR#
19,20,22,24,26 PCI_C/BE#1
PCI_AD14
PCI_AD12
PCI_AD10
PCI_AD8
PCI_AD7
1
CLK_PCI_MINI
PCI_AD5
R270
10_0402_5%
PCI_AD3
W=30mils
PCI_AD1
2
+5VS_MINIPCI
1
PCI_AD[0..31] 19,20,22,24,26,29
MINI_PCI SOCKET
Y
3
35,37
B
G
35
P
5
0.1U_0402_16V4Z
C252
18P_0402_50V8K
2
+5VS
1
L5
W=30mils
2
0_0603_5%
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
1
KEY
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
2
KEY
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
RING
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
LAN RESERVED
+5VS_MINIPCI
PCI_PIRQC# 22,24,26
PCI_GNT#4 24,26
+3V
PCIRST#
L14
1
2
CHB1608B121_0603
10,19,20,21,22,24,26,34,35
W=40mils
PCI_GNT#3 24,26
WLANPME# 19,20,22,24,35
PCI_AD30
PCI_AD28
PCI_AD26
PCI_AD24
M INI_IDSEL1
R232
PCI_AD22
PCI_AD20
PCI_AD18
PCI_AD16
C238
0.1U_0402_16V4Z
2
2
1
1
+3V
+3VS_MINIPCI
C234
0.1U_0402_16V4Z
2 PCI_AD18
100_0402_5%
C186
0.1U_0402_16V4Z
1
1
2
2
C152
10U_0805_10V4Z
PCI_PAR 19,20,22,24,26
PCI_FRAME# 19,20,22,24,26
PCI_TRDY# 19,20,22,24,26
PCI_STOP# 19,20,22,24,26
PCI_DEVSEL# 19,20,22,24,26
PCI_AD15
PCI_AD13
PCI_AD11
PCI_AD9
PCI_C/BE#0 19,20,22,24,26
PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0
W=20mils
KEYLINK_5305-4-211
+5VS_MINIPCI
+3VS_MINIPCI
W=30mils
PC I_PIRQC#
W=40mils
MINI_RST#
2
+3V
C100
0.1U_0402_16V4Z
1
Title
Compal Electronics, Ltd.
Mini PCI Slot
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Size
Document Number
CustomLA-2051
Date:
Friday, November 14, 2003
R ev
1.0
Sheet
25
of
51
5
4
3
2
1
+3VS
9,12
A_AD[0..31]
http://laptopblue.vn
PCI_DEVSEL# 4
PCI_ TRDY# 3
PCI_IR DY#
2
PCI_FRAME# 1
Trace length of PCI_CLK_R + PCI_CLK_FB should
be less than 200 mils.
A_CBE#[0..3]
9,12 A_CBE#[0..3]
RP17
Layout note:
A_AD[0..31]
5
6
7
8
U23A
2
1
R501
2 2
@470_0402_5%
@MMBT3904_SOT23
1
3
H_RESET#
C624
@15P_0402_50V8J
C PURSTIN#
CLK_14M_APIC
1
+3VS
R513 2
1 8.2K_0402_5%
+3VS
A_SERR#
R481
@10_0402_5%
2
+3VS
R522
10K_0402_5%
4.7K_0402_5%
C573
@15P_0402_50V8J
2
PM_STPCPU#
2
R502
2
C
1
1
1
PCI_STP#
+CPU_CORE
H_INIT#
H_A20M#
H_SLP#
H_INTR
H _NMI
H_SMI#
H_STPCLK#
H_ IGNNE#
R486
R402
R395
R396
R400
R397
R398
R399
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
200_0402_5%
200_0402_5%
200_0402_5%
200_0402_5%
200_0402_5%
200_0402_5%
200_0402_5%
200_0402_5%
9
A_STROBE#
9
A_DEVSEL#
9
A_ACAT#
9
A_END#
9,12
A_PAR
9
A_OFF#
9
9
A_SBREQ#
A_SBGNT#
5,10,16,47 PM_STPCPU#
16
PCI_STP#
9,19,20,24 PCI_PIRQA#
C20
P20
B23
P21
A_INTA#
INTB#
INTC#
INTD#
2
B
1
R487
100K_0402_5%
2
12P_0402_50V8K
20M_0603_5%
47 PM_DPRSLPVR
2
12P_0402_50V8K
16 CLK_14M_APIC
R492
1
H_STPCLK#
2 0_0402_5%
R498
1
R491
1
R489
1
R490
1
GPIO0
10K_0402_5% SB_APIC_D0
10K_0402_5% SB_APIC_D1
@300_0402_1%
1K_0402_1%
2
2
2
2
CPURSTIN#
CPU_PWRGD
INTR/LINT0
NMI/LINT1
INIT
SMI#
SLP#
IGNNE#
A20M#
FERR#
STPCLK#
SSMUXSEL/GPIO0
DPRSLPVR
APIC_D0
APIC_D1
APIC_CLK
+3VALW
GPIO1/ROMCS#
PCI_1394
R240
PCI_LAN
R480
PCI_PCM
R235
PCI_MINI
R242
P CI_EC
R246
P CI_SIO
R260
PCI_USB20 R478
PCI_CLK_R R267
PCI_CLK_FB
C15
B1
C1
A1
D2
B2
C2
A2
D3
C3
A3
D4
B4
C4
A4
D5
B5
C8
D8
B8
A8
C9
D9
B9
A9
C10
B10
D11
A10
C11
B11
D12
A11
B3
C5
A7
D10
B7
A6
C7
D7
A5
B6
C6
D6
B12
C12
D13
A12
C13
A13
B13
C14
D14
B14
A20
PCI_RST#
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3
PCI_FRAME#
PCI_DEVSEL#
PCI_IR DY#
PCI_ TRDY#
PCI_PAR
PCI_STOP#
PCI_PERR#
PCI_SERR#
PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4
PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3
PCI_GNT#4
PM_CLKRUN#
AB5
GPIO1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
33_0402_5%
33_0402_5%
33_0402_5%
39_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
C2391
PCI_AD[0..31]
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ#0
LDRQ#1
SERIRQ
USBOC5#/GPM1
RTC_ALE/USBOC4#/GPIO3
RTC_WR#/RTC_CLKOUT
RTC_CS#/USBOC3#/GPIO2
VBAT
RTC_GND
RP14
PCI_STOP#
PCI_PERR#
PCI_SERR#
PCI_PAR
2 22P_0402_50V8J
RP21
RP22
1 180P_0603_50V8J
C403 2
1 180P_0603_50V8J
H _NMI
C405 2
1 180P_0603_50V8J
PCI_FRAME# 19,20,22,24,25
PCI_DEVSEL# 19,20,22,24,25
PCI_IRDY# 19,20,22,24,25
PCI_TRDY# 19,20,22,24,25
PCI_PAR 19,20,22,24,25
PCI_STOP# 19,20,22,24,25
PCI_PERR# 19,20,22,24,25
PCI_SERR# 19,20,22,24,25
PCI_REQ#0 19
PCI_REQ#1 22
PCI_REQ#2 20
PCI_REQ#3 24,25
PCI_REQ#4 24,25
PCI_GNT#0 19
PCI_GNT#1 22
PCI_GNT#2 20
PCI_GNT#3 24,25
PCI_GNT#4 24,25
PM_CLKRUN# 19,20,22,24,25,34,35
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LPC_DRQ#0
LPC_DRQ#1
LPC_AD0 34,35
LPC_AD1 34,35
LPC_AD2 34,35
LPC_AD3 34,35
LPC_FRAME# 34,35
LPC_DRQ#0 35
LPC_DRQ#1 34
AC13
SIRQ
SERIRQ
AA2
AB7
AB8
AC8
AC10
AB11
OVCUR#5
OVCUR#4
C
2
8.2K_0402_5%
RP72
PCI_C/BE#[0..3] 19,20,22,24,25
LPC_AD0
LPC_AD1
LPC_AD3
LPC_AD2
4
3
2
1
5
6
7
8
100K_1206_8P4R_5%
RP69
SIRQ
LPC_DRQ#0
LPC_FRAME#
LPC_DRQ#1
R453
2
1
@4.7K_0402_5%
8 10K_1206_8P4R_5%
7
6
5
1
2
3
4
PM_CLKRUN# R454 2
1 4.7K_0402_5%
R482
2
GPIO0
10K_0402_5%
1
H_PROCHOT# 5,46
D
+3V
Q43
@2N7002_SOT23
2
G
S
R450
R456
2
OVCUR#4
10K_0402_5%
1
B
10K_0402_5%
20,34,35
OVCUR#5
R443 1
2 10K_0402_5%
OVCUR#3
R627 1
2 10K_0402_5%
OVCUR#3 31
13
I
+RTCVCC
R622
1
R589
1
W=20mils
2
2
U12F
O
12
PCIRST#
PCIRST#
10,19,20,21,22,24,25,34,35
C711
1
200_0402_5%
200_0402_5%
JOPEN1
2
SN74LVC14APWLE_TSSOP14
No short
1U_0603_10V6K
10K_0402_5%
2
A
P
1
I
O
SN74LVC14APWLE_TSSOP14
7
G
NBRST#
A
SN74LVC14APWLE_TSSOP14
+3VALW
+3VALW
U19A
PLACE CLOSE TO CPU SOCKET
10
O
1
R119
2
R477
1
PCI_GNT#4
PCI_C/BE#[0..3]
2
C402 2
H_INTR
U12E
I
R476
1
8.2K_0402_5%
1
H_INIT#
14
1 180P_0603_50V8J
PCI_RST# 11
5
6
7
8
8.2K _8P4R_0804_5%
P
C406 2
2
4
3
2
1
PCI_REQ#4
G
H_A20M#
0.1U_0402_10V6K
7
1 180P_0603_50V8J
14
1 180P_0603_50V8J
C710 2
5
6
7
8
U19B
P
C709 2
H_ IGNNE#
4
3
2
1
8.2K _8P4R_0804_5%
PCI_GNT#1
PCI_GNT#3
PCI_GNT#0
PCI_GNT#2
2
3
I
O
4
NB_RST#
NB_RST# 7,30,34,35
G
H_STPCLK#
7
1 180P_0603_50V8J
G
C708 2
D
5
6
7
8
South bridge SB200
7
H_SMI#
4
3
2
1
8.2K _8P4R_0804_5%
PCI_REQ#1
PCI_REQ#2
PCI_REQ#0
PCI_REQ#3
1
14
C101
P
1 180P_0603_50V8J
14
C707 2
5
6
7
8
RP75
PCI_PIRQA#
PCI_PIRQB#
PC I_PIRQC#
PC I_PIRQD#
+SB_VBAT
H_SLP#
4
3
2
1
8.2K _8P4R_0804_5%
PCI_AD[0..31] 19,20,22,24,25,29
Y14
AA14
AB14
AA13
AB13
AC14
Y13
+SB_VBAT
8.2K _8P4R_0804_5%
CLK_PCI_1394 19
CLK_PCI_LAN 22
CLK_PCI_CB 20
CLK_PCI_MINI 25
CLK_PCI_EC 35
CLK_PCI_SIO 34
CLK_PCI_USB20 24
2
5
H_A20M#
H_ CPUFERR#
1
R233
1
C534
2
20M_0603_5%
H_PW RGD
H_INTR
H_NMI
H_INIT#
H_SMI#
H_SLP#
H_IGNNE#
H_A20M#
X2
B18
E4
B17
B16
C17
C16
F19
D17
D18
E19
E16
E17
E18
C19
C18
B19
L PC
AC11
C PURSTIN#
5
5
5
5
5
5
5
5
X1
XTAL
RTCX2
RTCX1
R228 1
AC12
CPU
3
CPU_STP#/DPSLP#
PCI_STP#
2
NC
NC
RTCX1
IN
OUT
Y4
32.768KHZ_12.5P_1TJS125DJ2A073
1
4
RTCX2
2
N20
R23
PCI_PIRQA#
PCI_PIRQB#
PC I_PIRQC#
PC I_PIRQD#
22,24,25 PCI_PIRQC#
22,24,25 PCI_PIRQD#
1
C521
PM_STPCPU#
PCI_STP#
PCIRST#
AD0/ROMA18
AD1/ROMA17
AD2/ROMA16
AD3/ROMA15
AD4/ROMA14
AD5/ROMA13
AD6/ROMA12
AD7/ROMA11
AD8/ROMA9
AD9/ROMA8
AD10/ROMA7
AD11/ROMA6
AD12/ROMA5
AD13/ROMA4
AD14/ROMA3
AD15/ROMA2
AD16/ROMD0
AD17/ROMD1
AD18/ROMD2
AD19/ROMD3
AD20/ROMD4
AD21/ROMD5
AD22/ROMD6
AD23/ROMD7
AD24/RTC_AD7
AD25/RTC_AD6
AD26/RTC_AD5
AD27/RTC_AD4
AD28/RTC_AD3
AD29/RTC_AD2
AD30/RTC_AD1
AD31/RTC_AD0
CBE#0/ROMA10
CBE#1/ROMA1
CBE#2/ROMWE#
CBE#3/RTC_RD#
FRAME#
DEVSEL#/ROMA0
IRDY#
TRDY#/ROMOE#
PAR
STOP#
PERR#
SERR#
REQ#0
REQ#1
REQ#2
REQ#3/PDMAREQ0#
REQ#4/PLLBP33/PDMAREQ1#
GNT#0
GNT#1
GNT#2
GNT#3/PDMAGNT0#
GNT#4/PLLBP50/PDMAGNT1#
CLKRUN#
RTC
5,7
2
330_0402_5%
2
Q49
1
A_AD0
A_AD1
A_AD2
A_AD3
A_AD4
A_AD5
A_AD6
A_AD7
A_AD8
A_AD9
A_AD10
A_AD11
A_AD12
A_AD13
A_AD14
A_AD15
A_AD16
A_AD17
A_AD18
A_AD19
A_AD20
A_AD21
A_AD22
A_AD23
A_AD24
A_AD25
A_AD26
A_AD27
A_AD28
A_AD29
A_AD30
A_AD31
A_CBE#0
A_CBE#1
A_CBE#2
A_CBE#3
A_STROBE#
A_DEVSEL#
A_ACAT#
A_END#
A_PAR
A_OFF#
A_SERR#
A_SBREQ#
A_SBGNT#
B15
D16
A14
A15
A16
A17
D15
A18
A19
1
@10_0402_5%
R558
H22
P23
L23
N23
N22
M23
M22
K22
M21
M20
L21
K21
L20
N21
K23
K20
F23
G21
F20
H21
F22
F21
G20
E21
E20
D23
D22
E22
D20
C23
D21
C22
L22
J23
G22
E23
H20
J21
G23
H23
J20
J22
P22
B21
B20
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
PCICLK6
PCICLK7
PCICLK_FB
3
1
R512
+3VS
A_AD0
A_AD1
A_AD2
A_AD3
A_AD4
A_AD5
A_AD6
A_AD7
A_AD8
A_AD9
A_AD10
A_AD11
A_AD12
A_AD13
A_AD14
A_AD15
A_AD16
A_AD17
A_AD18
A_AD19
A_AD20
A_AD21
A_AD22
A_AD23
A_AD24
A_AD25
A_AD26
A_AD27
A_AD28
A_AD29
A_AD30
A_AD31
A_CBE#0
A_CBE#1
A_CBE#2
A_CBE#3
A_STROBE#
A_DEVSEL#
A_ACAT#
A_END#
A_PAR
A_OFF#
A_SERR#
A_SBREQ#
A_SBGNT#
Part 1 of 3
PCICLKF
A_RST#
1
1
H_ CPUFERR#
+CPU_CORE
B22
R22
PCI CLKS
2
2 2
CLK_ALINK_SB
SB200 SB
NBRST#
PCI INTERFACE
1
R499
330_0402_5%
MMBT3904_SOT23
1
3
H_FERR#
28.2K_0402_5%
PULL DOWN FOR S3
470_0402_5%
Q50
5
R503
1
A-LINK INTERFACE
1
+3VS
R559
D
CLK_ALINK_SB
16 CLK_ALINK_SB
+CPU_CORE
Title
SN74LVC14APWLE_TSSOP14
Compal Electronics, Inc.
SB200M(1/4)- PCI/CPU/LPC
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Size
Document Number
R ev
1.0
LA-2051
Date:
Sheet
Friday, November 14, 2003
1
26
of
51
5
4
+3V
CLK_SB_48M
1
2
R615
@0_0402_5%
2
GND
C723
@48MHZ_4P_FN4800002
@0.1U_0402_16V4Z
R462 10K_0402_5%
2
1
+3V
USB20P5+
USB20P5USB20P4+
USB20P4-
Note: Place close
to U3 (ATI SB)
For ATI USB2.0 only .
L
USB20P3+
USB20P3+
31
USB20P3-
USB20P3-
31
USB20P2+
USB20P2+
31
USB20P2-
USB20P2-
31
USB20P1+
USB20P1+
31
USB20P1-
USB20P1-
31
1
CLK_USB_48M_R
R441
2
@10_0402_5%
1
2
C453
USB20P0+
@15P_0402_50V8J
USB20P0C
L4
L3
M4
M3
K2
K1
L2
L1
H2
H1
J2
J1
G3
J3
H3
K3
F1
F2
G1
G2
R5
W1
V4
V2
R521
@10_0402_5%
@10_0402_5%
T3
U2
T5
W4
2
R177
2
2
1
C133
@15P_0402_50V8J
2
C636
T2
U1
@15P_0402_50V8J
T4
RP47 1
2
3
4
8
7
6
5
15K_1206_8P4R_5%
8
7
6
5
15K_1206_8P4R_5%
5
6
7
8
RP46 1
2
3
4
RP45 4
3
2
1
USB20P5USB20P5+
USB20P4USB20P4+
USB20P3USB20P3+
USB20P2USB20P2+
+3V
29
29
29
29
MII_TXD3
MII_TXD2
MII_TXD1
MII_TXD0
U4
V1
U3
V3
29
MII_TXEN
W2
W3
U5
Y7
R455 2
USB20P1+
USB20P1USB20P0+
USB20P0-
29
29
B
15K_1206_8P4R_5%
R447 2
SB_EEDO
SB_EECLK
1 10K_0402_5%
1 10K_0402_5%
35 EC_RSMRST#
2 100K_0402_5%
R464 1
16
CLK_SB_14M
P2
R3
R2
R4
EC_RSMRST#
AB9
CLK_SB_14M
A23
W6
R442 2
+3V
R433 2
9
5
USB_HSDP5+
USB_FLDP5+
USB_HSDM5USB_FLDM5USB_HSDP4+
USB_FLDP4+
USB_HSDM4USB_FLDM4USB_HSDP3+
USB_FLDP3+
USB_HSDM3USB_FLDM3USB_HSDP2+
USB_FLDP2+
USB_HSDM2USB_FLDM2USB_HSDP1+
USB_FLDP1+
USB_HSDM1USB_FLDM1-
D49
CPU_GHI#
1 10K_0402_5%
AGP_STP# D50
AGP_STP#
2
1 10K_0402_5%
FLASH#
OVCUR#2
32KHZ_S5_OUT
OVCUR#1
SB_SPKR
36 FLASH#
31
OVCUR#2
29 32KHZ_S5_OUT
31
OVCUR#1
33
SB_SPKR
RX_DV
RX_ERR
TX_CLK
TXD3
TXD2
TXD1
TXD0
EE_CS
EE_DI
EE_DO
EE_CK
RSMRST#
OSC_IN
SIO_CLK
BLINK/GPM0
FANOUT1/USBOC2#/GPM2
32KHZ_IN/GPM3
USBOC1#/GPM4
SPEAKER/GPM5
FANOUT0/GPM6
AGP_BUSY#_R
G HI
30
30
PIDERST#
SIDERST#
GPIO_X0/AGP_STP#
GPIO_X1/AGP_BUSY#
GPIO_X2/GHI#
GPIO_X3/VGATE
GPIO_X4
GPIO_X5
2
2
1
@10K_0402_5%
R449
AC1
AC6
AC2
AC3
AC4
AC5
R444
GA20_IN/GEVNT0#
KB_RST#/GEVNT1#
SMB_ALERT#/GEVNT2#
LPC_PME#/GEVNT3#
LPC_SMI#/GEVNT4#
GEVENT5#/ETH_VALERT#
GEVENT6#/ETH_FALERT#
GEVENT7#/ETH_CALERT#
PIDE_D0
PIDE_D1
PIDE_D2
PIDE_D3
PIDE_D4
PIDE_D5
PIDE_D6
PIDE_D7
PIDE_D8
PIDE_D9
PIDE_D10
PIDE_D11
PIDE_D12
PIDE_D13
PIDE_D14
PIDE_D15
SIDE_IORDY
SIDE_IRQ
SIDE_A0
SIDE_A1
SIDE_A2
SIDE_DACK#
SIDE_DRQ
SIDE_IOR#
SIDE_IOW#
SIDE_CS1#
SIDE_CS3#
TX_EN
PHY_PD
PHY_RST#
CLK_25M
1 RB751V_SOD323 AGP_STP#_R
2
1
RB751V_SOD323
AB2
AA3
W11
AB1
Y4
AA1
RXD3
RXD2
RXD1
RXD0
PME#/EXT_EVNT0#
RI#/EXT_EVNT1#
SLP_S3#
SLP_S5#
PWR_BTN#
PWR_GOOD
PCI_REQACT#
SUS_STAT#
TEST1
TEST0
PIDE_IORDY
PIDE_IRQ
PIDE_A0
PIDE_A1
PIDE_A2
PIDE_DACK#
PIDE_DRQ
PIDE_IOR#
PIDE_IOW#
PIDE_CS1#
PIDE_CS3#
MCOL
MCRS
MDCK
MDIO
RX_CLK
TALERT#/ETH_TALERT#
GPOC0#/SCL0
GPOC1#/SDA0
GPOC2#/SCL1
GPOC3#/SDA1
RTC_IRQ#/PWR_STRP
USB_HSDP0+
USB_FLDP0+
USB_HSDM0USB_FLDM0-
ETHERNET MII
T1
1
Part 2 of 3
1
CLK_SB_14M
1
IAC_BITCLK
M2
M1
N2
N1
SB200 SB
USBCLK/CLK48
USB_RCOMP
USB_VREFOUT
USB_ATEST1
USB_ATEST0
USBOC0#/GPM7
EEPROM
2
P3
R1
P1
N4
N3
P4
CLK / RST
D
2USB_RCOMP
ACPI / WAKE UP EVENTS
OE
1 R430
12.4K_0603_1%
USB INTERFACE
1
2
1
U23B
3
OUT
PRIMARY ATA 66/100
2
@10K_0603
X5
4
VDD
GPIO_XTRA GPIO
SECONDARY ATA 66/100
AC97
R616
1
3
CLK_USB_48M_R
1
2
R614
0_0402_5%
http://laptopblue.vn
CLK_SB_48M
1
16
SIDE_D0
SIDE_D1
SIDE_D2
SIDE_D3
SIDE_D4
SIDE_D5
SIDE_D6
SIDE_D7
SIDE_D8
SIDE_D9
SIDE_D10
SIDE_D11
SIDE_D12
SIDE_D13
SIDE_D14
SIDE_D15
AC_BITCLK
AC_SDOUT
AC_SDIN0
AC_SDIN1
AC_SDIN2
AC_SYNC
AC_RST#
SPDIF_OUT
AB4
SB_EC_THERM#
AC9
AC7
AA11
AB10
AA10
Y11
C21
Y10
AA5
AA6
SB_PM_BATLOW#
Y5
AA4
AB3
Y6
W5
Y8
AA7
AB6
SB_GA20
SB_KBRST#
SB_AC_IN
SB_EC_SWI#
LPC_SMI#
SB_EC_SMI#
SB_SCI#
SB_LID_OUT#
AA12
W12
Y12
AB12
AA8
SMB_CK_CLK2
SMB_CK_DAT2
SMB_CK_CLK2_SB
SMB_CK_DAT2_SB
PW R_STRP
AB17
AC16
AB15
AB16
AC15
Y16
AA17
AA16
AC17
Y15
AA15
IDE_PD IORDY
IN T_IRQ14
IDE_PDA0
IDE_PDA1
IDE_PDA2
IDE_PDDACK#
IDE_PDDREQ
ID E_PDIOR#
IDE_PDIOW #
IDE_PDCS1#
IDE_PDCS3#
AC18
AA18
AC19
AA19
AC20
AA20
AC21
AB21
AA21
Y20
AB20
Y19
AB19
Y18
AB18
Y17
IDE_PDD0
IDE_PDD1
IDE_PDD2
IDE_PDD3
IDE_PDD4
IDE_PDD5
IDE_PDD6
IDE_PDD7
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15
AA23
AA22
AC23
Y21
AB23
Y22
W21
Y23
W20
AC22
AB22
IDE_SD IORDY
IN T_IRQ15
IDE_SDA0
IDE_SDA1
IDE_SDA2
IDE_SDDACK#
IDE_SDDREQ
ID E_SDIOR#
IDE_SDIOW #
IDE_SDCS1#
IDE_SDCS3#
W23
V21
V23
U21
U23
T21
T23
R21
R20
T22
T20
U22
U20
V22
V20
W22
IDE_SDD0
IDE_SDD1
IDE_SDD2
IDE_SDD3
IDE_SDD4
IDE_SDD5
IDE_SDD6
IDE_SDD7
IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15
E1
E2
Y1
Y2
Y3
E3
V5
E5
PM_SLP_S3#
PM_SLP_S5#
PBTN_OUT#
SB_PWRGD
PCI_ACT_REQ#
SUS_STAT#
SB_TEST1
SB_TEST0
PM_SLP_S3#
PM_SLP_S5#
PBTN_OUT#
SB_PWRGD
35
35
35
17
SUS_STAT# 7
SMCLK
SMDATA
SB_EC_THERM#
D16
2
1 RB751V_SOD323
EC_THERM#
EC_THERM# 35
SB_PM_BATLOW#
D41
2
1 RB751V_SOD323
PM_BATLOW#
PM_BATLOW# 35
SB_EC_SWI#
D48
2
1 RB751V_SOD323
EC_SWI#
EC_SWI#
SB_GA20
D42
2
1 RB751V_SOD323
GATEA20
GATEA20
35
SB_KBRST#
D18
2
1 RB751V_SOD323
KBRST#
KBRST#
35
SB_AC_IN
D17
2
1 RB751V_SOD323
ACIN
ACIN
35,37,41
SB_EC_SMI#
D46
2
1 RB751V_SOD323
EC_SMI#
EC_SMI#
35
SB_SCI#
D47
2
1 RB751V_SOD323
EC_SCI#
EC_SCI#
35
SB_LID_OUT#
D43
2
1 RB751V_SOD323
LID_OUT#
EC_LID_OUT# 35
LPC_SMI#
R479 1
2 @0_0603_5%
USB_SMI#
IDE_PDIORDY 30
INT_IRQ14 30
IDE_PDA0 30
IDE_PDA1 30
IDE_PDA2 30
IDE_PDDACK# 30
IDE_PDDREQ 30
IDE_PDIOR# 30
IDE_PDIOW# 30
IDE_PDCS1# 30
IDE_PDCS3# 30
+2.5V
R472 1
2 10K_0402_5%
IDE_SDIORDY 30
INT_IRQ15 30
IDE_SDA0 30
IDE_SDA1 30
IDE_SDA2 30
IDE_SDDACK# 30
IDE_SDDREQ 30
IDE_SDIOR# 30
IDE_SDIOW# 30
IDE_SDCS1# 30
IDE_SDCS3# 30
S
1
LPC_SMI#
SB_EC_SWI#
SB_GA20
PCI_ACT_REQ#
1
2
3
4
+3V
RP50
8
7
6
5 10K_1206_8P4R_5%
SB_EC_SMI#
SB_SCI#
SB_KBRST#
1
2
3
4
8 RP48
7
6
5 10K_1206_8P4R_5%
SB_EC_THERM#
SB_LID_OUT#
AGP_BUSY#_R
SB_PM_BATLOW#
1
2
3
4
8 RP53
7
6
5 10K_1206_8P4R_5%
SB_AC_IN
G HI
AGP_STP#_R
1
2
3
4
8 RP51
7
6
5 10K_1206_8P4R_5%
PM_SLP_S5#
PBTN_OUT#
PM_SLP_S3#
1
2
3
4
+3VALW
RP63
8
7
6
5 10K_1206_8P4R_5%
SMB_CK_DAT2_SB
SMB_CK_CLK2
SMB_CK_CLK2_SB
SMB_CK_DAT2
1
2
3
4
8
7 RP65
6
5
B
IDE_SDD[0..15] 30
+3VS
2.2K_1206_8P4R_5%
IAC_RST#
R4511
R445
1
IAC_BITCLK
IAC_SDATAO
33_0402_5%
2
IAC_SDATAI0
IAC_SDATAI1
IAC_SDATAI2
33_0402_5%
IAC_ SYNC
2
IAC_RST#
S PDIF_OUT
AGP_STP#
AGP_BUSY#
SB_TEST1
SB_TEST0
IAC_BITCLK 32
IAC_SDATAO 29,32
IAC_SDATAI0 32
IAC_SDATAI1 32
3
AGP_BUSY#
IAC_BITCLK
IAC_SDATAI2
IAC_SDATAI1
IAC_SDATAI0
8
7
6
5
8.2K_1206_8P4R_5%
1
2
3
4
8
7
6
5
RP49
AGP_BUSY# 9
A
8.2K_1206_8P4R_5%
Compal Electronics, Inc.
SB200M(2/4) - IDE/USB/MII
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALSize
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
2 1K_0402_5%
5
1
2
3
4
RP57
IAC_SYNC 29,32
IAC_RST# 32
SPDIF_OUT 29
2
G
R178 1
+3V
2 8.2K_0402_5%
+3VS
R440
1
Title
+5VS
C
2 4.7K_0402_5%
IDE_PDD[0..15] 30
South bridge SB200
1
SUS_STAT# R471 1
2N7002_SOT23
D
Q44
USB_SMI# 24
PW R_STRP 29
VTT_PWRGD 16,17
AGP_BUSY#_R
D
13,14,16
13,14,16
33_0402_5%
A
35
4
3
2
Document Number
R ev
1.0
LA-2051
Friday, November 14, 2003
Sheet
1
27
of
51
5
4
3
2
1
http://laptopblue.vn
+3VS
0.1U_0402_10V6K
1
C579
C584
1
1
C613
1
C614
0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K
1
C583
1
C582
1
C604
1
C603
1
C599
1
C598
U23C
0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K
1
C597
1
C596
1
C559
1
C533
1
C520
1
C494
1
2
2
2
2
2
2
2
2
2
2
2
0.1U_0402_10V6K 0.1U_0402_10V6K
0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K
2
E11
E12
E15
E7
E8
F11
F12
F15
F16
F17
F7
F8
G18
G19
H18
H19
M18
M19
N18
N19
T18
T19
U18
U19
V17
V18
W17
W18
C478
22U_1206_16V4Z_V1
D
2
2
2
2
2
0.1U_0402_10V6K
0.1U_0402_10V6K
22U_1206_16V4Z_V1
+3VS
ATI request
+2.5VS
@0.01U_0402_16V7Z
0.1U_0402_10V6K
1
C574
1
C561
1
C560
0.1U_0402_10V6K
1
C542
1
C526
1
C501
0.1U_0402_10V6K
1
C502
1
C504
1
1
C611
0.1U_0402_10V6K
2
C612
1
C519
1
C493
1
1
2
2
C477
C503
@0.01U_0402_16V7Z
22U_1206_16V4Z_V1
0.1U_0402_10V6K
2
2
2
@0.01U_0402_16V7Z
2
2
2
2
2
2
2
2
0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K
@0.01U_0402_16V7Z
@0.01U_0402_16V7Z
+2.5VS
+2.5VS
ATI request
+2.5V
J10
J11
J13
J14
K15
K9
L15
L9
N15
N9
P15
P9
R10
R11
R13
R14
@0.01U_0402_16V7Z
0.1U_0402_10V6K
1
1
C546 C472
22U_1206_16V4Z_V1
C
2
1
C544
0.1U_0402_10V6K
1
C545
1
2
2
2
0.1U_0402_10V6K
2
C532
C543
0.1U_0402_10V6K
1
C527
@0.01U_0402_16V7Z
2
+3V
22U_1206_16V4Z_V1
2
2
1
C499
1
C479
2
2
0.1U_0402_10V6K
1
+2.5V
2
C468
C512
0.1U_0402_10V6K
@0.1U_0402_16V7K
1
1
2
2
1
1
2
2
C562
@0.01U_0402_16V7Z
@0.01U_0402_16V7Z
0.1U_0402_10V6K 0.1U_0402_10V6K
1
1
C480 C473
C563
2
ATI request
+3V
1
ATI request
CLOSE TO
L6,H6,J6
+2.5V
P6
R6
V13
W13
V12
C511
@0.1U_0402_16V7K
1
C471
@0.1U_0402_16V7K
2
C470
1
1
2
2
C469
L6
H6
J6
0.1U_0402_16V7K
@0.1U_0402_16V7K
ATI request
+3V_AVDDC
L47
P5
+3V_AVDDC
T6
U6
V9
V10
V11
W9
W10
+3V
+3V_AVDDC
1
2
MVB2012301YZT_0805
+3V
1
2
1
C488
1U_0603_10V6K
2
C460
C485
0.1U_0402_10V6K
@10U_0805_10V6K
1
2
+5VS
F4
J4
K5
F3
K4
L5
+3V_AVDDUSB
1
B
R432
+3V
+3VS
2
+3V_AVDDUSB
1
1
1
C484 C444
2
1
C451
1
2
2
2
2
2
0.1U_0402_10V6K 0.1U_0402_10V6K
1
C458
1
C459
1
C452
2
100_0402_5%
1
RB751V_SOD323 C142
0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K
22U_1206_16V4Z_V1
D19
2
ATI request
+3V_AVDDUSB
L48
1
2
MVB2012301YZT_0805
C443
C125
0.1U_0402_10V6K
@47U_B_6.3VM
1U_0603_10V6K
+
D19
+2.5VS
+5VS_VREF
D1
1
A21
+2.5V_AVDDCK
2
+2.5VALW
Y9
+3VALW
AA9
SB200 SB
Part 3 of 3
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
STB_2.5V
STB_2.5V
STB_2.5V
STB_2.5V
STB_2.5V
VDD_USB
VDD_USB
VDD_USB
AVDDC
STB_3.3V
STB_3.3V
STB_3.3V
STB_3.3V
STB_3.3V
STB_3.3V
STB_3.3V
AVDDTX0
AVDDTX1
AVDDTX2
AVDDRX0
AVDDRX1
AVDDRX2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS_USB
VSS_USB
AVSSC
VREF_CPU
S5_2.5V
AVSSRX2
AVSSRX1
AVSSRX0
AVSSTX2
AVSSTX1
AVSSTX0
S5_3.3V
AVSSCK
5V_VREF
AVDD_CK
E10
E13
E14
E6
E9
F10
F13
F14
F18
F6
F9
G6
J12
J15
J18
J19
J9
K10
K11
K12
K13
K14
K18
K19
L10
L11
L12
L13
L14
L18
L19
M10
M11
M12
M13
M14
M15
M6
M9
N10
N11
N12
N13
N14
N6
P10
P11
P12
P13
P14
P18
P19
R12
R15
R18
R19
R9
V14
V15
V16
V19
V6
V7
V8
W14
W15
W16
W19
W7
W8
H5
G5
D
C
B
N5
M5
J5
G4
K6
H4
F5
A22
2
C500
0.1U_0402_10V6K
ATI request
+2.5V_AVDDCK
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
POWER
+3VS
1
1
2
2
South bridge SB200
C491
0.1U_0402_10V6K
+2.5V_AVDDCK
L49
+2.5VS
1
2
MVB2012301YZT_0805
C268
1
2
C643
1U_0603_10V6K
1
2
C626
@22U_1206_16V4Z_V1
1
2
0.1U_0402_10V6K
A
A
Title
Compal Electronics, Inc.
SB200M(3/4) - PWR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Size
Document Number
R ev
1.0
LA-2051
Date:
Friday, November 14, 2003
Sheet
1
28
of
51
5
4
3
2
1
http://laptopblue.vn
+3VALW
1
1
+3V
1
+3V
1
+3V
1
+3V
1
C
R201
10K_0402_5%
10K_0402_5%
2
R100
10K_0402_5%
2
R103
10K_0402_5%
2
R101
10K_0402_5%
2
R102
10K_0402_5%
2
R99
2
1
R224
2
R218
2
@10K_0402_5% @10K_0402_5% @10K_0402_5% @10K_0402_5% @10K_0402_5%
2
R105
2
R208
+3V
10K_0402_5%
2
R104
+3VS
1
+3VS
R198
2
C
+3VS
+3V
1
+3V
1
+3VALW
1
D
1
D
27
PWR_STRP
27
SB_EEDO
27
SB_EECLK
27,32 IAC_SYNC
27,32 IAC_SDATAO
27
SPDIF_OUT
MANUAL
PWR ON
STRAP
HIGH
SIO 24MHz
ENABLE
SPEED
STEP
IGNORE
DEBUG
STRAPS
ROM ON
LPC
BUS
INIT ACTIVE
LOW (PIII)
HI SPEED
A-LINK
SIO 48MHz
DISABLE
SPEED
STEP
DEFAULT
DEFAULT
DEFAULT
DEFAULT
DEFAULT
DEFAULT
SPEEDSTEP
CPU_STP#
DEFAULT
AUTO
PWR
ON
STRAP
LOW
1
1
1
1
FREQLTCH
TX_EN
R90
R202
2
33MHz NB
BUS
AC_SYNC
R93
2
SPDIF_OUT
INIT ACTIVE
HIGH
EECK
R91
2
AC_SDOUT
ROM ON
PCI BUS
R92
2
@10K_0402_5%@10K_0402_5% @10K_0402_5% @10K_0402_5% @10K_0402_5% @10K_0402_5%
2
R89
10K_0402_5%
USE
DEBUG
STRAPS
IGN DEBUG
EEDO
1
1
1
1
2
R225
10K_0402_5%
2
R219
10K_0402_5%
2
PWR_STRP
R209
10K_0402_5%
2
REQUIRED SYSTEM STRAPS
2
2
B
R94
2
R95
@10K_0402_5% 10K_0402_5%
1
R199
1
1
1
27
MII_TXEN
27
MII_TXD3
27
MII_TXD2
27
MII_TXD1
27
MII_TXD0
27 32KHZ_S5_OUT
ETHERNET TXD[3:0]
DEFAULT
B
32KHZ_S5
32KHZ
OUTPUT
FROM SB200
(INT RTC)
DISABLE
CPU FREQ
SETTING
PROCESSOR FREQ MULTIPLIER
DEFAULT
ENABLE CPU
FREQSETTING
32KHZ INPUT
TO SB200
(EXT RTC)
1
+3VS
R226
2
@10K_0402_5%
A
A
1
19,20,22,24,25,26 PCI_AD26
R227
2
10K_0402_5%
Title
Compal Electronics, Inc.
SB200M(4/4) - STRAPS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Size
Document Number
R ev
1.0
LA-2051
Date:
Sheet
Friday, November 14, 2003
1
29
of
51
2
+3VS
http://laptopblue.vn
1
1
2
3
4
RP80
8
7
6
5
1
R350
27 IDE_PDIORDY
PD_PD IORDY
2
5
IDE Module CONN.
PD_D0
PD_D14
PD_D1
PD_D15
33_1206_8P4R_5%
33_0402_5%
NB_RST#
1
7,26,34,35 NB_RST#
27
B
A
RP90
27 IDE_PDDACK#
27 IDE_PDIOR#
27
IDE_PDA1
27 IDE_PDIOW #
IDE_PDD6
IDE_PDD7
IDE_PDD8
IDE_PDD9
IDE_PDD2
IDE_PDD12
IDE_PDD3
IDE_PDD13
PD_PDDACK#
PD_PDIOR#
PD_PDA1
PD_PDIOW#
5
6
7
8
1
2
3
4
RP88
1
2
3
4
RP79
1
2
3
4
RP89
IDE_PDD4
IDE_PDD10
IDE_PDD5
IDE_PDD11
PIDE_RST#
PD_D7
PD_D6
PD_D5
PD_D4
PD_D3
PD_D2
PD_D1
PD_D0
33_1206_8P4R_5%
4
3
2
1
8
7
6
5
8
7
6
5
8
7
6
5
PD_D6
PD_D7
PD_D8
PD_D9
33_1206_8P4R_5%
PD_D4
PD_D10
PD_D5
PD_D11
33_1206_8P4R_5%
PD_D2
35
PHDD_LED#
PD_D12
PD_D3
1
+5VS
PD_D13
R349
33_1206_8P4R_5%
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
PD_PDDREQ
PD_PDIOW#
PD_PDIOR#
PD_PD IORDY
PD_PDDACK#
PD_IRQ14
PD_PDA1
PD_PDA0
PD_PDCS1#
2
100K_0402_5%
+5VS
3
JP10
IDE_PDDACK#
ID E_PDIOR#
IDE_PDA1
IDE_PDIOW #
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
PD_D8
PD_D9
PD_D10
PD_D11
PD_D12
PD_D13
PD_D14
PD_D15
1
R352
PD_D7
2
10K_0402_1%
1
R351
PD_PDDREQ
2
5.6K_0402_5%
U35
Y
2
PIDERST#
P
IDE_PDD0
IDE_PDD14
IDE_PDD1
IDE_PDD15
+5V
C353
@0.1U_0402_16V4Z
2
1
R355
4.7K_0402_5%
G
IDE_PDD[0..15]
27 IDE_PDD[0..15]
PIDE_RST#
4
@TC7SH08FU_SSOP5
D27
1
2
RB751V_SOD323
R356
2
+3VS
PCSEL
1
R354
R3531
2
470_0402_5%
1
10K_0402_5%
0_0402_5%
2
PD_PDA2
PD_PDCS3#
+5VS
SUYIN_200138FR044G242ZL
IDE_PDDREQ
27 IDE_PDDREQ
27 IDE_PDCS1#
27 IDE_PDCS3#
27
IDE_PDA0
27
IDE_PDA2
PD_PDDREQ
+5VS
33_1206_8P4R_5%
PD_PDCS1#
PD_PDCS3#
PD_PDA0
PD_PDA2
1
1
2
R488
33_0402_5%
RP81
IDE_PDCS1#
IDE_PDCS3#
IDE_PDA0
IDE_PDA2
4
3
2
1
5
6
7
8
1
R484
2
1
C356
1000P_0402_50V7K
2
2
1
C354
10U_0805_10V4Z
2
1
C355
1U_0603_10V4Z
C357
0.1U_0402_16V4Z
2
Place component's closely IDE CONN.
27
IN T_IRQ14
INT_IRQ14
PD_IRQ14
33_0402_5%
1
2
R483 8.2K_0402_5%
2
+3VS
R338
4.7K_0402_5%
1
R340
SD_SDA0
SD_SDCS1#
SD_SDA2
SD_SDCS3#
33_1206_8P4R_5%
CD-ROM Module CONN.
IDE_SDIOW#
27 IDE_SDDREQ
27 IDE_SDIOR#
27 IDE_SDDACK#
27
IDE_SDA1
8
7
6
5
8
7
6
5
8
7
6
5
IDE_SDDREQ 1
2
R514
33_0402_5%
ID E_SDIOR#
1
IDE_SDDACK# 2
IDE_SDD0
3
IDE_SDA1
4
RP78
8
7
6
5
SD_D6
SD_D11
SD_D1
SD_SDIOW#
33_1206_8P4R_5%
SD_D9
SD_D3
32
SD_D14
SD_D12
33_1206_8P4R_5%
SD_D5
SD_D7
SD_D10
SD_D8
33_1206_8P4R_5%
SD_D2
SD_D15
SD_D4
SD_D13
33_1206_8P4R_5%
1
R515
2
1
2
32
CD_AGND
SIDE_RST#
SD_D7
SD_D6
SD_D5
SD_D4
SD_D3
SD_D2
SD_D1
SD_D0
C343
12P_0402_50V8J
SD_SDIOW#
SD_SD IORDY
SD_IRQ15
SD_SDA1
SD_SDA0
SD_SDCS1#
35
SD_IRQ15
33_0402_5%
SD_SDDREQ
27
2
SIDERST#
B
A
+5VS
1
R341
SHDD_LED#
2 SHDD_LED#
100K_0402_5%
+5VS
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
U34
Y
JP25
INT_CD_L
2
IN T_IRQ15
SD_D7
2
5.6K_0402_5%
NB_RST# 1
SIDE_RST#
4
@TC7SH08FU_SSOP5
D26
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
SUYIN_800189MB050S105ZL
INT_IRQ15
2
10K_0402_1%
1
R333
12P_0402_50V8J
R336
470_0402_5%
27
+5V
C333
@0.1U_0402_16V4Z
2
1
1
R339
C328
1
2
SD_SDDREQ
SD_SDIOR#
SD_SDDACK#
SD_D0
SD_SDA1
33_1206_8P4R_5%
33_0402_5%
3
8
7
6
5
1
27
IDE_SDD6
1
IDE_SDD11
2
IDE_SDD1
3
IDE_SDIOW # 4
RP77
IDE_SDD9
1
IDE_SDD3
2
IDE_SDD14
3
IDE_SDD12
4
RP85
IDE_SDD5
1
IDE_SDD7
2
IDE_SDD10
3
IDE_SDD8
4
RP76
IDE_SDD2
1
IDE_SDD15
2
IDE_SDD4
3
IDE_SDD13
4
RP86
SD_SD IORDY
2
5
27
IDE_SDA0
27 IDE_SDCS1#
27
IDE_SDA2
27 IDE_SDCS3#
8
7
6
5
P
27 IDE_SDIORDY
IDE_SDA0
1
IDE_SDCS1# 2
IDE_SDA2
3
IDE_SDCS3# 4
RP87
G
IDE_SDD[0..15]
1
27 IDE_SDD[0..15]
INT_CD_R 32
1
SD_D8
SD_D9
SD_D10
SD_D11
SD_D12
SD_D13
SD_D14
SD_D15
SD_SDDREQ
SD_SDIOR#
2100K_0402_5%
SD_SDA2
SD_SDCS3#
1
2
10K_0402_5%
+5VS
+5VS
+5VS
W=80mils
1
2
2
1
R337
+3VS
SD_SDDACK#
R331
1
2
RB751V_SOD323
1
C330
1000P_0402_50V7K
2
1
C329
10U_0805_10V4Z
2
1
C327
1U_0603_10V4Z
2
C331
0.1U_0402_16V4Z
C344
0.1U_0402_16V4Z
Place component's closely CD-ROM CONN.
1
2
R526 8.2K_0402_5%
Title
Compal Electronics, Ltd.
IDE & CD-ROM Connector
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Size
Document Number
CustomLA-2051
Date:
Friday, November 14, 2003
R ev
1.0
Sheet
30
of
51
+USB_VCCB
+3V
+USB_VCCA
1
1
http://laptopblue.vn
R31
100K_0402_5%
100K_0402_5%
R41
2
2
+5V
1
2
C25
0.1U_0402_16V4Z
C31
10U_0805_10V4Z
1
2
3
4
1
GND
IN
EN1#
EN2#
1
2
1
@0_0402_5%
2
0_0402_5%
R34
U37
OC1#
OUT1
OUT2
OC2#
8
7
6
5
1
R25
2
47_0402_5%
1
R50
2
47_0402_5%
R30
1
2
0_0402_5%
2
@0_0402_5%
R48
TPS2042ADR_SO8
1
2
C32
0.1U_0402_16V4Z
1
1
2
2
R40
C37
0.1U_0402_16V4Z
OVCUR_USB20#0 24
OVCUR#1 27
OVCUR#2 27
+USB_VCCA
OVCUR_USB20#1 24
1
1
C369 +
150U_D2_6.3VM
2
2
C368
470P_0603_50V8J
U SB_CGND
24 USB20_NEC_P0-
1
2
1
2
R373
24 USB20_NEC_P0+
USB
CONNECTOR
@0_0603_5%
R374
@0_0603_5%
JP13
27
USB20P1-
27
USB20P1+
1
2
1
2
R363
0_0603_5%
R364
1
2
3
4
5
6
7
8
USB0USB0+
0_0603_5%
USB1USB1+
1
24 USB20_NEC_P1-
USB20P2-
27
USB20P2+
@0_0603_5%
1
24 USB20_NEC_P1+
27
2
R371
TYCO_1470713-1
2
R372
@0_0603_5%
1
2
1
2
R365
0_0603_5%
R366
0_0603_5%
+USB_VCCB
Keep 20 mils minimum spacing
1
1
C375 +
150U_D2_6.3VM
+USB_VCCC
+3V
2
2
C364
470P_0603_50V8J
1
1
USB_BGND
R348
R342
@100K_0402_5% @100K_0402_5%
1
2
1
2
R345
2
2
+5V
@0_0402_5%
OVCUR_USB20#2 24
U46
C702
@0.1U_0402_16V4Z
1
2
1
2
3
4
1
GND
IN
EN1#
EN2#
1
R346
8
7
6
5
OC1#
OUT1
OUT2
OC2#
C352
@0.1U_0402_16V4Z
@TPS2042ADR_SO8
2
2
@47_0402_5%
C699
@10U_0805_10V4Z
R344
@0_0402_5%
OVCUR#3 26
1
2
+USB_VCCC
1
1
C700 +
@150U_D2_6.3VM
2
2
C701
@470P_0603_50V8J
USB
CONNECTOR
USB_AGND
JP26
USB2-
USB2+
USB1-
USB1+
USB0-
USB0+
1
1
1
1
1
1
C349
@10P_0402_50V8K
2
C345
@10P_0402_50V8K
2
C27
12P_0402_50V8K
2
C26
12P_0402_50V8K
2
C29
12P_0402_50V8K
2
C28
12P_0402_50V8K
27
USB20P3-
27
USB20P3+
24 USB20_NEC_P224 USB20_NEC_P2+
1
2
1
2
R576
@0_0603_5%
R574
@0_0603_5%
1
2
1
2
R575
R573
USB2USB2+
1
2
3
4
1
2
3
4
@TYCO_1470712-1
@0_0603_5%
@0_0603_5%
2
Title
Compal Electronics, Ltd.
USB & Bluetooth
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Size
Document Number
CustomLA-2051
Date:
Friday, November 14, 2003
R ev
1.0
Sheet
31
of
51
5
4
AC97 Codec
3
2
1
+5VALW
Adjustable Output
http://laptopblue.vn
U43
INT_CD_R
2
R183
2
R182
INT_CD_R
C D_L
1
20K_0402_5%
1
20K_0402_5%
ALC250 Pin17 INTERNAL
PULL HIGH 50Kohm
CD _R
1
1
33
2
R190
MD_SPK
33
1
MIC
C_MD_SPK
2
1
10K_0402_5%
1
C155
0.01U_0402_25V4Z
1
R185
2.4K_0402_5%
C148
2
2
@0.01U_0402_25V4Z
33
MONO_IN
27
IAC_RST#
2
C
27,29
IAC_SYNC
27,29 IAC_SDATAO
16
17
EN_EQ#
LINEIN_L
2
C158
LIN EIN_R 2
C157
C D_L
2
C163
CD _R
2
C161
C D_GNA
2
C162
M IC
2
C160
2
C159
C_MD_SPK 2
C164
R181
20K_0402_5%
2
R184
20K_0402_5%
15
1
1U_0402_6.3V4Z
1
1U_0402_6.3V4Z
1
1U_0402_6.3V4Z
1
1U_0402_6.3V4Z
1
1U_0402_6.3V4Z
1 C _MIC
1U_0402_6.3V4Z
1
0.1U_0402_16V4Z
1
1U_0402_6.3V4Z
2
C D_GNA
1
33
24
18
20
19
21
22
13
12
IAC_RST# 1
R196
IAC_ SYNC
2
100_0402_5%
11
10
IAC_SDATAO
5
XTLSEL=0 external clock 14.318M
2
1
R231
@0_0402_5%
45
46
47
EAPD
CD_AGND
R427
20K_0402_5%
4
7
R426
3
2
LINE_OUT_R
VIDEO_L
MONO_OUT
VIDEO_R
TRUE_LOUT_L
LINE_IN_L
TRUE_LOUT_R
LINE_IN_R
BIT_CLK
CD_L
SDATA_IN
CD_R
XTL_IN
35
LINEL
36
LINER
37
1
C195
1
C203
1
C216
2
4.7U_0805_10V4Z
2
4.7U_0805_10V4Z
2
1U_0402_6.3V4Z
R221
1
22_0402_5%
2
LINE_OUT_L
2
C552
4.7U_0805_10V4Z
D
6
2
1
R213
XTL_IN
3
XTL_OUT
8
IAC_BITCLK
AFILT1
PC_BEEP
AFILT2
VREFOUT
RESET#
VREF
SYNC
VRDA
1
C172
1
C178
29
30
1
C201
2
2
1000P_0402_50V7K
2
1000P_0402_50V7K
1
R229
VRAD
DCVOL
VAUX
GPIO0
GPIO1
EAPD
SPDIFO
NC
AVSS1
AVSS2
DVSS1
DVSS2
2
@22P_0402_50V8J
2
@10K_0402_5%
CLK_AUDIO_14M 16
2
+3VS
@10K_0402_5%
X3
XTL_IN
R230
@10K_0402_5%
2
1
24.576MHz_16P_3XG-24576-43E1
2
2
2
0_0805_5%
1
L8
2
0_0805_5%
1
L6
2
0_0805_5%
1
L43
2
0_0805_5%
C455
22P_0402_50V8J
C
28
+AUD_VREF
27
R459
32
XTL_IN
31
33
34
43
44
40
26
42
1
@0.01U_0402_25V4Z
C467
+AVDD_AC97
1
1
2
R206@0_0402_5%
R200
A GND
2
2
C454
1U_0402_6.3V4Z
0.1U_0402_16V4Z
1
1
C476
C448
1U_0402_6.3V4Z
2
2
1
1
2
2
EXCLK_AUDIO 38
@10_0402_5%
C447
4.7U_0805_10V4Z
C167
0.1U_0402_16V4Z
1
L15
XTL_OUT
1
1
C495
22P_0402_50V8J
SDATA_OUT
NC
XTLSEL
1
C192
IAC_SDATAI0 1
R214
IAC_SDATAI0 27
2 @0.01U_0402_25V4Z
@1U_0402_6.3V4Z
IAC_BITCLK
IAC_BITCLK 27
IAC_SDATAI0
2
22_0402_5%
C2001
R452
@1M_0402_5%
PHONE
2
1000P_0402_50V7K
2
1000P_0402_50V7K
MD_MIC
39
MIC1
XTL_OUT
1
C189
1
C215
LINER
LINE_OUT_R 33
@1K_0402_5%
B
C509
0.1U_0402_16V4Z
41
CD_GND
MIC2
LINEL
LINE_OUT_L 33
LINE_OUT_R
ALC202A E_LQFP48
DGND
1
1
2
GND
SI9182DH-AD_MSOP8
1
2
LINE_OUT_L
AUX_R
20K_0402_5%
2
2
R425
0_0402_5%
SD
R473
69.8K_0603_1%
1
CNOISE
R465
24K_0402_1%
AUX_L
1
48
1
30
23
ERROR
+VDDA
6
SENSE or ADJ
SUSP#
20,35,36,40 SUSP#
2
30
INT_CD_L
8
C182
10U_0805_10V4Z
1
INT_CD_L
2
7
2
+VDDA
5
VOUT
DELAY
+AUD_VREF
2
14
30
1
2
2
AVDD1
U21
1
1
2
0.1U_0402_16V4Z
C207
C211
10U_0805_10V4Z
2
VIN
9
2
1
1
2
C517
DVDD2
1
DVDD1
C442
0.1U_0402_16V4Z
R179
@68K_0402_5%
2
D
C531
4.7U_0805_10V4Z
38
1
R180
@68K_0402_5%
4
2
1
2
CHB2012U170_0805
+VDDA
0.1U_0402_16V4Z
1
1
LIN EIN_R
1
+3VS
L30
1
+AVDD_AC97
LINEIN_L
2
0_0402_5%
2
0_0402_5%
25
LINE_IN_R
1
R176
1
R175
1
33
LINE_IN_L
AVDD2
33
1
1
2
2
C154
4.7U_0805_10V4Z
AGND
B
DGND
AGND
MDC Connector
1
R82
+3V
JP16
2
0_0402_5% 1
0.1U_0402_16V4Z
C703
2
+3V_MDC
1
2
+3VS
L3
CHB1608B121_0603 +3VS_MDC
IAC_SDATAO
IAC_RST#
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
MD_SPK
L1
1
2
CHB1608B121_0603
R81
+3VS_MDC_R
1
2
10K_0402_5%
+5VS_MDC
1
R84
1
R87
+5VS
+3VS
IAC_ SYNC
2
0_0402_5%
1
R86
2
22_0402_5%
IAC_SDATAI1 27
IAC_BITCLK
2
22_0402_5%
1
AMP 3-1565120-0 30P H:9MM
R83
10K_0402_5%
A
2
A
Title
Compal Electronics, Ltd.
AC97 Codec ALC202
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Size
Document Number
CustomLA-2051
Date:
R ev
1.0
Sheet
Friday, November 14, 2003
1
32
of
51
A
B
Audio AMP
C
D
E
http://laptopblue.vn
+5VS_AMP
1
W/O EQ
PIN 10,4 ACTIVE
LOW
PIN 9,5 ACTIVE
Bias
(Gain)
R264
100K_0402_5%
1
C236
1
C241
LINE_OUT_L
32 LINE_OUT_R
12 dB
2
0.47U_0603_16V4Z
2
0.47U_0603_16V4Z
17
LINE_OUT_L
1
C250
1
C251
LINE_OUT_R
2
0.47U_0603_16V4Z
2
0.47U_0603_16V4Z
HP_L
1
12
13
24
1
2
1
1
VR1
10K
1
R307
D
3.6K_0402_5%
Q26
2N7002_SOT23
2
G
D
R308
3.6K_0402_5%
S
Q28
2N7002_SOT23
1
S
C279
C267
C273
2
2 0.47U_0603_16V4Z
0.47U_0603_16V4Z
0.47U_0603_16V4Z
(0.47U~1U)
C269
0.047U_0402_16V4Z
+AUD_VREF
1
2
-2dB
NBA_PLUG 2
G
H P_R
HP won't
implement
EQ.
1.006V
INTSPK_L2
INTSPK_R2
1
TPA0232PWP_TSSOP24
2
1
C2751
4
5
R313
100K_0402_5%
HP
NBA_PLUG
20.1U_0402_16V4Z
1
INTSPK_L1
INTSPK_R1
OUT_L
2
1
0.47U_0603_16V4ZC243
OUT_R
2
1
0.47U_0603_16V4ZC240
2
3
4
21
5
23
6
20
22
15
14
11
9
16
10
8
2
056 V
3
NBA_PLUG
VOL_AMP
PVDD SHUTDOWN#
PVDD
SE/BTL#
VDD
PC-BEEP
BYPASS
HP/LINE#
LOUTVOLUME
ROUTLOUT+
LIN
ROUT+
RIN
LLINEIN
RLINEIN
GND
LHPIN
GND
RHPIN
GND
GND
CLK
1
7
18
19
VR - C-Type
VOL_AMP
SPK
U26
Pin 22
32
+5VS_AMP
32
2
HIGH
3.6K
4
1
R308
EAPD
2
+5VS_AMP
4.3K_0402_5%
1
S
3
Q46
2N7002_SOT23
2
G
+5VS_AMP
D
C264
4.7U_0805_10V4Z
1
R312
3
2
3.6K
Speaker Connector
MICROPHONE
IN JACK
R236
2.2K_0402_5%
R237
@2.2K_0402_5%
5
2
3
1
1
2
2
1
4.3K
R307
4
3
JP4
2
C256
0.1U_0402_16V4Z
4
2
SHUTDOW N#
3
1 C237 VOL_AMP
0.1U_0402_16V4Z
W=40Mil
R513
2
2
1
2
CHB2012U170_0805
1
2
CHB2012U170_0805
L45
+5VS
OUT_R
1
OUT_L
1
R261
1
R269
3
2
1.3K_0402_5%
2
1.3K_0402_5%
R268
100K_0402_5%
+5VS_AMP
L44
L50
2 FBM-11-160808-121-T_0603
2 FBM-11-160808-121-T_0603
2 FBM-11-160808-121-T_0603
2 FBM-11-160808-121-T_0603
L10
1
2
3
4
R385=R386= 1.3K Ohm
C537=C539= 0.47U
32
M IC
MIC
1
3
6
2
1
MIC-1
2
FBM-11-160808-700T_0603
C224
220P_0402_50V8K
3
2
2
R = R385, R386
C = C537, C539
D51
SM05_SOT23
1
2
1
D52
SM05_SOT23
fo=1/(2*3.14*R*C)=260Hz
R=1.3K / C=0.47U
FOX_JA6033L-5S1-TR
1
ACES_85204-0400
3
W/O EQ
JP5
L51
1 L52
1 L53
1
1
INTSPK_L1
INTSPK_L2
INTSPK_R1
INTSPK_R2
LINE IN JACK
JP2
5
L28
2
System Sound
32
LINE_IN_R
1
32
LINE_IN_L
1
L29
+VDDA
+3VALW
BEEP#
+3VALW
1
C166
1
2
R193
100K_0402_5%
R210
10K_0402_5%
O
6
5
I
O
1
SN74LVC125APWLE_TSSOP14
C173
0.22U_0603_16V4Z
R204
1
1
R211
10K_0402_5%
2
1U_0402_6.3V4Z 560_0402_5%
SN74LVC14APWLE_TSSOP14
+3V POWER
32
2
C196
1
560_0402_5%
Q25
2SC2411K_SC59
2
B
E
R220
2.4K_0402_5%
+
FBM-11-160808-700T_0603
NBA_PLUG
L40
INTSPK_R1_1 1
INTSPK_R1_2
2
2
150U_D2_6.3VM
L41
INTSPK_L1_1 1
INTSPK_L1_2
2
2
150U_D2_6.3VM
FBM-11-160808-700T_0603
1
1
+3VALW
C632
330P_0402_50V7K
O
C181
1
2
FOX_JA6033L-5S1-TR
C607
330P_0402_50V7K
1
1U_0402_6.3V4Z
R207
1
2
560_0402_5%
R216
2
2
B
Title
D22
RB751V_SOD323
10K_0402_5%
A
2
3
6
2
1
1
SN74LVC14APWLE_TSSOP14
8
1
14
P
I
G
SB_SPKR
2
4
+3V POWER
7
27
HEADPHONE
OUT JACK
2
@0_0402_5%
5
INTSPK_R1 1
C621
INTSPK_L1 1
C637
1
9
2
FOX_JA6033L-5S1-TR
JP6
+
M ONO_IN_I
2
1
1
1
R613
EN_EQ#
2
1
C
3
1U_0402_6.3V4Z
U19D
3
6
2
1
MONO_IN 32
1U_0402_6.3V4Z
C190
1
2
PCM_SPK#
LINE_IN_L-1
C193
10U_0805_10V4Z
2
MONO_IN_O
2
R223
20
2
FBM-11-160808-700T_0603
2
C179
1
2
6
1
U19C
P
R197
1
2
8.2K_0402_5%
2
14
2
U18B
G
I
7
5
OE#
4
0.1U_0402_16V4Z
L INE_IN_R-1
1
1
FBM-11-160808-700T_0603
C435
C431
330P_0402_50V7K
330P_0402_50V7K
2
2
1
35
4
2
Compal Electronics, Ltd.
Audio AMP & JACK
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Size
Document Number
CustomLA-2051
Date:
R ev
1.0
Sheet
Friday, November 14, 2003
E
33
of
51
A
B
C
D
E
http://laptopblue.vn
SUPER I/O SMsC LPC47N217
RP9
D CD#1
R I#1
CTS#1
DSR#1
U14
1
R162 1
R113 1
R186
+3VS
18
SIO_PD#
SIO_SMI#
SIO_PME#
2
2 10K_0402_5%
2 10K_0402_5%
10K_0402_5%
17
18
PM_CLKRUN#
CLK_PCI_SIO
SE RIRQ
SIO_PME#
19
20
21
6
CLKRUN#
PCI_CLK
SER_IRQ
IO_PME#
CLK14
23
24
25
27
28
29
30
31
32
33
34
35
36
40
F IR_DET#
R145
+3VS
PCI_RESET#
LPCPD#
9
P ID0
P ID1
P ID2
P ID3
LPC_AD[0..3]
26,35 LPC_AD[0..3]
LFRAME#
LDRQ#
100K_0402_5%
2
1
SIO_GPIO11
SIO_SMI#
SIO_IRQ
SIO_GPIO23
SERIAL I/F
SIO_PD#
CLK_SIO_14M
16 CLK_SIO_14M
PID[0..3]
PID[0..3]
15
16
LPC I/F
19,20,22,24,25,26,35 PM_CLKRUN#
26 CLK_PCI_SIO
20,26,35 SERIRQ
LPC_FRAME#
LPC_DRQ#1
LAD0
LAD1
LAD2
LAD3
IRRX2
IRTX2
IRMODE/IRRX3
CLOCK
GPIO40
GPIO41
GPIO42
GPIO43
GPIO44
GPIO45
GPIO46
GPIO47
GPIO10
GPIO11/SYSOPT
GPIO12/IO_SMI#
GPIO13/IRQIN1
GPIO14/IRQIN2
GPIO23
8
22
43
52
VSS
VSS
VSS
VSS
RXD1
TXD1
DSR1#
RTS1#
CTS1#
DTR1#
RI1#
DCD1#
FIR
GPIO
7,26,30,35 NB_RST#
1
10
12
13
14
PARALLEL I/F
26,35 LPC_FRAME#
@0_0402_5%
26 LPC_DRQ#1
PCIRST# 1
2
R617
1
2
R618
0_0402_5%
10,19,20,21,22,24,25,26,35 PCIRST#
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
POWER
INIT#
SLCTIN#
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
SLCT
PE
BUSY
ACK#
ERROR#
ALF#
STROBE#
VTR
VCC
VCC
VCC
VCC
62
63
64
1
2
3
4
5
RXD1
TXD1
DSR#1
RTS#1
CTS#1
DTR#1
R I#1
D CD#1
37
38
39
IRRX
IRTXOUT
IRMODE
41
42
44
46
47
48
49
50
51
53
55
56
57
58
59
60
61
INIT#
SLCTIN#
LPD0
LPD1
LPD2
LPD3
LPD4
LPD5
LPD6
LPD7
LPTSLCT
LPTPE
LPTBUSY
LPTACK#
LPTERR#
LPTAFD#
LPTSTB#
1
2
3
4
+3VS
8
7
6
5
4.7K_1206_8P4R_5%
1
SIO_IRQ
SIO_GPIO23
RXD1
IRRX
7
11
26
45
54
2
R112
2
R111
1
R157
1
R116
1
10K_0402_5%
1
@10K_0402_5%
2
1K_0402_5%
2
10K_0402_5%
Serial Port
for Debug
+3VS
LPC47N217_STQFP64
+3VS
+5VS
2
2
+3VS
2
R154
10_0402_5%
1
C147
1
C124
4.7U_0805_10V4Z
2
10P_0402_50V8K
2
2
* 0 = 02Eh
1 = 04Eh
SIO_GPIO11
1
2
3
4
5
6
7
8
9
10
RXD1
TXD1
DSR#1
RTS#1
CTS#1
DTR#1
R I#1
D CD#1
Base I/O Address
1
C117
0.1U_0402_16V4Z
1
2
C114
0.1U_0402_16V4Z
1
2
C91
2
1
C153
@15P_0402_50V8J
R118
@10K_0402_5%
1
1
1
R187
@10K_0402_5%
JP22
2
CLK_PCI_SIO
2
CLK_SIO_14M
R114
1K_0402_5%
@E&T_96212-1011S
1
2
1
2
3
4
5
6
7
8
9
10
0.1U_0402_16V4Z
RP38
Parallel Port
LPTACK#
LPTBUSY
LPTPE
LPTSLCT
3
6
7
8
9
10
+5V_PRN
+5V_PRN
AFD#/3M#
LPTERR#
LPTINIT#
LPTSLCTIN#
2
+5VS
3
FIR Module
D6
1
1
+5V_PRN
5
4
3
2
1
RB420D_SOT23
2.7K_1206_10P8R_5%
R14
2.2K_0402_5%
CP2
LPTSLCTIN#
LPTINIT#
LPTERR#
AFD#/3M#
FD0
FD1
FD2
FD3
220P_1206_8P4C_50V8K
CP9
4
5
3
6
2
7
1
8
FD4
FD5
FD6
FD7
6
7
8
9
10
+5V_PRN
5
4
3
2
1
FD7
FD6
FD5
FD4
+5V_PRN
1
R134
C3
1
47_0402_5%
AFD#/3M#
LPTAFD#
FD0
LPTERR#
FD1
INIT#
FD2
SLCTIN#
FD3
RP4
FD4
LPD0
LPD1
LPD2
LPD3
1
2
3
4
8
7
6
5
FD0
FD1
FD2
FD3
FD5
FD6
FD7
68_1206_8P4R_5%
LPTACK#
4
RP3
LPD7
LPD6
LPD5
LPD4
220P_1206_8P4C_50V8K
2
2
0_0402_5%
2
+3VS
FD0
FD1
FD2
FD3
2.7K_1206_10P8R_5%
220P_1206_8P4C_50V8K
CP10
8
1
7
2
6
3
5
4
1
4
3
2
1
5
6
7
8
FD7
FD6
FD5
FD4
LPTBUSY
LPTPE
LPTSLCT
220P_0402_50V8K
(60mil)
+3VS
JP11
1
R16
1
R17
1
R13
1
2
14
33_0402_5%
2
15
3
LPTINIT#
2
16
33_0402_5%
4
LPTSLCTIN# 17
2
33_0402_5%
5
18
6
19
7
20
8
21
9
22
10
23
11
24
12
25
13
1
R383 @4.7_1206_5%
+IR_ANODE
2
@22U_1206_10V4Z
1
1
2
4.7_1206_5%
C704
1
C727
22U_1206_10V4Z
2
220P_1206_8P4C_50V8K
CP1
LPTACK#
1
8
LPTBUSY
2
7
LPTPE
3
6
LPTSLCT
4
5
F IR_DET#
R15
LPTSTB#
RP2
@10U_0805_10V4Z
1
C400
2
1
+
1
C705
U39
IRRX
+IR_3VS
1 (30mil)
2
(60mil)
R385
2
R392
47_1206_5%
2
1
8
7
6
5
2
1
2
3
4
C399
0.1U_0402_16V4Z
2
4
6
8
C728
IRED_C
RXD
VCC
GND
IRED_A
TXD
SD/MODE
MODE
1
3
5
7
TFDU6102-TR3_8P
PCB Footprint : TFDU6101E
10U_0805_10V4Z
@150U_D2_6.3VM
2
IRTXOUT
IRMODE
1
2
R393
@0_0402_5%
2
Reserved
SD/MODE: SHUTDOWN MODE, HIGH ACTIVE
MODE: HIGH/LOW SPEED SELECT
4
68_1206_8P4R_5%
SUYIN_070536FR025S204ZU
Title
Compal Electronics, Ltd.
LPC-Super I/O
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
D
Size
Document Number
CustomLA-2051
Date:
R ev
1.0
Sheet
Friday, November 14, 2003
E
34
of
51
5
4
+3VALW
+3VALW
1000P_0402_50V7K
+EC_AVCC
+EC_VDD
C144
2
1
NS591L
1
2
C109
0.1U_0402_16V4Z
U15
+3VALW
1
D
2
2
CHB1608U800_0603
7
1
2
8
R132
@0_0402_5% 9
LPC_AD0
15
LPC_AD1
14
LPC_AD[0..3]
LPC_AD2
13
LPC_AD3
10
18
EC_RST#
19
22
910_NUMLED#
23
20,26,34 SERIRQ
26 LPC_DRQ#0
26,34 LPC_FRAME#
C233
0.1U_0402_16V4Z
26,34 LPC_AD[0..3]
E CAGND
1
26 CLK_PCI_EC
R137
10_0402_5%
BATT_TEMP
1
0.01U_0402_25V4Z
2
C206
2
E CAGND
+3VALW
2
EC_SCI#
EC_SCI#
1
R590
2
31
0_0402_5%
2
27
C102
27
10P_0402_50V8K
5
6
GATEA20
KBRST#
C712
@0.01U_0402_25V4Z
37
37
37
37
37
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
71
72
73
74
77
78
79
80
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68
EC_PLAYBTN#
EC_STOPBTN#
EC_REVBTN#
EC_FRDBTN#
TV_OUT_EN#
POP FOR KB910 (Reserved)
2
+3VALW
R423
10K_0402_5%
1
C
19,20,22,24,25 1394_PME#
+3VALW
19,20,22,24,25 WLANPME#
KB910 (Must)
EC_TINT# 105
EC_TCK
106
EC_TDO
107
E C_TDI
108
EC_TMS
109
pin110 reserve for KSO16
PSCLK1 110
PSDAT1 111
PSCLK2 114
PSDAT2 115
TP_CLK 116
37
TP_CLK
TP_DATA 117
37
TP_DATA
118
37 EC_LID_SW#
591_HDD_LED#119
1
R258
19,20,22,24,25 PCM_PME#
EC_PME#
19,20,22,24,25 LAN_PME#
19,20,22,24,25 USB20_PME#
+5VS
+3VALW
AD0
AD1
AD2
AD3
IOPE0AD4
IOPE1/AD5
IOPE2/AD6
IOPE3/AD7
DP/AD8
DN/AD9
Host interface
AD Input
DA0
DA1
DA2
DA3
DA output
IOPD3/ECSCI#
1
EC_RST#
1
4.7K_0402_5%
1
2
R136
27
SERIRQ
LDRQ#
LFRAME#
LAD0
LAD1
LAD2
LAD3
LCLK
RESET1#
SMI#
PWUREQ#
2
@100K_0402_5%
GA20/IOPB5
KBRST/IOPB6
IOPA0/PWM0
IOPA1/PWM1
IOPA2/PWM2
IOPA3/PWM3
IOPA4/PWM4
IOPA5/PWM5
IOPA6/PWM6
IOPA7/PWM7
PWM
or PORTA
KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7
IOPB0/URXD
IOPB1/UTXD
IOPB2/USCLK
IOPB3/SCL1
IOPB4/SDA1
IOPB7/RING/PFAIL/RESET2
Key matrix scan
PORTB
KBSOUT0
KBSOUT1
KBSOUT2
KBSOUT3
KBSOUT4
KBSOUT5
KBSOUT6
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12
KBSOUT13
KBSOUT14
KBSOUT15
IOPC0
IOPC1/SCL2
IOPC2/SDA2
IOPC3/TA1
IOPC4/TB1/EXWINT22
IOPC5/TA2
IOPC6/TB2/EXWINT23
IOPC7/CLKOUT
PORTC
TINT#
TCK
TDO
TDI
TMS
PORTD-1
IOPD0/RI1/EXWINT20
IOPD1/RI2/EXWINT21
IOPD2/EXWINT24/RESET2
PORTE
IOPE4/SWIN
IOPE5/EXWINT40
IOPE6/LPCPD/EXWIN45
IOPE7/CLKRUN/EXWINT46
JTAG debug port
PSCLK1/IOPF0
PSDAT1/IOPF1
PSCLK2/IOPF2
PSDAT2/IOPF3
PSCLK3/IOPF4
PSDAT3/IOPF5
PSCLK4/IOPF6
PSDAT4/IOPF7
IOPH0/A0/ENV0
IOPH1/A1/ENV1
IOPH2/A2/BADDR0
IOPH3/A3/BADDR1
IOPH4/A4/TRIS
IOPH5/A5/SHBM
IOPH6/A6
IOPH7/A7
PORTH
PS2 interface
IOPI0/D0
IOPI1/D1
IOPI2/D2
IOPI3/D3
IOPI4/D4
IOPI5/D5
IOPI6/D6
IOPI7/D7
RP56
C RY1
1
2
3
4
MODE#
FRD#
SELIO#
FSEL#
8
7
6
5
2
4.7K_0402_5%
2
4.7K_0402_5%
1 TP_CLK
R249
1 TP_DATA
R250
C RY2
158
160
PORTI
32KX1/32KCLKIN
32KX2
10K_1206_8P4R_5%
IOPJ0/RD
IOPJ1/WR0
PORTJ-1
SELIO#
B
SUSP#
36
BKOFF#
FSEL#
FSEL#
173
174
47
PORTM
2
2
20M_0603_5%
SEL0#
SEL1#
CLK
1
1
1
2
5
1
R140
1
R141
4
OUT
1
Analog Board ID definition,
Please see page 3.
X1
32.768KHZ_12.5P_1TJS125DJ2A073
NC
IN
2
NC
0.1U_0402_16V4Z
153
154
162
163
164
165
EC_URXD
INVT_PWM 18
BEEP#
33
PW R_SUSP_LED 37
ACOFF
43
PM_BATLOW# 27
EC_ON
37
EC_LID_OUT# 27
B ID1
EC_UTXD/KSO17
EC_USCLK
EC_SMC1
EC_SMD1
RESET#
EC_UTXD/KSO17 37
EC_SMC1 36,38,42
EC_SMD1 36,38,42
PBTN_OUT# 27
EC_SMC2 6
EC_SMD2 6
FAN_SPEED1 37
EC_SMC2
EC_SMD2
EC_PME#
EC_THERM#
EC_THERM# 27
FAN_SPEED2 37
B ID0
ACIN
NS87591L
ACIN
27,37,41
KILL_SW# 25,37
PM_SLP_S3# 27
20M_0603_5%
No Stuff
Rb
120K_0402_5%
0_0402_5%
C175
10P_0402_50V8K
1
2
4
2
CP6
CP5
4
3
2
1
100P_1206_8P4C_50V8
CP4
2
KSI3
KSI0
KSO0
KSO1
+3VS
300_0402_5%
5
6
7
8
C
4
3
2
1
R318
1
2
300_0402_5%
100P_1206_8P4C_50V8
+3VS
CP3
BADDR1(KBA3) BADDR0(KBA2)
150
151
FRD#
*
KSI1
KSI2
KSO2
KSO4
+5VS
5
6
7
8
4
3
2
1
100P_1206_8P4C_50V8
2
1K_0402_5%
PSCLK1 4
PSDAT1 3
PSCLK2 2
PSDAT2 1
5
6
7
8
KB910 (Reserved)
RP93
@10K_1206_8P4R_5%
I/O Address
SELIO#
591_NUM_LED#
FRD#
FW R#
36
36
SELIO#
36
0
0
0
1
1
0
1
1
Data
2F
4E
4F
(HCFGBAH, HCFGBAL) (HCFGBAH, HCFGBAL)+1
Reserved
B
ENV0 (KBA0)
IRE
* OBD
DEV
PROG
+3VALW
2
10K_0402_5%
2
@10K_0402_5%
1
R623
1
R624
B ID1
TRIS (KBA4)
0
1
0
1
0
0
0
0
+3VALW
KBA2
43
ENV1 (KBA1)
0
0
1
1
SHBM(KBA5)=1: Enable shared memory with host BIOS
TRIS(KBA4)=1: While in IRE and OBD, float all the
signals for clip-on ISE use
B ID0
KBA1
FSTCHG
Index
2E
PHDD_LED# 30
CAPS_LED#
PADS_LED#
KBA16
KBA17
KBA18
KBA19
5
6
7
8
R319
1
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
113
112
104
103
48
4
3
2
1
100P_1206_8P4C_50V8
KSI6
KSI5
KSO6
KSO5
138
139
140
141
144
145
146
147
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
4
3
2
1
100P_1206_8P4C_50V8
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
143
142
135
134
130
129
121
120
CP7
KSO8 5
KSO9 6
KSO13 7
KSI7
8
KSO3 5
KSO7 6
KSO12 7
KSI4
8
124
125
126
127
128
131
132
133
1
R621
4
3
2
1
+3VS
300_0402_5%
PM_CLKRUN# 19,20,22,24,25,26,34
LPCPD
5
6
7
8
100P_1206_8P4C_50V8
R321
1
KSO15
KSO14
KSO10
KSO11
KSO8
KSO9
KSO13
KSI7
KSO3
KSO7
KSO12
KSI4
KSI6
KSI5
KSO6
KSO5
KSI3
KSI0
KSO0
KSO1
KSI1
KSI2
KSO2
KSO4
LPCPD
KBA5
1
R252
1
R253
1
R254
1
R255
2
1K_0402_5%
2
@1K_0402_5%
2
1K_0402_5%
2
1K_0402_5%
R591
@100K_0402_5%
2
R625
@10K_0402_5%
1
R626
10K_0402_5%
2
1
RESET#
1
B ID0
2
B ID1
551 & 87591V
1
2 EC_SCI#
R129
@0_0402_5%
2
@0_0402_5%
2
@0_0402_5%
C107
591_HDD_LED#
2
910_HDD_LED#
1
R251
1
R248
2
0_0402_5%
2
@0_0402_5%
1
R135
1
R138
2
@0_0402_5%
2
0_0402_5%
HDD_LED# 37
@1U_0402_6.3V4Z
A
910_NUMLED#
591_NUM_LED#
NUM_LED#
POP FOR KB910 (Reserved)
Title
C168
12P_0402_50V8J
KSO15
KSO14
KSO10
KSO11
ACES_88170-3400
ON/OFF 37
PM_SLP_S5# 27
KB910
Ra
NUM_LED#
PADS_LED#
CAPS_LED#
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
2
44
24
25
41
42
54
55
EC_USCLK
CP8
3
2
1
Rb
C229
INVT_PWM
152
EC_UTXD/KSO17
JP9
32
33
36
37
38
39
40
43
26
29
30
EC_URXD
@E&T_96212-1011S
2
@0_0402_5%
AD_BID0
2
0_0402_5%
KEYBOARD CONN.
DAC_BRIG 18
EN_DFAN2 37
IREF
43
EN_DFAN1 37
1
CHB1608U800_0603
1
591_AD_BID0
+3VALW
EC_TINT#
EC_TCK
EC_TDO
E C_TDI
EC_TMS
D
ALI/MH# 42
EMAIL#
37
MODE#
37
INTERNET# 37
KBA3
L13
2E CAGND
AD_BID0
R259
0_0402_5%
910_AD_BID0
99
100
101
102
168
169
170
171
172
175
176
1
RESET#
R582
591_AD_BID01
R583
BATT_TEMPA 42
ADP_I
43,46
BATT_OVP 43
POP FOR
1
R247
100K_0402_5%
81
82
83
84
87
88
89
90
93
94
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
9
10
ADB[0..7]
@0_0402_5%
PCIRST# 1
2
R619
1
2
R620
0_0402_5%
910_HDD_LED#
R191
120K_0402_5%
PROPRIETARY NOTE
Rb
2
A
PC87591L-VPCN01 A2_LQFP176
C RY2
IOPL0/A16
IOPL1/A17
IOPL2/A18
IOPL3/A19
IOPL4/WR1#
PORTL
ADB[0..7]
910_AD_BID01
BATT_TEMPB
BATT_TEMP
VBATTA
VBATTB
2
1
C RY1
IOPK0/A8
IOPK1/A9
IOPK2/A10
IOPK3/A11
IOPK4/A12
IOPK5/A13_BE0
IOPK6/A14_BE1
IOPK7/A15_CBRD
PORTK
R194
+3VALW
PORTJ-2
36
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
SYSON
IOPM0/D8
IOPM1/D9
IOPM2/D10
IOPM3/D11
IOPM4/D12
IOPM5/D13
IOPM6/D14
IOPM7/D15
IOPD4
IOPD5
IOPD6
IOPD7
PORTD-2
AGND
VR_ON
148
149
155
156
3
4
27
28
Ra
Ra
1
KBA[0..19]
11
12
20
21
85
86
91
92
97
98
SYSON
SUSP#
VR_ON
39,40,45 SYSON
20,32,36,40 SUSP#
47
VR_ON
21
PCMRST#
27 EC_RSMRST#
30 SHDD_LED#
9
ENBKL#
18
BKOFF#
IOPJ2/BST0
IOPJ3/BST1
IOPJ4/BST2
IOPJ5/PFS
IOPJ6/PLI
IOPJ7/BRKL_RSTO
GND1
GND2
GND3
GND4
GND5
GND6
GND7
R205
47K_0402_5%
2
1
R212
10K_0402_5%
2
1
R215
10K_0402_5%
2
1
62
63
69
70
75
76
17
35
46
122
159
167
137
2 EC_SMC2
4.7K_0402_5%
2 EC_SMD2
4.7K_0402_5%
1
R424
1
R422
EC_SMI#
EC_SMI#
S4_DATA
W L_OFF#
EC_SWI#
S4_LATCH
96
27
39
25
27
39
+5VALW
KBA[0..19]
7,26,30,34 NB_RST#
L12
1
36
0.1U_0402_16V4Z
10,19,20,21,22,24,25,26,34 PCIRST#
161
+3VS
95
1
C217
+RTCVCC
For EC Tools
JP3
UNPOP FOR 551
VBAT
+EC_AVCC
2
0_0402_5%
2
0_0402_5%
http://laptopblue.vn
AVCC
1
1000P_0402_50V7K
1
R131
1
34
45
123
136
157
166
2
2
0.1U_0402_16V4Z
2
2
@0_0402_5%
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
2
2
0.1U_0402_16V4Z
2 R130
16
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
1
2
C130
C108
C430
C180
C230
1
VDD
1
3
R431
KB910 (Reserved)
+3VALW
Compal Electronics, Ltd.
LPC- PC87591
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size
Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom LA-2051
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Friday, November 14, 2003
3
2
R ev
1.0
Sheet
1
35
of
51
http://laptopblue.vn
20
+5VALW
C351
1
2
2
R316
100K_0402_5%
14
0.1U_0402_16V4Z
B
O
6
AA
LARST#
11
1
SN74LVC32APWLE_TSSOP14
+5VALW
1
D0
D1
D2
D3
D4
D5
D6
D7
CP
MR
10
5
1
U10B
A
P
4
SELIO#
SELIO#
7
35
G
KBA2
3
4
7
8
13
14
17
18
VCC
+3VALW
C420
1
2
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
GND
+3VALW
0.1U_0402_16V4Z
U31
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
2
5
6
9
12
15
16
19
CDON_LED# 37
MP3_LED# 37
E-MAIL_LED# 37
PW R_LED# 37
WL_BT_LED# 37
BATT_LOW_LED# 37
BATT_CHGI_LED# 37
CD_FDD_LED# 37
SN74HCT273PW_TSSOP20
C350
1
2
2
R347
20K_0402_5%
1U_0805_25V4Z
System BIOS
+3VALW
R414
100K_0402_5%
0.1U_0402_16V4Z
20,32,35,40
B
Q21
2N7002_SOT23
9
FLASH#
27
10
FW R#
35
KBA[0..19]
35
ADB[0..7]
KBA[0..19]
C59
1
ADB[0..7]
35
2
0.1U_0402_16V4Z
U40
7
SN74LVC32APWLE_TSSOP14
SUSP#
S
1
A
O
G
+3VALW
U41
KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1
KBA0
ADB0
ADB1
ADB2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
A18
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS
512K8-90_PLCC32
VDD
WE#
A17
A14
A13
A8
A9
A11
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
FWE#
KBA17
KBA14
KBA13
KBA8
KBA9
KBA11
FRD#
KBA10
FSEL#
ADB7
ADB6
ADB5
ADB4
ADB3
+3VALW
FRD#
35
FSEL#
35
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19
21
20
19
18
17
16
15
14
8
7
36
6
5
4
3
2
1
40
13
37
FSEL#
FRD#
FWE#
22
24
9
D0
D1
D2
D3
D4
D5
D6
D7
RP#
NC
READY/BUSY#
NC0
NC1
CE#
OE#
WE#
GND0
GND1
31
30
1
25
26
27
28
32
33
34
35
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
10
11
12
29
38
RESET#
2
1
2
R71
@100K_0402_5%
C44
@0.1U_0402_16V4Z
+3VALW
23
39
@SST39VF080-70_TSOP40
1
R75
0.1U_0402_16V4Z
4.7K_0402_5%
U6
8
VCC
7
WP
6
SCL
5
SDA
VCC0
VCC1
A0
A1
A2
GND
1
2
3
4
AT24C16AN-10SI-2.7_SO8
2
35,38,42 EC_SMC1
35,38,42 EC_SMD1
R65
100K_0402_5%
2
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
R69
100K_0402_5%
1
2
2
1
R72
4.7K_0402_5%
+5VALW
C43
1
2
+5VALW
+5VALW +5VALW
1
8
3
D
1
14
P
U10C
FWE#
SMBus EEPROM
2
G
2
+3VALW
C421
1
2
Title
Compal Electronics, Ltd.
BIOS & Ext.I/O
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Size
Document Number
CustomLA-2051
Date:
Friday, November 14, 2003
R ev
1.0
Sheet
36
of
51
3
2
1
TP_CLK
TP_DATA
3
Q47
2N7002_SOT23
S
1
2
C663
ACES_85201-0602
2
35 EC_LID_SW#
39
D
ESE24MV1T_6P
2
2
PLACE CLOSE TO JP8
+5VALW
2
2
R552
ACIN
PW R_LED#
SUSP_LED#
BATT_LOW_LED#
BATT_CHGI_LED#
HDD_LED_OUT#
C D_FDD_LED#
27,35,41
ACIN
36
PW R_LED#
2
1
10K_0402_5%
36 BATT_LOW_LED#
36 BATT_CHGI_LED#
3
1
Q48
MMBT3904_SOT23
36 CD_FDD_LED#
36
36
36
C
CDON_LED#
MP3_LED#
E-MAIL_LED#
CDON_LED#
MP3_LED#
E-MAIL_LED#
MODE#
2
C298
2
C297
EC_UTXD/KSO17 2
C299
EC_REVBTN#
2
C300
EC_FRDBTN#
2
C301
EC_PLAYBTN#
2
C302
EC_STOPBTN#
2
C661
ACIN
2
C660
PW R_LED#
2
C659
SUSP_LED#
2
C658
BATT_LOW_LED# 2
C670
BATT_CHGI_LED# 2
C669
HDD_LED#
2
C652
C D_FDD_LED#
2
C668
E&T_6901-26 CDON_LED#
2
C667
MP3_LED#
2
C666
E-MAIL_LED#
2
C665
FAN CONN. 1
+12VALW
1
100P_0402_50V8K
1
100P_0402_50V8K
1
100P_0402_50V8K
1
100P_0402_50V8K
1
100P_0402_50V8K
1
100P_0402_50V8K
1
100P_0402_50V8K
1
1000P_0402_50V7K
1
100P_0402_50V8K
1
1000P_0402_50V7K
1
100P_0402_50V8K
1
100P_0402_50V8K
1
100P_0402_50V8K
1
100P_0402_50V8K
1
220P_0402_50V8K
1
100P_0402_50V8K
1
220P_0402_50V8K
WIRELESS ACTIVE AMB LED
17-21UYOC/S530-A2/TR8_ORG
SMT1-05_4P
SW5
1
TV-OUT BUTTON
EC_UTXD/KSO17
R107
3
2
+3VALW
4
1
D15
2 2
1
120_0402_5%
TV_OUT_EN# 35
47K
Internet Button
2
1 100K_0402_5%
EMAIL#
R362 2
1 100K_0402_5%
INTERNET#
R19
For EMI
INTERNET#
D34
1N4148_SOT23
2
3
2
1
2
3
4
1
1000P_0402_50V7K
C680
D54
1N4148_SOT23
2
1
3
2
4
SMT1-05_4P
D3
@PSOT24C_SOT23
D35
@PSOT24C_SOT23
1
2
3
4
1
1
+5V_FAN1
2
8.2K_0402_5%
4
JP21
SW4
3
3
10U_0805_10V4Z
6
5
2
1
D33
1N4148_SOT23
1
1SS355_SOD323
C684
0.1U_0402_16V4Z 1
1
R564
SMT1-05_4P
SW3
1
C697
2
D56
Q53
3
LM358A_SO8
1
1
1
2
100_0402_5%
4
R566
10K_0402_5%
FMMT619_SOT23
C
2
B
E
1
-IN
2
6
5
1
1
2
2
R562
OUT
3
P
1
U30A
+IN
G
2
35
1
3
EN_DFAN1 3
35 EN_DFAN1
EMAIL#
D8
1N4148_SOT23
1
INTERNET# 35
2
+5VALW
C320
0.1U_0402_16V4Z
3
2
EMAIL#
1N4148_SOT23
D4
C
2
8
1
2
WL_BT_LED# 36
User Button & E-MAIL SW
+3VALW
51ON#
1
Q15
DTA114YKA_SC59
2 WL_BT_LED#
10K
D7
@V-PORT-0603-220 M-V05_0603
2
1
EC_UTXD/KSO17
EC_REVBTN#
EC_FRDBTN#
EC_PLAYBTN#
EC_STOPBTN#
35 EC_UTXD/KSO17
35 EC_REVBTN#
35 EC_FRDBTN#
35 EC_PLAYBTN#
35 EC_STOPBTN#
51ON#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
2
+5VALW
+5VALW
JP8
3
MODE#
51ON#
MODE#
51ON#
3
35
41
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
1
1U_0603_10V6K
R550
C318
@0.1U_0402_16V4Z
KILL_SW# 25,35
D40
@V-PORT-0603-220 M-V05_0603
@V-PORT-0603-220 M-V05_0603
C303
1K_0402_5%
HDD_LED#
3
DS-1208_3P
3
4
D10
+3VS
35
3
1
2
1
6
2
2
SW1
6
5
1000P_0402_50V7K
1
1
2
5
1U_0603_10V6K
+5VALW
R401
100K_0402_5%
2
2
LID_SW#
LID_SW#
1
1
D11
2
2
+5VS
RB751V_SOD323
100K_0402_5%
1
D
2
G
35 PW R_SUSP_LED
D
D57
SM05_SOT23
1
1
SUSP_LED#
SW6
R24
1
2
3
4
5
6
2
3
TP_CLK
TP_DATA
1
1
JP7
R553
35
10K_0402_5%
35
1
+3VALW
Kill SWITCH
http://laptopblue.vn
(Top contact)
C304
1
+3VALW
LID_SW#
Touch Pad Connector
2
4
+5VALW
1
5
SW BOARD Connector
ACES_85205-0400
+3VS
B
B
2
D9
@PSOT24C_SOT23
RTC BATT
+3VALW
R18
100K_0402_5%
+5VALW
SW2
-
D5
3
2
2
E
1SS355_SOD323
2
C689
0.1U_0402_16V4Z 1
1
1N4148_SOT23
D25
2
8.2K_0402_5%
ML1220T13RE
+3VALW
10U_0805_10V4Z
1
1000P_0402_50V7K
C687
2
A
+3VS
DAN202U_SC70
R360
4.7K_0402_5%
+5V_FAN2
1
R326
51ON#
3
SMT1-05_4P
C685
2
LM358A_SO8
R329
10K_0402_5%
1
D53
Q51
2
B
1
2
3
4
35
EC_ON
EC_ON
Q4
1000P_0402_50V7K
2
C4
R358
1
2
C681
2
33K_0402_5%
ACES_85205-0400
D55
BAS40-04_SOT23
+RTCVCC
D2
RLZ20A_LL34
1
DTC124EK_SC59
JP24
1
2
3
4
C688
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z
2
2
+RTCBATT
+RTCBATT
35
2
C
2
100_0402_5%
1
+CHGRTC
1
2
A
1
3
1
7
2
OUT
-IN
1
R323
+IN
1
6
ON/OFF
1
6
5
5
1
1
EN_DFAN2
2
3
R565
10K_0402_5%
2
3
2
D
Q33
2N7002_SOT23
1
C691
1000P_0402_50V7K
35 FAN_SPEED2
2
G
S
1
3
EN_DFAN2
1
FMMT619_SOT23
35
4
1
U30B
+
BATT1
2
1
1
1
FAN CONN. 2
2
1
2
3
1
ON/OFF# 39
3
C683
1000P_0402_50V7K
35 FAN_SPEED1
1
2
2
3
Power Button
R561
10K_0402_5%
Title
2
5
4
Compal Electronics, Ltd.
System Connectors
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size
Document Number
CustomLA-2051
Date:
R ev
1.0
Sheet
Friday, November 14, 2003
1
37
of
51
A
B
C
D
+3V
FD3
FIDUCAL
FD1
FIDUCAL
E
FD2
FIDUCAL
2
FD5
FIDUCAL
1
1
R188
10K_0402_5%
1
1
http://laptopblue.vn
VID_PWRGD
FD6
FIDUCAL
FD4
FIDUCAL
8
5 H_VID_PW RGD
O
10
OE#
U18C
1
47
1
ENLL
1
2
0_0402_5%
1
VID_PW RGD 47
1
R192
9
I
1
SN74LVC125APWLE_TSSOP14
CF15
SMD40M80
CF16
SMD40M80
CF3
SMD40M80
CF1
SMD40M80
CF2
SMD40M80
CF7
SMD40M80
CF12
SMD40M80
CF8
SMD40M80
1
1
1
1
CF9
SMD40M80
CF5
SMD40M80
CF14
SMD40M80
CF4
SMD40M80
1
1
1
1
CF10
SMD40M80
H5
H_S315D110
H27
H_S315D110
1
H23
H_S315D110
1
H24
H_S315D110
1
H25
H_S315D110
H33
H_C315D142
H28
H_C315D142
H37
H_C217D118
H38
H_C217D118
1
H26
H_S315D110
1
1
2
1
H7
H_S315D110
1
H3
H_S315D110
1
H2
H_S315D110
1
H1
H_S315D110
@10P_0402_50V8K
1
1
11
O
SN74LVC125APWLE_TSSOP14
2
SS ENABLE
CF11
SMD40M80
1
I
CF13
SMD40M80
1
12
1
1
13
11
SN74LVC32APWLE_TSSOP14
1
7
7
B
O
13
SN74LVC14APWLE_TSSOP14
CF6
SMD40M80
U18D
1
12
U10D
1
O
P
I
G
13
A
G
12
OE#
14
+3VALW
U19F
P
14
+3VALW
1
+3V POWER
C692
2
8
5
2
VDD
GND
@0.1U_0402_10V6K
INPUT_SEL/REF0
CLKIN
CLK0
2
VDD
VDD
GND
CLK3
AVDD
VDD
GND
GND
CLK4
1
1
1
1
1
1
H30
H_S315D181
H36
H_S315D181
H31
H_C276D142
@0.1U_0402_10V6K
H8
H_C197D91
H16
H_C197D91
3
H6
H_C126D110
H17
H_C126D110
21
20
22
H32
H_C276D142
C675
2
1
+3V_EXCLK
H9
H_S315D118
+3V_EXCLK
H12
H_C276D91
H18
H_C276D91
1
1
1
EXCLK_1394 19
C674
2
@0.1U_0402_10V6K
1
H10
H_C335D91
H11
H_O85X118D85X118N
1
4
H20
H_C335D91
H35
H_C335D142
H13
H_C63D63N
H15
H_C181D161
H14
H_O63X102D63X102N
1
@ICS960011
24
25
23
H19
H_C85D85N
H21
H_O201X162D201X162N
Title
H22
H_O315X236D315X236N
4
1
@10U_0805_10V4Z
2
2
@0.1U_0402_10V6K
VDD
GND
1
1
1
C673
1
1
1
C713
@0.1U_0402_10V6K
VDD
GND
C676
@0.1U_0402_10V6K
28
14
1
12
+3V
2
SCLK
SDATA
1
@0.1U_0402_10V6K
2
2
1
L46
@KC FBM-L11-201209-221LMAT_0805
1
2
1
C695
27
26
35,36,42 EC_SMC1
35,36,42 EC_SMD1
+3V_EXCLK
C677
1
+3V_EXCLK
EXCLK_USB20 24
EXCLK_27M_TV 10
15
19
17
1
3
6
4
13
9 EXT_LVDS_SSOUT
9 EXT_LVDS_SSIN
16
18
H34
H_C315D142-A
@10U_0805_10V4Z
CLK1
CLK2
1
R570
@10K_0402_5%
9
11
H29
H_C315D142-A
1
1
VDD
GND
REF1
1
2
+3V_EXCLK
X2
EXCLK_AUDIO 32
C696
+3V_EXCLK
1
2
1
7
C694
10
1
3
16 EXCLK_CLKGEN
24.576MHz
1
X1
1
2
@10P_0402_50V8K
R569
@10K_0402_5%
H4
H_C118D118N
2
2
1
1
2
U45
+3V_EXCLK
1
1
R567
@1M_0402_5%
Y6
C693
1
1
@14.31818MHZ_20P_6X1430004201
1
HIGH:?
LOW: ?
Compal Electronics, Ltd.
PowerGood
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
D
Size
Document Number
CustomLA-2051
Date:
R ev
1.0
Sheet
Friday, November 14, 2003
E
38
of
51
A
B
C
D
E
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1
1
RTCVREF
R53
100K_0402_5%
RTCVREF
RTCVREF
D12
1N4148_SOT23
R44
100K_0402_5%
R28
680K_0402_5%
ON/OFF# 37
3
1
1
1
RTCVREF
C34
1
1
0.1U_0402_16V4Z
2
1
D
S
P
U3
3
5
2
2
2
2
2
1U_0805_16V7K
C35
R37
2
10K_0402_5%
2
G
Q8
2N7002_SOT23
2
Q13
2N7002_SOT23
1
2
10K_0402_5%
C45
1
D
S
2
G
35,40,45 SYSON
RTCVREF
R73
1
RB751V_SOD323
1
4
NC7SZ14M5X_SOT23-5
3
S
2
G
Y
3
2
1
1
D
3
D14
LID_SW#
A
C35 use X7R
2
37
2
G
1
Q7
2N7002_SOT23
2
1U_0805_16V7K
RTCVREF
S4_LATCH
1
R68
10K_0402_5%
1
RTCVREF
R70
10K_0402_5%
+3VALW
C41
@1U_0805_16V7K
1
2
2
R62
1
2
CD1#
D1
CP1
SD1#
Q1
Q1#
GND
VCC
CD2#
D2
CP2
SD2#
Q2
Q2#
1
0.1U_0402_10V6K
C46
1
35
14
13
12
11
10
09
08
D
3
U5
1
2
3
4
5
6
7
S
2
G
2
Q11
2N7002_SOT23
74LCX74MTC_TSSOP14
2
10K_0402_5%
D13
35
S4_DATA
2
D_SET_S4
1
RB751V_SOD323
3
3
4
4
Title
Compal Electronics, Ltd.
BATT-Mode-Hibernation
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
D
Size
Document Number
CustomLA-2051
Date:
R ev
1.0
Sheet
Friday, November 14, 2003
E
39
of
51
A
B
2
2
100K_0603_1%
1
3
S
2
S YSON#
2
G
Q18
2N7002_SOT23
1
2
2
+2.5V & +2.5VS Discharge
+2.5V
+2.5VS
C76
10U_0805_10V4Z
R126
@470_0402_5%
R406
@470_0402_5%
2
100K_0603_1%
D
C88
0.1U_0402_16V7K
1
1
1
D
C79
0.1U_0402_16V7K
S
2
SUSP
2
G
Q41
2N7002_SOT23
+3VALW To +3VS Transfer
+3VALW To +3V Transfer
D
S
S YSON# 2
G
SUSP
Q17
@2N7002_SOT23
1
2
2
8
7
6
5
SI4800DY_SO8
1
0.1U_0402_16V4Z
R117
2
1
+12VALW
C127
10U_0805_10V4Z
C214
1
D
D
D
D
95.3K_0603_1%
1
0.1U_0402_16V4Z
1
D
S YSON#
2
G
Q16
2N7002_SOT23
C94
3
S
1
1
2
2
C218
10U_0805_10V4Z
1
D
S
S YSON# 2
G
2
95.3K_0603_1%
0.1U_0402_16V7K
2
C210
R203
2
2
1
2
3
4
SI4800DY_SO8
+12VALW
10U_0805_10V4Z
2
S
S
S
G
1 2
C121
1
R412
@470_0402_5%
R222
@470_0402_5%
SUSP
Q42
@2N7002_SOT23
D
S
2
G
Q24
@2N7002_SOT23
1
1
2
3
4
S
S
S
G
1
C123
10U_0805_10V4Z
+3VS
U22
D
D
D
D
1
Q40
@2N7002_SOT23
+3VS
1
+3VALW
1
D
C188
0.1U_0402_16V7K
S
3
8
7
6
5
S
+3V & +3VS Discharge
3
+3V
U13
D
2
G
+3V
+3VALW
1 2
1
0.1U_0402_16V4Z
R407
+12VALW
10U_0805_10V4Z
1
1
+12VALW
C83
SI4800DY_SO8
1
C66
1
2
3
4
3
C86
10U_0805_10V4Z
S
S
S
G
1 2
2
D
D
D
D
3
2
R110
2
+2.5VS
8
7
6
5
1
1
1
C85
0.1U_0402_16V4Z
SI4800DY_SO8
1
3
1
2
3
4
S
S
S
G
1
+2.5VALW
U8
D
D
D
D
1
E
1 2
+2.5V
U9
8
7
6
5
D
http://laptopblue.vn
+2.5VALW
C70
10U_0805_10V4Z
C
+2.5VALW To +2.5VS Transfer
3
+2.5VALW To +2.5V Transfer
2
SUSP
2
G
Q23
2N7002_SOT23
2
+5VALW To +5VS Transfer
+5VALW To +5V Transfer
+5V & +5VS Discharge
+5VALW
+5VS
+5V
U32
0.1U_0402_16V4Z
2
C342
10U_0805_10V4Z
C321
10U_0805_10V4Z
1
C340
0.1U_0402_16V4Z
2
1
C338
10U_0805_10V4Z
2
C339
+5V
10U_0805_10V4Z
R335
4.7K_0402_5%
R343
2
+12VALW
1
SUSP
2
S
S
SUSP# 2
G
20,32,35,36 SUSP#
+1.5V To +1.5VS Transfer
1
+1.5V
2
8
7
6
5
10
35,39,45 SYSON
1.8VS_EN# 46
7
1
1
3
2
G
Q14
2N7002_SOT23
S
2
2
G
Q27
2N7002_SOT23
SN74LVC14APWLE_TSSOP14
+1.5V
1
2
3
4
S
S
S
G
1
2
C362SI4800DY_SO8
C372
0.1U_0402_16V4Z
Q52
@2N7002_SOT23
S
1
D
S
S YSON# 2
G
2
1
D
C363
S
2
+1.5VS
R361
@470_0402_5%
2
R20
+12VALW
0.1U_0402_16V7K
@0.1U_0402_16V4Z
10U_0805_10V4Z
1
C374
10U_0805_10V4Z
56K_0603_1%
C706
S
2
1
D
D
D
D
3
O
1
14
P
U19E
G
I
3
1
2
11
D
S YSON#
D
S
3
D
2
G
+1.5V & +1.5VS Discharge
1
R314
10K_0402_5%
+3VALW
R390
150K_0402_5%
SUSP
Q30
@2N7002_SOT23
+1.5VS
U36
+3VALW
D
S YSON# 2
G
Q31
2N7002_SOT23
+5VALW
+1.8VSP ENABLE
1 2
SUSP
2
G
Q32
2N7002_SOT23
3
2
1
C337
0.1U_0402_16V7K
R29
@470_0402_5%
SUSP
Q35
@2N7002_SOT23
1 2
2
S YSON#
2
G
Q29
2N7002_SOT23
D
3
3
S
D
1 2
C323
D
1
1
1
3
27K_0603_1%
D
1 2
47K_0603_1%
SUSP
R332
@470_0402_5%
2
0.1U_0402_16V7K
4
+5VS
R327
@470_0402_5%
3
1
2
1
+12VALW
1
SI4800DY_SO8
1
1
1
C336
1
2
R320
2
3
1
+5VALW
3
S
S
S
G
1
2
3
4
S
S
S
G
1
D
D
D
D
SI4800DY_SO8
D
D
D
D
3
10U_0805_10V4Z
1
8
7
6
5
1
C341
1
2
3
4
1
U33
8
7
6
5
2
+5VALW
S
2
G
Q9
@2N7002_SOT23
4
SUSP
2
G
Q6
2N7002_SOT23
Title
Compal Electronics, Ltd.
DC/DC Interface
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
D
Size
Document Number
CustomLA-2051
Date:
R ev
1.0
Sheet
Friday, November 14, 2003
E
40
of
51
A
B
C
D
V IN
VS
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PF2
1
PCN1
12A_65VDC_451012
2
V IN
PL14
1
2
1
1
2
-
ACIN
27,35,37
PACIN
43,44
1
PAC IN
1
O
4
2
PU14A
LM393M_SO8
PD1
PC117
0.1U_0402_16V4Z
PR134
10K_0402_1%
RLZ4.3B_LL34
Vin Detector
2
2
PC116
1000P_0402_50V7K
+
2
1
1
1
2
1000P_0402_50V7K
3
P
1
2
PR132 22K_0402_5%
PR133
20K_0402_1%
G
100P_0402_50V8J
1
1
2
PR131 1K_0402_5%
PR129
5.6K_0402_5%
2
2
PC112
2
2
EC10QS04_SOD106
VS
PR130
84.5K_0402_1%
PC115
100P_0402_50V8J
1000P_0402_50V7K
8
1
1
1
SINGA_2DC-S113L200
PC114
PC113
2
PD28
1
2
PR128 1M_0402_1%
1
2
2
C8B BPH 853025_2P
2
1
1
1
1
G
G
G
G
1
6
5
4
3
SINGA_2DC-S133L200
2
120W
2
1
PR135 10K_0402_1%
SINGA_2DC-S726B201
High 18.764 17.901 17.063
Low 17.745 16.903 16.038
RTCVREF
90W
3.3V
2
VIN
PD29
1N4148_SOD80
2
BATT+
1 1
PZD2
1
1
RB751V_SOD323
PR137
33_1206_5%
PQ46
TP0610T_SOT23
2
PD31
N1
3
1
VIN
2
N3
1
1
1N4148_SOD80
2
B+
PR138 1K_1206_5%
1
PC118
0.22U_1206_25V7K
PC119
0.1U_0603_50V4Z
2
PR139
100K_0402_1%
1
2
1K_1206_5%
2
PR140
1
2
1
2
G
1
200_0402_1%
D
PR151
2
1
S
CHGRTCP
2
PR136 1K_1206_5%
VS
2
2
PR144
499K_0402_1%
2
2
2
PR142 10K_0402_1%
PR143 1M_0402_1%
1
8
P
RB715F_SOT323
2
3
3
2
2
6
PC121
1000P_0402_50V7K
1
1
G
1
PR149
1
-
LM393M_SO8
PR147
10K_0402_1%
PC122
0.1U_0402_16V4Z
PR146
499K_0402_1%
PR148
215K_0402_1%
2
PR152
2
ACON
O
PC120
1000P_0402_50V7K
3
1
RTCVREF
3.3V
RLZ16B_LL34
+1.25VS
Precharge detector
15.34
15.90
16.48
13.13
13.71
14.20
+2.5VALWP
(2A,80mils ,Via NO.= 4)
2
+2.5VALW
47K_0402_1%
1
2
PAD-OPEN 2x2m
PJP2
1PAC IN
2
PR150
3
1
+1.25VSP
2
G
2N7002_SOT23 S
PJP3
1
D
PQ47
2
2
1U_0805_25V4Z
(12A,480mils ,Via NO.= 24)
2
+5VALWP
PQ48
DTC115EKA_SC59
PAD-OPEN 3x3m
3
1
1
1
2
PD4
PC123
PC124
10U_1206_16V4Z
1
200_0402_1%
1
200_0402_1%
2
1
+CHGRTC
43
7
2
3
PU15
S-81233SGUP-T1_SOT89
1
3
2
3.3V
PU14B
+ 5
2
4
1
PD32
6,42,44 MAINPWON
PR145
200_0402_1%
RTCVREF
1
2
6.0V
2
1
1
VL
22K_0402_5%
2
PR141
1
1
51ON#
2
37
PJP4
PJP6
+1.5VP
2
1
+1.5V
(6A,240mils ,Via NO.= 12)
1
+1.8VSP
2
+1.8VS
PAD-OPEN 2x2m
PAD-OPEN 3x3m
(3A,120mils ,Via NO.= 6)
PJP7
4
+12VALWP
2
4
1
+12VALW
(300mA,20mils ,Via NO.= 1)
PJP5
PAD-OPEN 2x2m
PJP9
+5VALWP
1
+1.2VP
2
+5VALW
(6A,240mils ,Via NO.= 12)
1
1
+1.2V
PAD-OPEN 2x2m
(30mA,40mils ,Via NO.= 2)
PAD-OPEN 3x3m
PJP10
+3VALWP
2
2
+3VALW
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PAD-OPEN 3x3m
A
Title
Compal Electronics, Ltd.
DCIN/DECTOR
(6A,240mils ,Via NO.= 12)
B
C
Size
B
Date:
Document Number
R ev
1.0
Friday, November 14, 2003
D
Sheet
41
of
51
A
B
C
D
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PH1 under CPU botten side :
CPU thermal protection at 84 degree C
Recovery at 44(45) degree C
VL
VS
VL
1
1
1
+
2
-
1
PR114
100_0402_5%
PQ45
DTC115EKA_SC59
2
PD23
O
4
1
2
3
PD22
@ BAS40-04_SOT23
2
PR112
47K_0402_1%
PU13A
1
2
1
3
8
1
2
PR115 16.9K_0402_1%
TM_REF1
3
1
2
PC107
0.01U_0603_50V7K
PR116
1K_0402_5%
PR113
100_0402_5%
MAINPW ON 6,41,44
2
2
1
P
PC106
1000P_0402_50V7K
PC105
0.1U_0603_50V4Z
PH1
1
1
2
PR111 47K_0402_1%
BATT+
1
2
G
1
1
PR109
47K_0402_1%
1
1
C8B BPH 853025_2P
2
SUYIN_200275MR009G116ZL
2
12A_65VDC_451012 +3VALWP
2
2
1
PR110 1K_0402_5%
PL13
2
GND
GND
1
BLI/NIMH#
BB/I
TS
EC_SMDA
EC_SMCA
1
10
11
BATT+
BATT+
ID
B/I
TS
SMD
SMC
GNDGND-
PF1
1
2
3
4
5
6
7
8
9
1
PCN2
2
10K_TSM1A-103(F4D3R)_0603_1%
VMB
1SS355_SOD323
LM393M_SO8
1
PR117
2
PC108
35
3.32K_0402_1%
2
0.22U_0805_16V7K
2
+3VALWP
PC109
VL
2
2
2
1
PR119 25.5K_0402_1%
1
1
PR118 100K_0402_1%
1
1
2
2
ALI/MH#
2
PR120
100K_0402_1%
2
PR121
1K_0402_5%
3
PD24
1000P_0402_50V7K
1
@ BAS40-04_SOT23
2
BATT_TEMPA 35
EC_SMD1 35,36,38
PH2 near main Battery CONN :
BAT. thermal protection at 78 degree C
Recovery at 39(40) degree C
1
1
EC_SMC1 35,36,38
PD25
VL
PD26
@ BAS40-04_SOT23
PR122
47K_0402_1%
1
3
2
2
3
2
VL
@ BAS40-04_SOT23
3
3
10K_TSM1A-103(F4D3R)_0603_1%
1
2
PR123 47K_0402_1%
+
PU13B
PD27
O
-
2
7
G
2
5
16.9K_0402_1%
TM_REF2
6
4
1
1
PR124
P
8
2
+5VALWP
1
PH2
1
1SS355_SOD323
LM393M_SO8
1
2
PR126
3.92K_0402_0.5%
2
1
VL
PC111
PR125 100K_0402_1%
PR127
100K_0402_1%
2
2
1
1
2
PC110
0.22U_0805_16V7K
1000P_0402_50V7K
4
4
Title
Compal Electronics, Ltd.
BATTERY CONN / OTP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
Size
B
Date:
Document Number
R ev
1.0
Friday, November 14, 2003
D
Sheet
42
of
51
A
B
C
D
PQ39
http://laptopblue.vn
Iadp=0~4.2A
P3
S
S
S
G
D
D
D
D
SI7447DP_SO8
PQ39
8
7
6
5
2
1
1
0.015_2512_1%
2
PAD-OPEN 3x3m
PC84
PC85
4.7U_1206_25V6K
1
2
3
5
PC86
1
PR81
PQ38
200K_0402_1%
4
PR80
SI4825DY_SO8
10K_0402_1%
B++
1
1
2
3
4
1
1
2
3
4
2
S
S
S
G
SI4825DY_SO8
PR79
2
1
1
D
D
D
D
1
8
7
6
5
V IN
SI7447DP_SO8
90W
PJP11
1
PQ37
120W
B+
SI4825DY_SO8
2
P2
4.7U_1206_25V6K
2
2
4.7U_1206_25V6K
PR82
-INC2
2
OUTC2
ACON
23
CS
22
PR85
0_0402_5%
PQ40
SI4835DY_SO8
N18
+INE2
-INE2 VCC(o)
1
PC93
1
2
PC92
0.1U_0402_16V4Z
2
IREF=1.31*Icharge
IREF=0.73~3.3V
1
PQ41
4
PC87
2
DTC115EKA_SC59
2
ACOFF
0.022U_0603_25V7K
1
2
21
1
PC88 0.1U_0603_50V4Z
2
5 FB2
4.7K_0402_1%
OUT
35
20
4700P_0402_25V7K_A34
AC ON
CS
PR90
2
PC90
1
2
6
2
24
GND
PR91 1K_0402_5%
1
2
7
VREF
VH
19
PC91
1
2
LXCHRG
0.1U_0603_50V4Z
VCC
18
8
-INE1
RT
17
9
+INE1
-INE3
16
FB3
15
FB1
3
1
1
2
2
4
PR89
PR88
10K_0402_1%
29.4K_0402_1%
0.1U_0402_16V4Z
2
V IN
5
6
7
8
3
3
3K_0402_5%
1
+INC2
1
1
S
PR87
PAC IN1
1
2N7002_SOT23
PC89
PACIN
ADP_I
2
1SS355_SOD323
1,44
2
47K_0402_1%
3
2
1
35,46
PQ42
PR86 10K_0402_1%
2
G
2
1
PU11
1
PD19
ACOFF#1
D
2
10K_0402_1%
2
1 2
PR84
150K_0402_1%
PR83
1
1
1
ACOFF#
1000P_0402_50V7K
PR92
1
PC94
1
2
2
CC=0.5~2.52A
CV=16.8V(12 CELLS LI-ION)
0.1U_0603_50V4Z
2
68K_0402_5%
PL12
10
OUTC1
11
OUTD
CTL
14
12
-INC1
+INC1
13
1
2
47K_0402_1%
AC ON
PC95
1
2
1
2
BATT+
PC97
PC98
PC99
4.7U_1206_25V6K
2
2
1
1
PD21
RB051L-40_SOD106~D
2
PQ43
DTC115EKA_SC59
PR99
2
47K_0402_1%
PR94
2
0.02_2512_1%
22UH_SPC-1205P-220A_2.8A_20%
1500P_0402_50V7K
1
2
PR96
1
1
2
PC96
10K_0402_1%
0.1U_0402_16V4Z
2
1
+3VALWP
PR97
100K_0402_1%
2
CS
1
1
PR95
1
1
2
PR93 226K_0402_1%
IREF
1
35
3
2
MB3887_SSOP24
1
4.7U_1206_25V6K
4.7U_1206_25V6K
PR100
35
FSTCHG
PQ44
DTC115EKA_SC59
2
1
2
4.2V
2
95.3K_0603_0.1%
3
1
PR101 143K_0603_1%
3
PR2
3
1
2
95.3K_0603_0.1%
VMB
120W
90W
PR79
0.01_2512_1%
0.015_2512_1%
PR86
100K_0402_1%
10K_0402_1%
PR88
33.2K_0402_1%
29.4K_0402_1%
PR90
10K_0402_5%
4.7K_0402_5%
1
VS
PR102
340K_0402_1%
OVP voltage : LI
1
2
4S3P : 18V--> BATT_OVP= 2.0V
1
3S4P/3S3P : 13.5V--> BATT_OVP= 1.5V
P
1
PU12A
3
+
0
-
2
PR153
105K_0402_1%
PC104
0.01U_0603_50V7K
4
2
2
2
1
PR107
2.2K_0402_5%
2
PC103
@0.1U_0402_16V4Z
1
LM358A_SO8
4
1
4
1
G
35 BATT_OVP
PR103
499K_0402_1%
2
8
2
(BAT_OVP=0.1111 *VMB)
PC100
0.1U_0603_50V4Z
Title
Compal Electronics, Ltd.
CHARGER
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
Size
B
Date:
Document Number
R ev
1.0
LA-2051
Friday, November 14, 2003
D
Sheet
43
of
51
A
B
C
D
http://laptopblue.vn
N4
1
2
PR64
S NB 2
1
FL YBACK
2
PD16
PC66
1
2
0.1U_0603_50V4Z
0_0402_5%
PLX3
1SS355_SOD323
1
PC67
2
1
2
0.1U_0603_50V4Z
PQ36
PC71
4.7U_1206_16V6K
PDH5
1
1
2
3
4
PD H51
2
10UH_SPC-1205P-100_4.5A_20%
41,43
2
PD17
PR72
PACIN
1
2
PR71 10K_0402_1%
PC76
RUN/ON3
8
VS
2
PC125
680P_0402_50V7K
2
1
PR73
10.5K_0402_1%
PC79
100P_0603_50V8J
2
POK
PR75
47K_0402_1%
1
PC81
1
+
+
2
2
PC80
PD18
EP10QY03
150U_D2E_6.3VM_R18
3
45
1
100P_0603_50V8J
PR74
10K_0402_1%
2
1
2
MAX1632_SSOP28
1
2
@150U_D2E_6.3VM_R18
3
+5VALWP
1
28
PR70
0.012_2512_1%
PC77
4.7U_1206_16V6K
1
3.57K_0402_1%
150U_D2E_6.3VM_R18
CS H5
2.5VREF
TIME/ON5
1
1
2
2
7
2
EP10QY03
PC73
47P_0402_50V8J
PR69
2M_0402_5%
1
22
VL
CSH3
CSL3
FB3
SKIP#
SHDN#
V+
1
2
3
10
23
PLX5
GND
PC75
1
+
PC74
2
LX3
DL3
SI4814DY_SO8
PDL5
4
5
18
16
17
19
20
14
13
12
15
9
6
11
2
2
1
CS H3
1
1
26
24
1
+3VALWP
DH3
12OUT
VDD
BST5
DH5
LX5
DL5
PGND
CSH5
CSL5
FB5
SEQ
REF
SYNC
RST#
2
PR68
0.012_2512_1%
27
2
1
2
1
PR67
1M_0402_1%
BST3
8
7
6
5
21
2
PR66 0_0402_5%
PU10
25
D1
G1
D1 S1/D2
G2 S1/D2
S2 S1/D2
1
2
2
1
1
2
P DH3
PC72
47P_0402_50V8J
4.7U_1206_25V6K
PC69
4.7U_1206_16V6K
PC68
4.7U_1206_25V6K
2
1
1
PC70
PDL3
PL10
10uH_SDT-1205P-100-118_5A_20%
B+++
+12VALWP
SI4814DY_SO8
2
3
PD15
DAP202U_SOT323
VL
2
PD H311
1
8
7
6
5
1
4.7U_1206_25V6K
D1
G1
D1 S1/D2
G2 S1/D2
S2 S1/D2
1
2
VS
PR65
PQ35
1
2
3
4
PT1
1
1
2
PC65
2
1
2
PC64
4.7U_1206_25V6K
+
4
22_1206_5%
2
1
1
HCB4532K-800T90_1812
2
BST51
0.1U_0603_50V4Z
3
B+
BST31
1
4.7U_1210_25V6K
PD14
EC11FS2_SOD106
1
PC63
1
2
B+++
PL9
PC61
2
1
PC62
470P_0805_100V7K
2
1
PR77
2
PR78
@ 150U_D2E_6.3VM_R18
1
10K_0402_1%
VL
2
2
1
PC82
0.047U_0603_25V7M
+5V Ipeak = 6.66A ~ 10A
MAINPW ON 6,41,42
2
1
2
+3.3V Ipeak = 6.66A ~ 10A
47K_0402_1%
PC83
0.047U_0603_25V7M
4
4
Title
Compal Electronics, Ltd.
5V/3V/12V
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
Size
B
Date:
Document Number
R ev
1.0
LA-2051
Friday, November 14, 2003
D
Sheet
44
of
51
A
B
C
D
http://laptopblue.vn
+2.5VALWP/+1.5VP
1
1
PL15
1
HCB4532K-800T90_1812
2
1
PR154
0_0402_5%
+5VALWP
4.7U_1206_25V6K
1
1
1
1
PC130
4.7U_1206_25V6K
2
PC129
2
D
D
D
D
2
2
PC128
5
6
7
8
2
PC127
4.7U_1206_16V6K
4.7U_1206_25V6K
3
2
PD33
DAP202U_SOT323
PC131
1U_0805_25V4Z
1
1
1
2
PC126
B+
2
4.7U_1206_25V6K
G
S
S
S
PQ49
+2.5VALWP
PR158
1
28
1
5.1K_0402_1%
11
ON1
15
14
12
1 PC135
1
220U_D2_4VM
+
+
PD34
D
D
D
D
OUT2
FB2
ON2
0.1U_0603_50V4Z
1
1
2
+
@ EC31QS04
2
2 PC136
220U_D2_4VM2
PD35
+
PC137
PC138
2
EP10QY03
PQ51
SI4810DY_SO8
PR159
@ 220U_D2_4VM @ 220U_D2_4VM
PC141
2
FB1
19
18
17
20
16
1
9
CS1
OUT1
2
21
2
1
PC139
LX1
DL1
0_0402_5%
VDD
BST2
DH2
LX2
DL2
CS2
1
G
S
S
S
27
24
UVP
DH1
VCC
BST1
26
2
2
PC140
220U_D2_4VM
PU17
25
22
PR157
1
2
0_0402_5%
0.1U_0603_25V7K
4
PC134
1
2
+
2
2
2
1
2
1
PR156
2
4
3
2
1
1
1
2
2.0UH_SPC-07040-2R0_6A_30%
V+
PL17
4700P_0402_25V7K_A34
PD36
EP10QY03
1
PL16
2.2UH_SPC-1205P-2R2B_13A_30%
1
2
1
PC133
SI4814DY_SO8
+1.5VP
+2.5VALWP
SI4800DY-T1_SO8
1
20_0402_5%
5
6
7
8
PC132
1U_0603_10V4Z
2
2
8
7
6
5
2
+1.5V
D1
G1
D1 S1/D2
G2 S1/D2
S2 S1/D2
1
1
2
3
4
4
3
2
1
PR155
PQ50
2
15K_0402_1%
4700P_0402_25V7K_A34
1
7
5
13
3
1 POK
0_0402_5%
POK
44
1
2
PR162
1
ILIM2
ILIM1
10
PC143
PR163
2
PR164
2
1
5.62K_0402_1%
10K_0402_1%
2200P_0402_50V7K
2
SKIP
6
8
2
MAX1845EEI_QSOP28
GND
2
0_0402_5%
OVP
1
PR161
23
35,39,40 SYSON
REF
PGOOD
TON
1
1
PR160
10K_0402_1%
2
PC142
2200P_0402_50V7K
3
3
PR165
2
1
1
1
PR166
PR167
100K_0402_1%
2.5V OCP > 13A
2
100K_0402_1%
2
2
0.22U_0805_16V7K
1
14K_0402_1%
PC144
4
4
Title
Compal Electronics, Ltd.
+2.5VALWP/1.5VP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
Size
Document Number
CustomLA-2051
Date:
R ev
1.0
Friday, November 14, 2003
D
Sheet
45
of
51
5
4
3
2
1
+3VALWP
2
http://laptopblue.vn
1
1
1
PR169
0_1206_5%
D
2
2
D
PC145
PC146
2
5
PD9
EP10QY03
4.7U_1206_25V6K
4.7U_1206_25V6K
1
IN
PU8
BST
10
DH
8
0.1U_0603_25V7K
HSD
1
1
9
DL
6
1
2
3
4
D1
G1
D1 S1/D2
G2 S1/D2
S2 S1/D2
8
7
6
5
+1.8VSP
2.2UH_PLFC1235P-2R2A_6A_30%
1
2
1
2
LX
PL18
PQ52
PC189
SI4814DY_SO8
COMP
PC149
PGND
7
FB
3
PC190
470P_0402_50V7K
2
PC147
@ 220U_D2_4VM
220U_D2_4VM
PR172
9.09K_0402_1%
2
33P_0603_50V8J
4
GND
2
1 2
2N7002_SOT23
+
2
2
S
1
PC148
+
1
1
1
1
1.8VS_EN#
PR171
332K_0402_1%
PQ53
2
G
3
40
D
1
PR170
11.5K_0402_1%
2
2
C
C
MAX1954EUB_10UMAX
PR226
1
2
@ 1M_0402_1%
90W
64.9K_0402_1%
84.5K_0402_1%
PR229
249K_0402_1%
200K_0402_1%
1
PR227
VL
VS
1
120W
PR223
H_PROCHOT# 5,26
PC2
2
2
O
4
1
@
PU6A
1
-
D
PQ1
3
+
2
1
@ 249K_0402_1%
PC101
0.01U_0603_50V7K
3
2
@ 64.9K_0402_1%
2
1 PR229 2
S
@ 2N7002_SOT23
2
G
1
@ LM393M_SO8
1
PR227
1
VL
P
@ 11.5K_0402_1%
2
0.1U_0603_50V4Z
G
PR4
1
ADP_I
1
35,43
B
8
@ 47K_0402_1%
@
B
PC1
2
2
PR228
2
PC3
@ 10P_0402_50V8K
@ 1000P_0402_50V7K
@100K_0402_1%
PU7
PC5
1U_0603_10V4Z
0.1U_0402_16V7K
5
+
6
-
PU6B
O
7
4
+
8
PC4
1
PC7
0.1U_0402_16V7K
+1.25VSP
P
VTT
G
3
ExtRefIn
1
2
VSS
PC191
2
RefOut VttSense
1
1
8
+2.5V
2
VD
6
2
4.7U_1206_16V6K
@ 4.7U_1206_16V6K
PC8
5
NE57814_HSO8
2
2
PC10
STANDBY# VDD
4
2
1
PC9
1
1
+2.5VS
7
1
+2.5V
0.1U_0402_16V4Z
(1.25V)
@ LM393M_SO8
150U_D2E_6.3VM_R18
2
PR3
1
+SDREF
A
2
A
0_0402_5%
Title
Compal Electronics, Ltd.
+1.25VSP/+1.8VSP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Size
Document Number
CustomLA-2051
Date:
Friday, November 14, 2003
R ev
1.0
Sheet
46
of
51
1
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRA
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM TH
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRO
INC.
A
B
C
D
http://laptopblue.vn
1
+5VALWP
1
+5VS
PR1
0_0402_5%
PR177
PC150
32
38
1
PR183
26 PM_DPRSLPVR
5
CPU_VID5
1
2
3
4
5
6
ENLL
2
0_0402_5%
2
5,10,16,26 PM_STPCPU#
CPU_VID4
CPU_VID3
CPU_VID2
CPU_VID1
CPU_VID0
1
PR184
1
PR178
80.6K_0402_1%
1U_0603_10V4Z
1
PU2
5
5
5
5
5
Battery Feed
Forward
B+
2
2
1
2
2
@ 0_0402_5%
1
2
PR180
1
10K_0402_1%
VCC
RAMPS
7
VID4
VID3
VID2
VID1
VID0
VID12.5
PGOOD
39
VGATE
17
48
PWM1
25
PWM1
ISEN1+
ISEN1-
24
23
ISEN1+
48
ISEN1-
48
DRSEN
PWM2
26
PWM2
48
27
28
48
DSEN#
ISEN2+
ISEN2-
ISEN2+
35
ISEN2-
48
10
OCSET
34
ENLL
33
0_0402_5%
PC151
1
2
PR186
274_0402_1%
2
11
1
PWM3
20
PWM3
49
ISEN3+
ISEN3-
21
22
ISEN3+
49
ISEN3-
49
PWM4
31
ISEN4+
ISEN4-
30
29
COMP
15
FB
13
SOFT
2
0.047U_0603_25V7M
9
Frequency Select
1
1
+
0
36
FS
37
DRSV
-
+5VS
2
6
PWM4
49
ISEN4+
ISEN4-
49
49
PC153
1
20K_0402_1%
22P_0402_25V8K
2
2
PC154
100P_0603_50V8J
7
@ 0_0402_5%
2
PC152 2200P_0402_50V7K PR189
2
1
1
2
PU12B
5
PR190
16.9K_0402_1%
DSV
2
PR5
1
PR193
PR194 100K_0402_1%
10K_0402_1%
38
VR-TT#
40
NTC
NC
14
GND
VDIFF
VSEN
VRTN
16
17
18
12
GND
OFS
2
PR192
2
1
PC155
@ 0_0402_5%
1
@ 1000P_0402_50V7K
2
2
1
LM358A_SO8
ISL6247_MLFP40
PR202
2
Place close to IC
2
2
+5VS
1
PR198
45.3K_0402_1%
PC158
3
2
3
PR195 2.49K_0402_1%
1
2
1
340K_0402_1%
1
8
1
19
PC157
0.1U_0402_16V4Z
1
2
120W
90W
PR204
1
0_0402_5%
2
PR205 @
PR186
38
274_0402_1%
2
+CPU_CORE
1
0_0402_5%
VCCSENSE 5
Place near +VCC_CORE
output capacitor
PR206
1
PU5
0_0402_5%
PR207
1
4
PC159
4.7U_1206_16V6K
3
IN
OUT
+1.2VP
5
PR190
20K_0402_1%
16.9K_0402_1%
PG
EN
GND
2
2
2
0_0402_5%
1
2 PR208 1
@
1
2
360_0402_1%
VID_PW RGD
1
+3VALWP
Remote
Sensing
1U_0603_10V4Z
VSSSENSE 5
0_0402_5%
PC160
4.7U_1206_16V6K
MIC5258_SOT23-5
2
VR_ON
1
2
35
PR211 0_0402_5%
PR212
100K_0402_1%
4
1
4
Title
Compal Electronics, Ltd.
CPU_CORE_Controller
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
Size
B
Date:
Document Number
R ev
1.0
LA-2051
Friday, November 14, 2003
D
Sheet
47
of
51
A
B
C
D
CPU_B+
http://laptopblue.vn
0.22U_0805_16V7K
1
PQ59
SI7392DP_SO8
2.2_0402_5%
PC162
4.7U_1206_25V6K
@ EP10QY03
1
PR6
@ 0_0402_5%
+
LGATE
5
2
@
220U_25V_M
2
1
PL2
1
PQ61
ISL6207CB-T_SO8
2
0.56UH_ETQP4LR56WFC_21A_20%
PQ62
SI4362DY_SO8
PC168
SI4362DY_SO8
2
1
2
PR217 34.8K_0402_1%
4
3
2
1
4
3
2
1
G
S
S
S
PC167
1U_0805_16V7K
1
2
1
B+
C8B BPH 853025_2P
2
5
6
7
8
PHASE
GND
2
PL1
+
PC164
220U_25V_M
2
PR213
2
0_0402_5%
1
D
D
D
D
EN
8
1
PC6
3
2
1
1
4
0.1U_0603_25V7K
1
2
7
PR214 0_0402_5%
PC166
BOOT
PWM UGATE
D
D
D
D
1
VCC
3
G
S
S
S
2
2
6
1
4.7U_1206_25V6K
5
6
7
8
2
PWM1
PR215
499K_0402_1%
1
2
2
+5VP1
47
PC163
4.7U_1206_25V6K
PC165
4
PD11
1
PU1
1
1
2
1
PR7
0_0402_5%
PC161
2
2
1
1
1
2
PR237
+5VALWP
5
+5VS
1
0.01U_0603_50V7K
CPU_DRIVE_EN
ISEN1ISEN1+
1
2
1
PH4
820_0402_5%
+CPU_CORE
2
Local Transistor
Swtich Decoupling
PC171
PC172
4.7U_1206_25V6K
2
PD12
1
2
4
2
4.7U_1206_25V6K
PD6
EC31QS04
1
1
@ EP10QY03
2
PQ63
SI7392DP_SO8
2.2_0402_5%
PC173
4.7U_1206_25V6K
2
2
2
CPU_B+
0.22U_0805_16V7K
1
1
PC170
1
PR238
5
47
47
2
1
2
1
7
EN
PHASE
8
4
GND
LGATE
5
1
PR218
2
0_0402_5%
PL3
1
5
6
7
8
BOOT
PWM UGATE
D
D
D
D
VCC
3
5
6
7
8
PC174
1U_0805_16V7K
6
ISL6207CB-T_SO8
D
D
D
D
PWM2
2
2
0.56UH_ETQP4LR56WFC_21A_20%
PQ66
SI4362DY_SO8
PC175
G
S
S
S
2
PQ65
2
PR221
1
34.8K_0402_1%
2
1
0.01U_0603_50V7K
1
4
3
2
1
SI4362DY_SO8
4
3
2
1
PR220
499K_0402_1%
G
S
S
S
47
3
2
1
PU3
47
47
ISEN2ISEN2+
3
2
1
PH5
820_0402_5%
3
4
4
Title
Compal Electronics, Ltd.
CPU_CORE_Power stage
Size
A
B
Document Number
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CustomLA-2051
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Date:
Friday, November 14, 2003
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIORCWRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D
R ev
1.0
Sheet
48
of
51
5
4
3
2
1
http://laptopblue.vn
PR236
CPU_B+
PC177
1
2
1
2
CPU_DRIVE_EN
0.22U_0805_16V7K
1
PC178
4.7U_1206_25V6K
PC180
4.7U_1206_25V6K
@ EP10QY03
PC179
4.7U_1206_25V6K
2
4
PD13
1
D
2
2
1
PQ67
SI7392DP_SO8
D
1
2.2_0402_5%
5
+5VP1
2
PWM UGATE
1
7
EN
PHASE
8
LGATE
5
4
D
D
D
D
ISL6207CB-T_SO8
PC181
PQ70
SI4362DY_SO8
2
PR225
1
34.8K_0402_1%
2
1
0.01U_0603_50V7K
47
47
4
3
2
1
4
3
2
1
1
SI4362DY_SO8
1
0.56UH_ETQP4LR56WFC_21A_20%
G
S
S
S
2
PQ69
PC182
1U_0805_16V7K
1
PL4
2
G
S
S
S
PR224
499K_0402_1%
GND
PR222
2
0_0402_5%
1
5
6
7
8
3
D
D
D
D
2
5
6
7
8
PWM3
2
47
BOOT
VCC
3
2
1
PU4
6
ISEN3ISEN3+
2
1
CPU_B+
PH6
C
1
PC184
2
4.7U_1206_25V6K
1
2.2_0402_5%
@ EP10QY03
2
4
PD20
1
C
1
PQ71
SI7392DP_SO8
2
PC183 0.22U_0805_16V7K
2 1
2
5
PR230
1
820_0402_5%
Local Transistor
Swtich Decoupling
PC186
4.7U_1206_25V6K
PC185
4.7U_1206_25V6K
+CPU_CORE
2
1
PHASE
LGATE
5
4
GND
2
0_0402_5%
ISL6207CB-T_SO8
PC187
1U_0805_16V7K
PL5
1
PQ73
2
0.56UH_ETQP4LR56WFC_21A_20%
PQ74
1
SI4362DY_SO8
4
3
2
1
2
2
1
PR234
499K_0402_1%
PR231
1
5
6
7
8
EN
8
D
D
D
D
1
G
S
S
S
2
2
1
2
SI4362DY_SO8
PR235
34.8K_0402_1%
PC188
0.01U_0603_50V7K
4
3
2
1
BOOT
PWM UGATE
7
5
6
7
8
VCC
3
D
D
D
D
6
G
S
S
S
PWM4
3
2
1
PU9
47
B
B
47
47
ISEN4ISEN4+
1
2
PH7
3 PHASE
4 PHASE
PU9,PC187,PR234,PR230,PC183,PQ71
PR5
820_0402_5%
UNPOP
PQ73,PQ74,PR231,PR235,PL5,PC188,PH7
PR5
PU9,PC187,PR234,PR230,PC183,PQ71
POP
PQ73,PQ74,PR231,PR235,PL5,PC188,PH7
A
A
Title
Compal Electronics, Ltd.
CPU_CORE_Power stage
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
3
2
Size
Document Number
CustomLA-2051
Date:
Friday, November 14, 2003
R ev
1.0
Sheet
1
49
of
51
REV 0.1
D ate
Page
Description
Location
Del DDR data damping
DEL RP40,RP43,RP44,RP54,RP59,RP64,RP67,RP70,RP74,RP82,RP5,RP8,RP10,RP12,RP16,RP26,RP29,RP31,RP34,RP36.
P.13,P.14
Add DDR address & control damping
ADD R592,R593.R594,R595,R596,R597,R598,R599
P.27
LPC_SMI# Pull high to +3V
LPC_SMI# connect to RP50 Pin 1
09/16
P.27
Del ATI USB feedback resistor
DEL R438,R439,R446,R448,R434,R435
09/16
P.31
Change USB form NEC to ATI
DEL R34,R40,R373,R374,R371,R372,R575,R573,R345
09/20
P.18
Change LVDS Conn to 40 pin
Change JP1
09/20
P.16
Disconnect CPU_STP# & PCI_STP#
DEL R579,R580
09/20
P.24
Del external USB chip
DEL U27,R516,R241,R510,R303,R511,R302,R300,R315,R245,U28,R244,R304,R530,R524,R508,R509,R507,C242,
C286,Y3,R273,R297,R298,RP83,RP66,C654,C655,C647,C646,R305,R551,R494,R496
09/22
P.33
Add bead between +5VS & +5V_AMP
ADD L44,L45
09/22
P.32
Reserve LAN AC97-link to MDC
Reserve ADD R604,R605,R606,R607,R608,R609,R610,R612
10/15
P.27,35
Fix PME
Del R421 and change EC591 EC_SWI#(pin70) connect to SB200 EXT_EVENT1 to SB200 GEVENT3#,Del LPC_PME#
10/15
P.10,16
Change NB CLK Voltage
Change R161=68,R506=56
10/16
P.27
Add USB 48M OSC
Add R614,R615,R616,C723,X5
09/12
P.13,P.14
09/12
09/15
http://laptopblue.vn
ADD
R30,R48,R363,R364,R365,R366,R574,R576,R344
ADD R577,R578
function
10/16
P.8,13,14
Add 0.1uF between +SDREF & +2.5V
Add C724,C725,C726
10/16
P.28
Change R to L
Change R460,R475,R528 to L47,L48,L49
10/16
P.26
Solve CMOS reset when AC-IN
Change R589 from 1k to 0 ohm
10/17
P.35
Change PCIRST# to NB_RST# for ATI
suggestion,change SIO and IDE & EC
Add R617,R618,R619,R620
10/17
P.10
Modify Q45
Mirror Q45
10/17
P.26
Modify R558
Reserve R558
10/17
P.26
Modify R558
Reserve R558
10/17
P.27,31
Change USB port form 0~2 to 1~3, because Port 0 have some problem
10/17
P.28
Change R432 from 1k to 100 ohm for ATI suggestion
10/20
P.33
change R312 from 3k to 4.3k to follow DBL10 gain
10/20
P.33
Add L50,L51,L52,L53 for EMI request
10/20
P.37
Add D57 for ESD
10/20
P.25
change C252 form 10P to 18P for EMI
10/23
P.34
Del R116 to fix FIR signal level drop
10/23
P.31
Add C26,C27,C28,C29 for USB 2.0 EMI
10/23
P.26
Change R242 from 33ohm to 39ohm for EMI
11/07
P.26,35
Change X1,Y4 footprint
11/07
P.35
Add R621,R623-R626 for board ID
11/07
P.39
C35 change to X7R
11/07
P.17
Delete R106 for SB_PWRGD timing
11/07
P.34
Add R116 for FIR disconnect Issue
11/07
P.15
C322,C686,C92,C93 change to 220uF/25mohm for RST issue
11/07
P.38
Delete J1,J2 for EMI
11/13
P.26
Add R627 for USB2.0 wakeup
11/14
P.9
Add R628 for ENVDD goes high issue
Title
Compal Electronics, Ltd.
HW PIR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Size
Document Number
CustomLA-2051
Date:
Friday, November 14, 2003
R ev
1.0
Sheet
50
of
51
5
4
3
2
1
http://laptopblue.vn
Delete PL11 for mechanic request
10/28 P.40
10/28 P.41.43 Change PC7,PC74,PC80 from SGA20151300 to SGA20151320 for battery only not boot
10/28 P.42.43 Change PC148,PC135,PC136,PC140 from SGA20221150to SGA20221130 for battery only not boot
Change PC152 from SE074102K00 to SE074222K00 for prevent DBL10 system cannot resume from standby
10/28 P.44
D
10/28 P.44.45 Add PR7,PR1 delete PR177 to
prevent DBL10 system cannot resume from standby
D
C
C
B
B
A
A
Title
POW ER PIR
Size
Document Number
CustomLA-2051
Date:
5
4
3
2
Friday, November 14, 2003
R ev
1.0
Sheet
1
51
of
51
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