Semiconductor Wafer Backside Metallization: Die Att h f Hi h Th
Attach for High Thermal Demand Applications
lD
d A li ti
Jonathan Harris, CMC Interconnect Technologies
,
g
Abstract
Backside metallization of semiconductor devices followed by solder based die attach results
in a die bond with excellent thermal, electrical and mechanical properties. The following
tutorial will focus on the back-side metallization of semiconductor wafers to achieve this type
of high performance die attach. Semiconductor systems discussed with include both silicon
and GaAs and applications will cover RF and Microwave, Power Control and Optical
Devices. This presentation will describe various backside metallization systems, the design
attributes for these metallization systems and the material science behind achieving key
back side metallization requirements for each application. Deposition technologies will also
be discussed and compared, including sputtering, evaporation and plating technology.
1
What is Backside Metallization of SC Wafers?
Wirebonds
Multilayer Metallization on Wafer Backside
SC Die
Die Attach
Package or Board
Semiconductor Wafer
2
BSM is Critical for High Power pp
Semiconductor Applications
• Heat dissipation pathway‐ through the die attach layer into the package/board
• Power densities up to 500 Watts/cm2
• Discrete Power Devices‐ IGBT and Power MOSFETs
–
Motor control for appliances and automotive
Motor control for appliances and automotive
– Power Supplies
•
RF Power Amplifiers‐ GaAs and Si LDMOS
– Cellular Infrastructure
Cellular Infrastructure
– Microwave Radios
– Radar
• High Brightness LEDs
Hi h B i ht
LED
– Automotive signal and head lights
– Signage, illumination
•
Laser Diodes‐ Telecommunications
3
BSM is Critical for High Power pp
Semiconductor Applications
Fiber
Laser
Ceramic Submount
TEC
HBLED
‐ Diode AuSn Attach to Ceramic
Laser Diode‐ Fiber Optic Telecom
‐ Diode AuSn Attach to Ceramic Submount
Diode AuSn Attach to Ceramic Submount
Power Semiconductor‐ Motor Control
‐ Power SC solder attached to copper pad in PCB
4
Backside Metallization Function
• Thermal
Thermal interface
interface between the SC die and between the SC die and
package
• Bonding layer
Bonding layer between die and die attach between die and die attach
material
• Electrical interface
El
i li
f
b
between the SC die h SC di
and package (some applications)
5
BSM Characteristics to Meet Functional Requirements
• Atomic bonding between BSM and SC surface
– Stable up to die attach temperature
Stable up to die attach temperature
– Robust adhesion through temperature cycling
– Low thermal impedance interface
• Effective wetting of solder die attach material to BSM to produce ff
f ld d
h
l
d
a void free die attach layer
– BSM surface must be free of oxide/nitride
– BSM must block impurity diffusion to surface which could oxidize
• Minimum Intermetallic Compound Formation when BSM Reacts with Solder Layer
– IMC layers are brittle and lead to reliability issues
– Ternary IMC compounds are more brittle than binary
– Thin, discontinuous IMC layers are preferred
• BSM layer must be low thermal resistance
BSM l
t b l th
l it
6
Design Parameters for a BSM ‐
y
y
Multilayer System
Semiconductor Wafer
Adhesion Layer
Oxidation Protection Layer
y
Barrier/ Wetting Layer
Di Att
Die
Attach
h Solder
S ld
Multifunction BSM is accomplished with a multilayer thin film
M ltif ti BSM i
li h d ith
ltil
thi fil
7
Design Parameters for a BSM ‐
Multilayer System
Multilayer System
BSM Layer
Key Function
Design Issues
Adh i
Adhesion
Adhere to the Adh
t th
semiconductor surface
1.
1
2.
3.
Barrier/Wetting
Wet the die attach solder
Wet the die
attach solder
1
1.
2.
3.
4.
O id i P
Oxidation Protection
i
Protect the surface from P
t t th
f
f
oxidation prior to die attach
Minimize thermal impedance. Minimize
thermal impedance
Bond to the SC surface without forming a thick, continuous or ternary IMC layer. Bond to an oxide free SC surface Prevent diffusion of
Prevent
diffusion of under ‐layer under ‐layer
contaminants which could effect solder wetting. Wet the solder without forming thick, continuous or ternary IMC during die attach. Minimize thermal impedance. Low internal stress for mechanical stability.
Minimize thickness to
Mi
i i thi k
t avoid altering solder id lt i
ld
composition during die attach
8
Multilayer BSM Material Systems
Adhesion
Layer
Conductivity
Layer (some
cases)
Barrier/
Wetting
Layer
Oxidation
Protection
Die Attach
Solder
Ti, Ti/W, Cr
Cu
NiV, Ni, Ni(P),
Pt Pd,
Pt,
Pd Co,
Co
Co(P), NiCo,
NiCo(P)
Au, Pt
AuGe, AuSn,
A Si PbSn
AuSi,
PbSn,
CuAgSn
9
The Material Science of BSM Layers
The Material Science of BSM Layers
1.
2.
3.
4.
Surface Preparation
Adhesion Layer
Barrier/ Solder Wetting Layer
Barrier/ Solder Wetting Layer
Die Attach Solders
10
The Materials Science of BSM y
p
Layers: SC Surface Preparation
• Goal
Goal‐ Pristine Semiconductor surface
Pristine Semiconductor surface
– Removal of oxide layers
– Removal of organic contamination
– Removal of micro cracked layers from lapping
• Approaches
pp
– Plasma clean (organics)
– Sputter clean (Argon bombardment)
– Chemical etch
11
The Materials Science of BSM Layers: SC Surface Preparation Effect of Oxidation on Adhesion
Chemical Clean Followed by Exposure to Humidity
1.
2.
3.
Si (100) cleaned with
HF/ DI water
Auger spectra taken
after exposure to 45%
humidity for 0
0- 1000
hours
Auger shows growth of
y and dilution
SiO2 layer
of Si on the surface
12
Kondo, J. Vac. Sci. Technol. A 11(2) Mar/Apr 1993
The Materials Science of BSM Layers: SC Surface Preparation Effect of Oxidation on Adhesion
Preparation Effect of Oxidation on Adhesion
Amount of Sputtered Ti/Ni Film Peeled Using 80 N/m
100
90
80
70
60
% 50
40
30
20
10
0
Formation of SiO2 on the Si
Surface can degrade Ti adhesion
1
10
100
1000
45% Humidity Exposure Time (Hrs)
13
Kondo, J. Vac. Sci. Technol. A 11(2) Mar/Apr 1993
The Materials Science of BSM Layers: SC Surface Preparation Effect of Oxidation on Adhesion
Preparation Effect of Oxidation on Adhesion
1
f surface
f
iis
1. Sili
Silicon wafer
bombarded with Argon prior to
sputter deposition
p
2. Ti/Ni is deposited
3. Pull Test v Sputter Cleaning
Conditions
Removal of SiO2 Prior to Ti
Deposition Improves Adhesion
MPa
Pull Test Value v Argon Sputter
16
14
12
10
8
6
4
2
0
No
Sputter
50
400
800
Cathodic Voltage
14
Kondo, J. Vac. Sci. Technol. A 11(2) Mar/Apr 1993
The Materials Science of BSM Layers: Adhesion Layer Bonding Reaction
Adhesion Layer Bonding Reaction
Heat of Formation ∆Hf for Reaction of Ti and Si
1 Fabricate
1.
Fabricate multilayer Ti/a‐Si multilayer Ti/a‐Si
structures by sequential sputtering on a sacrificial substrate (NaCl)
2. Stoichiometry Ti33Si67
3. Utilize a differential scanning calorimeter to evaluate heat flow during reaction of the Ti
flow during reaction of the Ti and Si layers
4. 2(a‐Si) + Ti Æ a TiSi + a‐Si ΔH
5. ΔH = ‐62kJ/mol
Kasica and Cotts, J. Appl. Phys. 89(3) 1 August 1997
15
The Materials Science of BSM Layers: Adhesion Layer Interfacial Structure
Adhesion Layer Interfacial Structure
• Sputter deposited Ti on Si (100)
• Amorphous Ti‐Si intermix layer is observed (2.5 nm thick)
Interfacial Structure on a nano‐
meter length scale
Sputtered Ti Layer
Amorphous Ti‐Si Layer (2.5 nm)
Silicon Wafer (100)
HREM
Raaijmakers and Kim, J. Appl. Phys. 67(10), 15 May 1990
16
The Materials Science of BSM Layers: Adhesion Layer Ti on Si
• HF
HF Etched/ Argon Sputtered Si prior to Ti Etched/ Argon Sputtered Si prior to Ti
deposition eliminates SiO2
• Large, negative (exothermic) enthalpy of Large negative (exothermic) enthalpy of
formation favors bonding of Ti to Si surface
• For sputtered Ti, thin intermixed layer of Ti and For sputtered Ti, thin intermixed layer of Ti and
Si form ideal bonding interface structure
– No brittle intermetallic phase at the interface
p
– Intimate mixing of Ti/Si 17
The Materials Science of BSM Layers: Adhesion Layer Electrical Considerations
I
V
• BSM contacts on semiconductor > Ohmic v
semiconductor‐> Ohmic v Schottkty contacts
• Function of semiconductor type (electron affinity)
• Function of semiconductor doping level
doping level (semiconductor Fermi level)
• Function of metal type (work function/ metal Fermi level)
Fermi level)
18
The Materials Science of BSM Layers: Adhesion Layer Electrical Considerations
•
Metal
SC
•
•
•
Metal and SC brought
into contactcontact electrons
flow until Fermi levels are
equal
Charge distribution
results in a potential
barrier at the interface
Contact characteristics
are determined by the
height and width of this
energy barrier
Barrier height is shifted
by applied bias
19
The Materials Science of BSM Layers: Adhesion Layer Electrical Considerations
• The lower the barrier height– more Ohmic the contact
• Negative Barrier favors electron flow from SC to metal
n-Si (1015 / cm3)
0.6
Barrier Heightt (eV)
0.5
0.4
03
0.3
0.2
0.1
0
-0.1
Zr
Ti
Nb
Ta
Al
Mo
W
Cr
-0.2
20
The Materials Science of BSM Layers: Adhesion Layer Electrical Considerations
•
•
•
•
n type semiconductor/ metal
n-type
junction
Metal work function is less than
the semiconductor work function
(ΦM < ΦS)
Metal Fermi level is below SC
conduction band
Charge flows from SC to metal
with no potential barrier (Ohmic
co tact)
contact)
21
The Materials Science of BSM Layers: Adhesion Layer Electrical Considerations
• El
Electrons
t
can also
l
tunnel through a
narrow potential
p
barrier to form an
Ohmic Contact
• Heavy
semiconductor
doping narrows the
barrier width
22
The Materials Science of BSM Layers: Adhesion Layer Electrical Considerations
Adhesion Layer Electrical Considerations
Contact resistivity
decreases with doping
level due to tunneling
current
23
The Materials Science of BSM Layers: Adhesion Layer Design Considerations
y
g
• Semiconductor surface must be oxide‐free for strong metal adhesion
–
–
–
•
Metal chemistry‐ strong impact on adhesion
–
–
–
•
Chemical etching
Argon sputtering
Controlled atmosphere prior to metallization
Negative Heat of Formation with the SC
Intimate mixing at the interface
N f
No formation of thick, continuous IMC layers
ti
f thi k
ti
IMC l
Ohmic Contact
–
–
–
Metal type (work function)
Semiconductor type (electron affinity)
Semiconductor type (electron affinity)
Semiconductor doping levels
24
The Material Science of BSM Layers: /
g y
Barrier/ Solder Wetting Layer
• Ni, NiV, Ni(P), Co(P), Co, NiCo, NiCo(P), Pd, Pt
• Low internal stress for deposited layer so that barrier layer does not compromise adhesion to SC surface
• Prevention of adhesion layer atomic diffusion (Ti, Cr) to thin film y
( , )
surface
– Ti or Cr would oxidize as a surface species
– Presence of Ti or Cr oxide would inhibit solder wetting
Presence of Ti or Cr oxide would inhibit solder wetting
• Prevent conduction layer (Cu) atomic diffusion to thin film surface
• Minimize formation of brittle ternary intermetallic compounds when barrier layer atoms reacts with the solder layer during die h b
l
h h
ld l
d
d
attach
25
The Material Science of BSM Layers: Barrier/ Solder Wetting Layer Internal Stress
• Deposited
Deposited thin film layers have internal stress
thin film layers have internal stress
• Internal stress increases with film thickness
• Internal stress is a strong function of deposition Internal stress is a strong function of deposition
technique and conditions
• Barrier layer stress can impact adhesion of the Barrier layer stress can impact adhesion of the
thin film stack to the semiconductor
26
The Material Science of BSM Layers: Barrier/ Solder Wetting Layer Internal Stress
Adhesion of Sputtered Ti/Ni Films on Silicon Wafers v. Ni Thickness
16
350
12
Internal Fo
orce (N/m)
Pull Tesst Values
14
10
8
6
4
2
300
250
200
150
100
50
0
0
30
250
0
500
1000
Sputtered Ni Film Thickness (nm)
p
( )
Internal Force (N/m)
Sputtered Ni Film Internal Stress Measured from wafer bending. Pull p
y
Tests to determine impact of Ni stress on adhesion of Ti layer to Si wafer (Kondo, J. Vac. Sci. Technol. A 11(2) Mar/Apr 1993
27
The Material Science of BSM Layers: Barrier/ Solder Wetting Layer Internal Stress
5
Stress in Plated Ni Sulfamate Layers
Dep
posit Interrnal Stres
ss, Kpsi
4
3
2
1
0
-1
1
1.25
2.5
4
5.25
6.5
Chem 1
Ch
Chem
2
-2
-3
-4
-5
-6
6
Current Density A/Dm2
28
The Material Science of BSM Layers: Barrier/ Solder Wetting Layer Diffusion Barrier
• Adhesion Layer metals (Ti, Cr) readily form oxides, nitrides, carbides
• Oxide/Nitride/Carbide layers prevent solder wetting
/
/
y p
g
• Critical to prevent Ti, Cr diffusion to the thin film surface where oxidation can occur
– Room temperature diffusion during storage
Room temperature diffusion during storage
– Diffusion at die attach temperature
– Diffusion during thin film annealing steps
•
•
Barrier Layer must inhibit Ti, Cr diffusion Barrier
Layer must inhibit Ti Cr diffusion
If Cu conductor layer is utilized, barrier layer should prevent Cu migration to the surface
• Thicker barrier layer more effective in inhibiting diffusion
barrier layer more effective in inhibiting diffusion
• Amorphous metal layers most effective diffusion barrier‐ no grain boundary diffusion Ni(P)
29
The Material Science of BSM Layers: Barrier/ Solder Wetting Layer Diffusion Barrier
• AgSn Solder interaction with Ti
interaction with Ti
• 250C
2,4,8 weeks
• 2,4,8 weeks exposure
• TiO2 surface
• Minimal solubility of Sn in Ti at 250C
Wetting of AgSn Solder on Titanium
Jim Morris
Morris, Cookson
30
The Material Science of BSM Layers: Barrier/ Solder Wetting Layer Diffusion Barrier
At% Cu
u in Barrie
er Film
Auger Study of Cu Diffusion through Electroless Plated Barrier Layers
1.4
1.2
400C for 2 Hours
1
0.8
Ni(P)
Co(P)
Ni-Co(P)
0.6
0.4
0.2
0
500
1500
2000
2500
Plated Layer Thickness (A)
31
Sullivan et al, IBM Research Journal (42) 1998
The Material Science of BSM Layers: Barrier/ Solder Wetting Layer IMC Formation
Solder Wetting Layer IMC Formation
Ni k l Pl
Nickel
Plating
ti
(Au0.5Ni0.5)Sn4* Ternary IMC
AuSn Eutectic
•Temperature Shock
•Brittle fracture along the
interface
•Single mode failure
mechanism
• Critical to adjust die bond
conditions to minimize ternary
IMC formation or dope Ni
plated layer with Co to reduce
IMC growth rate
32
The Material Science of BSM Layers: Barrier/ Solder Wetting Layer IMC Formation
Solder Wetting Layer IMC Formation
IMC Thickness for various barrier layer metals reacting with AuSn
200C
• Ni, Pt form thin IMC layers when reacting with AuSn solder
• Pd is a poor choice for barrier/ wetting layer with AuSn solder
Anhock et al.
33
The Material Science of BSM Layers: Barrier/ Solder Wetting Layer IMC Formation
Solder Wetting Layer IMC Formation
• IMC layers are typically brittle
• Thick, continuous IMC layers degrade adhesion and lower reliability
• Ternary IMC compounds have higher stress than binary Ternary IMC compounds have higher stress than binary
compounds • Choose barrier layer metals to minimize IMC formation (Ni vs. Pd for AuSn)
• Optimize die bond conditions to minimize IMC thickness/ continuity
34
The Material Science of BSM Layers: Barrier/ Solder Wetting Layer Thermal Conductivity
Solder Wetting Layer Thermal Conductivity
Thermal Conductivity of Barrier Metals
450
400
TC
C (W/m-K))
350
300
250
200
150
100
50
0
Ni
Pd
Pt
Cu (Ref)
Au (ref)
Barrier Metals- Poor Thermal Conductivity- Minimize Thickness
35
The Material Science of BSM Layers: Barrier/ Solder Wetting Layer Thickness Tradeoffs
Solder Wetting Layer Thickness Tradeoffs
Thicker Layer
Optimum Film Thickness is a tradeoff between these properties. This
trade-off
trade
off changes with different
deposition techniques
Thinner Layer
Thermal Resistance
Film Stress
Diffusion Barrier
36
The Material Science of BSM Layers: Barrier/ Solder Wetting Layer Design Considerations
Solder Wetting Layer Design Considerations
Barrier Metal
Choice
Deposition
Method
Film Thickness
Film Stress
Barrier
B
i
Effectiveness
IMC Formation
Thermal
Resistance
37
The Material Science of BSM y
Layers: Die Attach Materials
• Hard Solders
– AuSn
A S
– AuSi
•
Soft Solders
– PbSn, PbSnAg
b
b
– SAC
•
•
Thermal conductivity
Mechanical ductility (stress management between the die and substrate material)
• Cost
• Deposition Options
• Die Attach Temperature
38
The Material Science of BSM Layers: AuSi Die Attach Microstructure
Die Attach Microstructure
39
The Material Science of BSM Layers: AuSi Thermal Conductivity
Thermal Conductivity
40
The Material Science of BSM y
Layers: Die Attach Materials
Die Attach
Solder
Die Attach
Temp (C)
TC (W/mK)
Cost
Deposition
Options
AuSn
320
67
High
Evaporation,
Sputter Plating
Sputter,
(new)
AuSi
420
190
High
Sputtering,
Insitu reaction,
Evaporation
PbSn
205
59
Low
Evaporation,
Plating
CuAgSn
240
57
Low+
Evaporation,
Evaporation
Plating
41
BSM Deposition Methods
BSM Deposition Methods
42
Sputter Deposition of BSM Basic Process
RF
VCathode
Ti Target
Argon
Plasma
Si Substrate
Ar+
Ar+
Ti
V+
1. Generate an RF Ar Plasma
2. Bias the Target (‐)
3. Ar+ accelerates to the target
4. Collision knocks target atom off the target surface
5. Target atom collides with substrate surface
e-
43
Sputter Deposition of BSM Key Attributes
•
•
•
•
•
•
•
Highly non‐equilibrium process
Effective kinetic energy of depositing atoms can be very high
Surface of substrate bombarded with Ar during the deposition process‐ key effect on film morphology
Substrate surface can be cleaned by Ar sputter prior to deposition ( b
(substrate cathodic bias)
h d b )
For multilayer deposition, substrates moves over multiple targets sequentially
Man parameters can be adj sted for optim m film gro th (DC
Many parameters can be adjusted for optimum film growth (DC bias, substrate temperature, plasma power, Ar pressure)
Expensive: –
–
–
•
•
•
slow deposition
slow
deposition
expensive tools
deposited material must be formed into a sputter target
Clean, high vacuum process
Alloys can easily be deposited (alloy target)
Deposition occurs in a line‐of‐sight from target
44
E Beam Evaporative Deposition of BSM Basic Process
Spinning wafer holder
E beam
crucible
filament
45
E Beam Deposition of BSM Key Attributes
• Low cost: –
–
–
–
high deposition rate
hi
hd
iti
t
multiple wafers deposited simultaneously evaporated material in simple pellet form
moderate tool cost
d t t l
t
• Few adjustable parameters: substrate temperature
• Excellent process for thick layer deposition
• Sequential deposition of multilayer films: multiple crucibles are rotated under the e‐beam
• Clean, high vacuum process
• Alloys can sometimes be deposited (comparative vapor properties)
• Deposition occurs in “line of sight” to crucible‐
p
g
poor deposited p
p
material utilization efficiency
46
Electrolytic Plating Deposition of BSM Basic Process
Basic Process
Fountain Plater
Electrolyte
Metal+ + electron Æ Metal (deposited) [Cathode- wafer]
2Cl- Æ Cl2 + 2 electrons [Anode]
47
Electrolytic Plating Deposition of BSM Basic Process
Basic Process
• One wafer plated at a time O
f
l t d t ti
in each cell
• Uniformity +/‐ 5%
• Fully automated, self y
,
contained unit
48
Electrolytic Plating Deposition of y
BSM Key Attributes
• Substrate must be metalized prior to plating (“seed layer”)‐
typically used in combination with sputtered under layer
typically used in combination with sputtered under layer
• Deposition only occurs on cathode (substrate)‐ efficient utilization of deposited material
• High deposition rates
Hi h d
iti
t
• High tool costs (including Facilitization)
• Deposited metal supplied as metal salt (10% premium over metal cost)
• Complex process, many variables and trade‐offs
• Only very specific alloy systems can be deposited (compatible electrochemical properties)
49
Electroless Plating Deposition of BSM Basic Process
• Plating process with no electrodes
• Chemical species are oxidized/reduced in solution vs. on the p
/
surface of a anode/cathode
• Highly specialized chemical formulations are required
• Electroless deposition kinetics is enhanced by small Electroless deposition kinetics is enhanced by small
concentrations of catalysts (Pt, Pd) which are deposited on the substrate surface (conducting areas)
• Isolated metal traces can be plated
Isolated metal traces can be plated
• Crystalline or in some cases amorphous deposits
• Ni (P), Ni (B), Co (P), Au
• Slow deposition rate
Sl d
ii
• Limited to thin deposits
50
BSM Deposition Options and Trade‐Offs
Deposition
Process
Tool
Cost
Deposition
Rate
Material Utilization
Material Format
Key
Weaknesses
Application Strengths
Typical Material
Systems
Sputtering
High
Low
Poor
Targets
(high cost)
Slow deposition
Slow
deposition
rate, film stress
Alloys, excellent Alloys
excellent
adhesion with thin layers
Ti, Ti/W, NiV, Pt, Ti
Ti/W NiV Pt
Pd, Au
Evaporation
Mode
rate
High
Poor
Pellets
Adhesion issues for some systems, inefficient
material utilization
Thick metal layers, cost sensitive applications
Ti, Ti/W, Ni, Au, AuSn
Electro‐
plating
High
Moderate
Good
Metal salts
Poor thickness control, process t l
complexity, limited material options
Precious metals, Cost sensitive
applications, thick layers, very thin layers (immersion plating)
Solders, Sn, Ni, Au, Co, Cu
Electroless
plating
Low
Low
Good
Metal salts in complex
baths
Poor thickness control, process complexity, limited material options, thin y
y
layers only
Cost sensitive applications, low capital, amorphous layers possible, isolated features
Ni(P), Ni (B), Co(P), Au
51
Examples of BSM Systems
Examples of BSM Systems
52
Examples of BSM Materials Systems and Combinations of Deposition Methods
Application
Semiconductor
BSM System
Laser Diodes
II VI
II-VI
Sputtered Ti/Pt/Au or evaporated Ti/W/Ni/Au/AuSn
MEMs High
Power
Transducers
Silicon
Sputtered Ti/Pt/AuSn/Au
Power RF
Devices
GaAs
Sputtered Ti/W/Au followed by electrolytic Au plating
(thick)
Power
Semiconductors
(IGBT)
Silicon
Ti/Ni/Ag followed by PbSn, PbSnAg or CuSnAg
solder
ld
53
Summary
54
Back Side Metallization System‐
Summary
• The Back Side Metallization of wafers is a multifunctional requirement that is satisfied by utilizing multilayer thin film technology
• Fundamental materials science principles and analysis F d
t l
t i l i
i i l
d
l i
techniques are used to tailor the properties of each individual metallization layer
• Metal reactivity, crystal structure, and phase formation tendencies are balanced to create appropriate multilayer film properties
multilayer film properties
55