JEOL JBX-9300FS Electron Beam Lithography System Training

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JEOL JBX-9300FS
Electron Beam Lithography System
Training
6/17/09, revision 11
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Course Outline
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Explain hardware
column, lenses, amplifiers
field, chip, subfield
shot pitch, beam diameter
D = (I * t)/A
Calibration
AE & BE marks
INITAE, INITBE, PDEFBE, SUBDEFBE, DISTBE
HEIMAP
Substrate
various cassettes
global & chip mark alignment
virtual chip mark height detection
Pattern Preparation
CAD file preparation
linkCAD conversion
file transfer
JBXFiler
Job Deck & Schedule File
Schd and Array check
ALD & Exposure
Resist Exposure & development
positive & negative resists
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contrast
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liftoff, etching
Proximity Effect
Website
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Why E-beam Lithography?
• exceeds patterning capability of optical
lithography
– easily pattern sub-micron features
– MiRC has demonstrated 6.5nm features
• patterns rapidly created from CAD file
– no mask necessary like optical lithography
– rapid turn around on design modifications,
ideal for research
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JBX-9300FS key features
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4nm diameter Gaussian spot electron beam
50kV/100kV accelerating voltage
50pA – 100nA current range
50MHz scan speed
+/- 100um vertical range automatic focus
+/- 2mm vertical range manual focus
ZrO/W thermal field emission source
vector scan for beam deflection
max 300mm (12") wafers with 9" of writing area
< 20nm line width writing at 100kV
< 20nm field stitching accuracy at 100kV
< 25nm overlay accuracy at 100kV
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Generic Block Diagram
Gun
Gun
Control
Electron Opics
Pattern Proc.
and control
Blanking
Control
Deflection
Control
reference
marks
Electron Optics
Control
Computer
stage
motor
stage
Stage
Control
stage
motor
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y-interferometer
x-interferometer
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Column
ZrO/W emitter
Suppressor
Electron gun
First anode
Second anode
Acceleration electrodes
Ground anode
First alignment coil
Second alignment coil
Blanking aperture
Blanking electrode
Second
lens
Zoom lenses
Third
lens
Dynamic focus correction electrode
Third alignment coil
Objective aperture
Dynamic astigmatism correction electrode
Subsidiary deflector (SUBDEF)
Objective
lens
Electromagnetism astigmatism correction
electrode
Main deflector (PDEF)
Backscattered electron detector
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Workpiece
surface
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Beam & Stage Position
Stage position accuracy = λ / 1024 = 0.62nm
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PDEF & SUBDEF
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Top View of Stage
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Side View
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Stage w/o Cassette
laser mirrors
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cassette goes here
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Wafer Cassette
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Field Stitching
500 µm
(100kV)
500 µm (100kV)
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Within Field Writing
Vector scan
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4” Wafer with Chips
2mm
2mm
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Example “Chip”
Subfields
4um
4um
500um
Field
500um
beam
diameter
Chip
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shot pitch
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Objective Aperture
larger aperture = larger beam diameter, more current
smaller aperture = higher resolution
aperture
3,4,5
6
7
beam diameter
4 – 9nm
8 – 14nm
30nm
min resolution
< 20nm
30nm
60nm
current range
50pA – 2nA
2nA – 7nA
10nA
Most of the time, the 9300 will be set to aperture #3 and 2nA beam current.
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Beam diameter as a function of current & aperture
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Dose Equation
D = (I * t) / A
where
D = dose (µC/cm2)
I = current (A)
t = time (sec)
A = exposure area (cm2)
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Job Time Estimate
t = ( D * A) / I
if
D = 200 µC/cm2
A = 1 cm2
I = 2nA
then
t = 27 hours 46 min
time calculator at http://nanolithography.gatech.edu/tcalc.php
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Shot Pitch
• Shot pitch is equivalent to pixel value – the
smaller the shot pitch, the better the
feature definition
• Shot pitch is limited by scanning frequency
of the SUBDEF (max = 50MHz)
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Effect of Shot Pitch
Energy deposited in resist
Consider a line is exposed
with 200uC/cm^2 dose. Depending
on the number of pixels that
the line-width is divided into,
the line edge roughness (LER)
and line-width will vary.
x
The graph at right shows
the cross-section of energy
deposition profile of a line with
1,2,4 and n pixels.
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Minimum Shot Pitch Calculation
• t = D.A/I
• A = area of pixel = a2
• t = 1/fclk where fclk is the maximum
scanning frequency of the amplifier
• Æ a = √I/(fclk.D)
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Faraday Cup
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Explain hardware
column, lenses, amplifiers
field, chip, subfield
shot pitch, beam diameter
D = (I * t)/A
Calibration
AE & BE marks
INITAE, INITBE, PDEFBE, SUBDEFBE, DISTBE
HEIMAP
Substrate
various cassettes
global & chip mark alignment
virtual chip mark height detection
Pattern Preparation
CAD file preparation
linkCAD conversion
file transfer
JBXFiler
Job Deck & Schedule File
Schd and Array check
ALD & Exposure
Resist Exposure & development
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positive & negative resists
–
contrast
–
liftoff, etching
Proximity Effect
Website
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Stage
faraday cup
AE, BE mark
SEM sample
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Absorbed Electron Detection
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INITAE
metal grid
y-scan
x - scan
y - scan
x-scan
ds/dx
ds/dy
pn junction
mark center position
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Backscattered Electron Detection
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INITBE
Au cross on Si substrate
x - scan
y - scan
x-scan
y-scan
ds/dx
ds/dy
mark center position
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PDEFBE, SUBDEFBE, DISTBE
mark detection
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PDEFBE & SUBDEFBE
gain
500 um
4 um
1
top
2
3
482um
500 um
4
482um
right
left
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4 um
5
rotation
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8
9
bottom
PDEFBE
4 points measured
x & y gain correction
x & y rotation correction
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shift
SUBDEFBE
9 points measured
x & y gain correction
x & y rotation correction
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DISTBE Field Distortion Correction
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Height Detection
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HEIMAP
• measures height across wafer on defined
array positions (adjustable by user)
• takes average height and uses that for
focus value for writing everywhere
• appropriate for 100pA & 1nA current
• not appropriate for 10nA – use virtual chip
mark height detection
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•
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–
–
–
–
–
•
•
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Explain hardware
column, lenses, amplifiers
field, chip, subfield
shot pitch, beam diameter
D = (I * t)/A
Calibration
AE & BE marks
INITAE, INITBE, PDEFBE, SUBDEFBE, DISTBE
HEIMAP
Substrate
various cassettes
global & chip mark alignment
virtual chip mark height detection
Pattern Preparation
CAD file preparation
linkCAD conversion
file transfer
JBXFiler
Job Deck & Schedule File
Schd and Array check
ALD & Exposure
Resist Exposure & development
–
positive & negative resists
–
contrast
–
liftoff, etching
Proximity Effect
Website
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Available Cassettes
• Wafer
– 75mm, 100mm, 150mm, 200mm diameter
– 300mm can be purchased for up to 9” square
writing area
• Masks
– 5” mask, 6” mask
• Pieces
– minimum 3 x 5mm piece
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4” Wafer Cassette
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Backside of Wafer Cassette
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Global & Chip Mark Detection
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•
–
–
–
•
–
–
–
–
–
–
•
•
•
Explain hardware
column, lenses, amplifiers
field, chip, subfield
shot pitch, beam diameter
D = (I * t)/A
Calibration
AE & BE marks
INITAE, INITBE, PDEFBE, SUBDEFBE, DISTBE
HEIMAP
Substrate
various cassettes
global & chip mark alignment
virtual chip mark height detection
Pattern Preparation
CAD file preparation
linkCAD conversion
file transfer
JBXFiler
Job Deck & Schedule File
Schd and Array check
Resist Exposure & development
positive & negative resists
–
–
contrast
–
liftoff, etching
Proximity Effect
Website
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CAD file conversion
AutoCAD
.DXF file
linkCAD
or
CADENCE
file
GDSII file
or
JEOL01
file
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JBXFILER
JEOL52
v3.0 file
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SCHD execution
specifies
1. JEOL52 v3.0 pattern file
2. how to arrange on wafer
3. shot modulation
4. type of calibration
5. beam current
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specifies
1. wafer cassette window
2. calibration file
3. base dose
4. job deck file(s) to use
5. shot pitch
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Pattern Preparation
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JBXFILER Pattern Preparation
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–
•
•
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Explain hardware
column, lenses, amplifiers
field, chip, subfield
shot pitch, beam diameter
D = (I * t)/A
Calibration
AE & BE marks
INITAE, INITBE, PDEFBE, SUBDEFBE, DISTBE
HEIMAP
Substrate
various cassettes
global & chip mark alignment
virtual chip mark height detection
Pattern Preparation
CAD file preparation
linkCAD conversion
file transfer
JBXFiler
Job Deck & Schedule File
Schd and Array check
Resist Exposure & development
positive & negative resists
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–
contrast
–
liftoff, etching
Proximity Effect
Website
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Negative/Positive Resist
exposing e-beam
exposing e-beam
substrate
NEGATIVE
POSITIVE
select appropriate resist for process and to minimize writing time
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resist vs. dose curves
more
sensitive
negative
positive
less
sensitive
resist
thickness
resist
thickness
dose
dose
resist
thickness
more
contrast
less
contrast
dose
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Resists on hand at MiRC
• Positive resists
– ZEP520A
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-
good etch resistance
fast
good resolution (~ 10nm)
expensive ($3/mL)
– PMMA
+
+
+
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cheap ($1/mL)
good for liftoff
high resolution (< 10nm)
poor etch resistance
slow
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• Negative resist
– XR-1541 (HSQ)
+ good etch resistance
(HSQ is basically SiO2)
+ excellent resolution
(6.5nm)
- slow
- expensive ($4/mL)
– ma-N 2403 (Novolak)
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good etch resistance
optical DUV exposable
faster than HSQ
moderately priced
($2/mL)
- poor adhesion to quartz
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Resist Comparison
1.2
resist
HSQ
PMMA
ZEP
1280
480
200
normalized resist thickness
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0.8
0.6
0.4
0.2
0
-0.2
100
200
300
400
500
600
800
1000
2000
3000
dose (uC/cm2)
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Metal Liftoff
evaporate metal onto
patterned resist
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strip resist
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–
–
–
–
•
•
•
Explain hardware
column, lenses, amplifiers
field, chip, subfield
shot pitch, beam diameter
D = (I * t)/A
Calibration
AE & BE marks
INITAE, INITBE, PDEFBE, SUBDEFBE, DISTBE
HEIMAP
Substrate
various cassettes
global & chip mark alignment
virtual chip mark height detection
Pattern Preparation
CAD file preparation
linkCAD conversion
file transfer
JBXFiler
Job Deck & Schedule File
Schd and Array check
Resist Exposure & development
positive & negative resists
–
–
contrast
–
liftoff, etching
Proximity Effect
Website
6/17/09, revision 11
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Electron Solid Interactions
• electrons forward scatter in resist (alpha)
• electrons backscatter off substrate (beta)
• Causes dose to spread away from where
you want it to go, and expose areas you
don’t want to be exposed
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Forward Scattering (α)
• as electrons enter resist, they experience
small angle scattering, effectively
broadening the initial beam diameter
• forward scattering is minimized by using the
thinnest possible resist and highest
accelerating voltage
d f = 0.9( Rt / Vb )
1.5
df = effective beam diameter (nm)
Rt = resist thickness (nm)
Vb = acceleration voltage (kV)
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Backscattering (β)
• as electrons pass thru resist and enter
substrate, many will undergo large angle
scattering events
• these electrons may return back into the
resist at a significant distance from the
incident beam, causing additional resist
exposure → this is called the proximity
effect
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Electron Solid Interaction
Source: SPIE Handbook of Microlithography, Section 2.3 Electron-Solid Interactions
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Simulated Electron Energy Profile
Source: SPIE Handbook of Microlithography, Section 2.3 Electron-Solid Interactions
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Alpha & Beta
(for 0.5um resist on Si substrate)
Beam energy
(keV)
α (um)
β (um)
η
5
10
20
50
100
1.33
0.39
0.12
0.024
0.007
[0.18]
[0.60]
2.0
9.5
31.2
[0.74]
[0.74]
0.74
0.74
0.74
backscattered electrons have large range at 100kV!!!
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Influence of Proximity Effect on
Pattern Generation
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Line Edge Deviations due to
Proximity Effect
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Proximity Effect Correction by Dose
Modulation
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Proximity Effect Correction by
Shape Modulation
original CAD pattern
calculated shape
modification to
achieve desired
line
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simulated dose
profile
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Dose Dependencies
pattern size
required dose
pattern density
required dose
resist thickness
required dose
acceleration voltage
required dose
substrate AMU
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required dose
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Example of Proximity Effect
large exposed area
next to small lines
causes overexposure
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How to correct in my CAD file?
• separate small features from large features by
placing on different layers in AutoCAD
• then assign a different datatype to each layer in
linkCAD
• then assign different doses (shot modulation) to
each datatype
– try a wide range of doses on your first exposure
• use SEM image to make careful dimension
measurements
• adjust dose as necessary and repeat exposure
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Test Pattern
line
width
50 x 50um
2nm
10nm
20nm
50nm
100nm
200nm
500nm
1000nm
1 x line
2 x line 3 x line
4 x line
5 x line
10 x line
10um
20um
30um
40um
50um
space width
(exception: 2nm line group has same spacing as 10nm line group)
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1um lines in ZEP at various pitch
1.3
line:space ratio
"1:01"
"1:02"
"1:03"
"1:04"
"1:05"
"1:10"
"1:20"
"1:30"
"1:40"
"1:50"
1.25
line width (um)
1.2
1.15
1.1
1.05
1
0.95
0.9
100
200
300
400
500
600
700
800
900
1000
1100
actual dose (uC/cm2)
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Required dose for 1um line in ZEP
as a function of grating
5000
1um dose (uC/cm2)
4000
3000
2000
1000
1um dose (uC/cm2) = 98.318479 + 85.290888 space/line ratio
0
0
10
20
30
40
50
60
space/line ratio
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•
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–
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•
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–
–
–
–
•
•
•
Explain hardware
column, lenses, amplifiers
field, chip, subfield
shot pitch, beam diameter
D = (I * t)/A
Calibration
AE & BE marks
INITAE, INITBE, PDEFBE, SUBDEFBE, DISTBE
HEIMAP
Substrate
various cassettes
global & chip mark alignment
virtual chip mark height detection
Pattern Preparation
CAD file preparation
linkCAD conversion
file transfer
JBXFiler
Job Deck & Schedule File
Schd and Array check
Resist Exposure & development
positive & negative resists
–
–
contrast
–
liftoff, etching
Proximity Effect
Website
6/17/09, revision 11
69
Website
•http://nanolithography.gatech.edu
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