This is an remake of the original schematic circuit diagram.

Special Thanks! 130877 TRALOL weaver wins200786 QueenSoft Mihail_tm abraziff Professional Schematic! A1395,A1396,A1397(k94ap) Wites OM Tesla Don't Forget To Donate!!! Special Thanks! ..::Neo::.. ~AhmedLeO~ Gecko UK Mobileinfo Hobson Noobfix DataRus Kostelectronics diesel57 8 7 6 5 4 3 2 1 Wites OM Tesla READ BEFORE PROCEED! PRINTS MARKED WITH COPER ARE NC,EMPTY! PRINTS MARKED WITH GOLD ARE CONNECTED ONLY TO TEST POINTS NO OTHER CIRCUIT! IF YOU REBALL U3100 LOOK CAREFUL IF B9 AND B10 THAT LOOK LIKE A JUMPER IS REMOVED TOUCH WILL NOT WORK IF SO HAPPEN MAKE A JUMPER ON THE IC! NOSTUFF COMPONENTS JUST LOOK ON BOARD THEY ARE NOT MOUNTED(MISSING)! D D WLAN/BT PCB 7871 1114 T4149 BROADCOM BCM43291HKUBG TE1111 P10 127271 3TC LA 4 21 G8 J3700 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 C5722 C5721 R5790 20 21 22 23 24 25 C8155 C8156 C8236 C8201 D8230 TP82 C8226 TP80 L8225 C8234 C8233 TP84 TP83 R6100 C6100 R6101 D8228 TP92 31 B1 C1 R3713 C3103 C3711 A3 R5750 R3711 C3104 A2 B2 C2 A1 B1 C1 R3701 R5751 C3 B3 U3700 R5721 D5701 D5703 D5700 D5702 DZ5751 R5720 44 C5782 A R3155 B C D E TP176 L5714 TP93 L2202 L2232 L2222 L2212 TP167 FL5708 TP163 G H J K 10 9 9 8 8 TP166 TP165 TP160 TP161 TP162 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 U3100 6 32 5 J2201 TP159 4 3 2 2 1 B C D E F G H J K TP156 TP151 TP152 TP146 TP144 TP147 TP148 TP149 TP143 TP141 TP140 TP142 TP135 TP136 TP137 TP138 TP139 TP131 4 TP132 5 TP133 TP134 TP124 TP125 TP119 TP120 TP99 TP121 TP113 TP114 TP115 TP116 TP109 TP110 C3006 TP111 TP112 TP104 TP105 TP106 TP107 TP100 TP101 TP102 TP103 A 23 25 27 29 31 33 35 37 TP108 11 13 15 17 19 21 TP130 TP123 TP118 U3000 L3000 4R7 TP182 TP183 TP184 TP185 TP186 B 10 12 14 16 18 20 22 24 26 28 30 32 34 36 TP129 TP117 D3000 TP181 8 TP128 C3000 TP98 TP180 6 TP127 J3011 C3002 C3001 C3008 R3009 TP179 9 R3066 C3005 R3012 TP178 7 TP126 TP122 C3009 2 U3003 TP150 TP145 3 A B C D E F G H J K L 11 11 10 10 9 9 8 8 7 7 6 6 5 5 4 4 3 3 2 2 1 1 A B C D E F G H J K L C3802 TP155 5 3 A TP154 6 1 C2220 TP158 7 7 TP97 TP177 FL5707 F TP175 TP169 DZ5790 R3702 TP174 TP168 L5720 L5700 43 C5754 C5751 L5716 L5701 FL5711 10 C3801 C3800 C3713 A1 C3712 C2 TP164 4 C2233 B2 TP157 TP91 C8235 C3 B3 A2 R3712 R3101 R3190 C3191 A3 U3710 R3700 C3041 R3030 R3025 C3050 C3107 C3105 R3031 R3033 C3102 R3107 C3108 C3111 C3106 C2230 C2203 C2202 R3161 R3160 C3030 U3007 C8221 L8229 C8163 C8238 C8162 C8152 C8212 C8214 C8145 C8154 C8150 C8148 C8136 C8168 C8153 R5752 C8143 C8144 C8130 L2201 R3120 C3101 C8215 R3032 C2206 19 R2200 18 C3031 9 8 7 6 5 4 3 2 1 R3181 C2232 17 A B C D E F G H J C2231 16 U3101 R2201 15 C3110 A B C D E F G H J C2200 14 R8240 13 R8231 12 R8232 11 R8239 10 R8227 9 C3112 C2204 R2250 Q2200 D8100 R8235 8 XW8114 C8125 C8207 R8219 7 R2210 R2203 TP95 9 8 7 6 5 4 3 2 1 C3109 C2240 R2204 C2241 C8206 C8220 K R8222 6 R3173 R3171 C8237 5 TP94 J P R8203 Y8138 Q2201 H N 4 R3180 G P 3 R2211 F N 2 C5755 R2205 C8210 R9001 R0701 E C8204 1 C8165 R8116 R8130 C8117 C8139 C8141 C8138 C8140 C8137 C8131 R5753 L8112 R0700 25 C8159 24 C8160 R0651 23 C8142 TP81 R1211 C8124 22 C8223 TP74 TP75 21 L2200 R1371 20 C8232 C1370 R1370 R1320 C8121 C8122 C8102 C8164 C8107 C8103 R8202 C8157 Q8351 R8350 R8353 TP73 R1362 R1361 C1300 R1315 19 C8217 C8146 TP72 18 M R1212 R1360 R1213 B A R1214 4 3 2 1 F E D C J C8151 C2010 R2001 C8108 C2004 C2014 C2000 R0878 R2008 R2003 FL2000 C2016 C1104 C1105 C1107 C1106 U1300 4 3 2 1 C5730 U5730 F E D C R0647 R5730 C0956 Y0602 C0607 C0613 C1022 C1120 C1119 C1111 C1021 C1118 C1113 C1114 C1116 C1112 C1115 C1117 C1000 C1110 C1109 C1108 C0651 C0648 C0608 C0660 C0646 C0640 R0655 C0644 R1053 R1054 DZ0600 C1054 C0641 C1250 TP71 B A R5796 TP69 TP67 C1301 R0645 R5795 R0646 C0618 R0632 XW0604 R0617 TP58 C1016 17 L TP70 C0925 R1372 R5731 R5710 C2002 C1034 R1251 C1703 C0926 R1250 C1702 C0642 C0627 C1031 C8147 16 M C8167 TP66 TP63 C0927 C1035 C1707 R1720 R0950 C0955 C1706 R0955 C0954 R1723 FL0910 R0956 C0951 R0957 C0952 R0900 C1006 R0940 R0720 C1143 R1205 C1019 C1043 R1206 R1051 TP55 C1101 C1024 C1130 C1125 C1126 C1129 C1030 C1128 C1012 C1151 C1020 R1203 R1202 C1013 R0771 R0736 R0770 R0739 R0738 R0735 C1046 R9000 R1209 R1208 R0737 C1152 C1029 C1150 R1200 R1204 C1011 R1006 C1002 C1412 R1201 TP54 TP52 R0861 TP61 TP50 XW0605 OF0 TP56 C1704 TP62 R0688 OE0 C0950 TP59 TP53 C1705 C1251 R0920 R0689 OD0 TP51 C0643 C1015 C8149 TP68 R1253 15 L C8169 C0909 R1252 C0924 TP60 R0662 OC0 C1182 TP57 R1210 OB0 C1008 DZ5720 OA0 R0827 R0828 TP49 C1044 R1731 R0867 R1000 C0654 C1018 R1001 C0655 R1401 C1400 C1411 OF0 A B C D E F G H J K L M N R0865 C1045 C5780 OE0 TP48 C1180 C0930 C0903 C0908 C0902 C0661 C7522 R7541 C7523 C0907 OD0 C1146 R1052 C1161 R1751 OC0 C1147 C1041 R1750 OB0 R0863 C1149 C1052 C0923 OA0 R0862 C1160 C8209 14 U8100 G K TP64 13 D E H C0630 12 D C8135 C0640 11 C C8161 TP65 C8158 10 C F C1181 9 B R1260 C1009 R0625 8 A C1142 C1004 7 1 B R0933 AY AW AV AU AT AR AP AN AM AL AK AJ AH AG AF AE AD AC AB AA Y W V U T R P N M L K J H G F E D C B A C1148 R0642 R0622 C0652 L8128 6 C3053 C3007 J5501 A B C D E F G H J K L M N R0932 30 31 32 33 34 C1750 22 24 26 28 30 32 34 36 30 31 32 33 34 U1701 10 12 14 16 18 20 C1017 TP78 5 33 35 37 8 R0812 R5501 TP20 R0860 R0834 C1005 27 28 29 R0910 U5500 U1400 C5530 C5501 L5540 C5500 C5542 U5501 C5541 C5521 L5520 C5540 L5500 C5522 R5510 R5511 L5501 C5520 R5513 R5512 R0811 R0866 27 28 29 C1014 R0813 TP8 R0802 U1410 C1413 C3609 C1403 R4212 R4213 C4213 TP7 6 R1207 R8218 C1027 D4 C1401 C4 D3 R0831 R0836 C3 D2 R0832 C3803 C2 D1 R0864 R3800 C1 C4201 R0825 R0833 C1410 C3616 U4200 B4 R4201 A4 B3 R3605 C4212 C4216 A3 B2 R3604 R3603 R4202 C3608 C3603 C3607 C3850 C3851 C3613 C3615 R3601 C3606 L4303 R3850 R3602 C3614 L4306 L4304 R3851 L5510 C5511 A2 B1 7 6 5 4 3 2 1 24 25 26 TP76 4 B 10 12 14 16 18 20 22 24 26 28 30 32 34 36 A1 7 6 5 4 3 2 1 C1144 24 25 26 TP77 3 A 19 21 23 25 27 29 31 33 35 37 39 41 8 R4203 C4200 C3854 L4302 C4211 C1145 TP79 C5760 6 L4301 C B A A B C D E F G H J K L M N 7 6 5 4 3 2 1 R0623 2 1 R8354 DZ5752 C5753 C TP173 4 C5510 U3600 11 10 9 8 7 6 5 4 3 2 1 7 6 5 4 3 2 1 R8352 L8115 20 22 24 26 28 30 32 34 36 38 40 42 U5700 TP96 2 A R0800 C8120 R8351 R0621 TP89 11 13 15 17 19 21 23 25 27 29 31 C B C3600 C3601 OF8 A3 DZ8120 TP87 J3010 TP9 C3605 C3602 C3853 OE8 B3 C8166 2 1 TP6 C4310 R4312 OD8 C3 C8119 TP88 C8118 3 5 7 9 11 13 15 17 9 C3852 3 C4217 OC8 A2 R0620 R0624 22 23 A1 B2 R5740 1 7 6 5 4 F E D OB8 22 23 B1 C2 DZ5712 5 7 F E D C3617 OA8 C1007 R1005 A B C D E F G H J K L M N R0810 C3611 G OF8 C8351 C1 Q8350 2 4 6 8 10 12 14 16 18 DZ5711 DZ5710 18 20 22 24 26 28 30 3 TP10 11 10 9 8 7 6 5 4 3 2 1 OE8 C2012 17 19 21 23 25 27 29 1 9 8 G OD8 C1039 C2015 Q8104 L5761 10 C3604 C3618 OC8 C1102 C1103 H G F E D C B A C2001 C8353 Q8123 L5762 12 11 OB8 C1100 C1121 C2017 C8352 L5763 14 13 OA8 R0803 13 14 15 16 17 18 19 20 21 U0652 R2052 C1001 R2002 L5760 16 15 C5512 TP11 R0801 U2000 FL2002 R2010 U3010 MT1 18 17 R1400 C0920 1 2 3 4 5 6 7 8 9 10 11 12 C2013 C3702 TP12 21 20 19 4 C1402 13 14 15 16 17 18 19 20 21 C1040 C1010 C3703 C1404 C1026 C3701 C1414 23 2 FL7500 FL0610 C5618 22 TP5 C7525 L5600 C5621 C5617 C5613 L5613 C5620 L5611 C5612 R0931 R0930 R5600 TP27 C5600 R0703 R0702 L5610 C563 C5601 R3621 R3622 R0704 R0705 L5612 C5616 C5623 C5602 C1037 C1038 C5750 DZ5750 R3620 C1036 R8216 TP172 DZ5760 C3704 C5614 R3608 C1139 2 4 6 8 10 12 14 16 R3703 TP13 25 24 C1133 C1134 1 3 5 7 9 11 13 15 C3714 C5615 26 C1140 1 TP171 C8100 U3009 J6100 TP28 TP14 28 27 TP4 R9002 C1136 2 DZ5753 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 TP33 R5610 C1138 L6000 3 C5752 32 TP15 29 TP3 TP32 TP34 C7524 R5612 R5611 32 31 30 LED9000 TP31 R5613 L5601 TP16 34 33 TP30 TP29 J5600 TP17 37 36 35 C1135 TP90 TP86 TP85 TP170 J5900 39 38 C1141 C1137 L8107 TP18 40 TP2 J7500 TP35 41 1 2 3 4 5 6 7 8 9 10 11 12 R1056 C1056 L8110 44 43 42 R1055 C1042 AY AW AV AU AT AR AP AN AM AL AK AJ AH AG AF AE AD AC AB AA Y W V U T R P N M L K J H G F E D C B A R2006 C6000 C3753 TP26 1 2 3 4 5 6 7 8 L8119 L8100 TP25 TP24 U2001 FL2001 H G F E D C B A 1 2 3 4 5 6 7 8 C2011 R8100 C3752 TP23 TP22 TP19 45 C1132 L8121 L8101 48 47 46 C1127 C8101 C3750 TP21 49 C1131 R0765 L5757 J6000 50 TP1 TP44 TP42 C6001 L8105 C TP47 TP45 TP40 TP38 R2051 C3751 TP43 TP36 L6001 R2050 C5783 TP37 TP46 C2003 4 C1032 C1023 TP41 TP39 A 820-2875-05 MLB TOP PCB 8 7 6 5 4 3 2 1 8 7 6 5 4 3 2 1 D D TP187 TP191 TP188 TP190 TP388 TP379 J7500 TP381 TP349 TP192 TP189 TP380 TP367 TP282 TP303 C TP264 TP265 TP263 TP266 TP321 TP387 TP368 TP341 TP389 TP193 TP390 TP391 TP386 TP281 TP283 TP320 TP302 TP392 TP382 TP304 TP284 TP301 TP285 TP280 TP342 TP319 TP347 TP371 TP322 TP261 TP262 TP259 TP260 TP336 TP318 TP595 TP343 TP338 TP593 TP384 TP596 TP363 TP346 TP373 TP300 TP305 TP335 TP597 TP399 TP344 TP218 TP199 TP7500 TP453 TP398 TP339 TP7502 TP454 TP221 TP219 TP198 TP616 TP508 TP467 TP345 TP571 TP618 TP451 TP200 TP201 TP340 TP227 TP258 TP576 TP466 TP401 TP572 TP350 TP211 TP208 TP230 TP360 TP210 TP254 TP255 TP405 TP273 TP570 TP624 TP600 TP464 TP627 TP490 TP625 TP580 TP275 TP631 TP579 TP510 TP408 TP469 TP352 TP474 TP480 TP628 TP547 TP491 TP309 TP274 TP277 TP249 TP292 TP463 TP410 TP462 TP365 TP470 TP492 TP471 TP447 TP356 TP376 TP494 TP521 TP525 TP533 TP484 TP488 TP411 TP330 TP483 TP487 TP495 TP524 TP536 TP528 TP538 TP534 TP526 TP537 TP607 TP562 TP518 TP499 TP527 TP535 TP436 TP440 TP442 TP588 TP610 TP636 TP638 TP614 TP635 TP611 TP637 TP639 TP615 TP555 TP501 TP612 TP609 TP587 TP519 TP557 TP503 TP235 TP613 TP608 TP589 TP441 TP237 TP586 TP561 TP560 TP554 TP500 HF/e1 TP584 TP553 TP552 TP502 TP458 TP445 TP444 TP423 TP606 TP551 TP506 TP459 TP412 TP240 TP238 TP605 TP550 TP590 TP520 TP430 TP422 TP585 TP563 TP517 TP498 TP443 TP439 TP417 TP364 TP583 TP496 TP513 TP421 TP604 TP591 TP478 TP477 TP435 TP415 TP243 TP548 TP603 TP446 TP418 TP592 TP539 TP549 TP472 TP460 TP239 B TP634 TP540 TP529 TP438 TP434 TP429 TP378 TP414 TP523 TP516 TP497 TP420 TP425 TP329 TP486 TP482 TP431 TP424 TP416 TP413 TP377 TP476 TP461 TP419 TP328 TP325 TP294 TP242 TP602 TP564 TP512 TP437 TP428 TP312 TP601 TP582 TP331 TP326 TP295 TP581 TP541 TP530 TP432 TP311 TP293 TP522 TP493 TP481 TP475 TP515 TP514 TP427 TP426 TP357 TP315 TP296 TP246 TP244 TP241 TP633 TP375 TP355 TP324 TP313 COMPEQ TP489 TP485 TP511 TP358 TP354 TP332 TP327 TP314 TP310 TP245 TP479 TP473 TP353 TP276 TP248 TP433 TP366 TP333 TP316 TP247 TP626 TP409 TP317 TP297 TP632 TP630 TP542 TP291 TP334 TP629 TP543 TP448 TP359 TP278 TP622 TP599 TP531 TP407 TP351 TP323 TP308 TP623 TP578 TP573 TP546 TP457 TP307 TP298 TP290 TP252 TP251 TP449 TP306 TP289 TP215 TP250 TP621 TP577 TP569 TP532 TP507 TP406 TP8133 TP288 TP272 TP253 TP231 TP509 TP7503 TP404 TP279 TP217 TP216 TP620 TP574 TP565 TP619 TP456 TP374 TP8101 TP271 TP223 TP209 TP450 TP270 TP287 TP214 TP544 TP598 TP299 TP269 TP207 TP212 TP7501 TP403 TP286 TP257 TP256 TP229 TP224 TP468 TP465 TP402 TP225 TP213 TP222 TP568 TP361 TP228 TP206 TP205 TP204 TP617 TP575 TP545 TP455 TP400 TP268 TP202 TP203 TP567 TP566 TP226 C 1 TP397 TP396 TP370 TP452 TP220 TP197 TP196 2 TP594 TP395 TP383 TP372 TP362 TP369 TP195 3 TP385 TP337 TP194 TP267 4 TP394 TP393 TP348 TP504 TP556 TP559 TP558 TP505 TP236 B 820-XXXX-X TP232 TP233 TP234 A A 820-2875-05 MLB BOTTOM PCB 8 7 6 5 4 3 2 1 8 6 7 5 3 K94 CHOPIN MLB 1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. 2 1 REV ECN DESCRIPTION OF REVISION A 0001052699 CK APPD DATE PRODUCTION RELEASED 2011-01-10 PVT REV. A D D LAST_MODIFIED=Mon Jan 10 13:11:06 2011 PDF CSA CONTENTS SYNC MASTER DATE TABLE_TABLEOFCONTENTS_HEAD 1 1 2 TABLE OF CONTENTS MIKE N/A 2 BLOCK DIAGRAM: SYSTEM MIKE N/A 5 BOM TABLE MIKE N/A 6 AP: MAIN JAMES N/A 7 AP: I/Os JAMES N/A 8 AP: NAND JAMES N/A 9 AP: TV,DP,MIPI JAMES N/A 10 AP: PWR JAMES N/A 11 AP: PWR JAMES N/A 12 AP: MISC & ALIASES JAMES N/A POWER: BATTERY CONNECTOR YOSH N/A 34 81 POWER: PMU YOSH N/A 35 82 POWER: PMU YOSH N/A 36 83 POWER: 3.3V VR YOSH N/A 37 90 DEBUG AND MISC MIKE N/A 38 93 FCT/ICT TEST/BRACKETS MIKE N/A 39 100 CONSTRAINTS: ASSIGNMENTS MIKE N/A 40 101 CONSTRAINTS: ASSIGNMENTS MIKE N/A 102 CONSTRAINTS: MLB RULES MIKE N/A 106 CONSTRAINTS: RF RULES MIKE N/A C 41 TABLE_TABLEOFCONTENTS_ITEM 13 AP: VIDEO BUFFER,BB USB MUXES JAMES N/A TABLE_TABLEOFCONTENTS_ITEM 12 75 TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM 11 33 TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM 10 N/A TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM 9 YOSH TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM 8 POWER: ALIASES TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM 7 73 TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM 6 32 TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM 5 DATE TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM 4 SYNC MASTER TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM 3 PDF CSA CONTENTS TABLE_TABLEOFCONTENTS_HEAD TABLE_TABLEOFCONTENTS_ITEM C 4 42 TABLE_TABLEOFCONTENTS_ITEM 14 NAND JONATHANN/A 17 VIDEO: DISPLAY PORT JAMES N/A 20 VIDEO: MLC MIKE N/A 21 VIDEO: MLC ALIASES MIKE N/A 22 VIDEO: LVDS CONNECTOR ALEX N/A 30 GRAPE: GROUNDHOG,CONN,BOOST RAMSIN N/A 31 GRAPE: Z1, Z2 RAMSIN N/A 36 AUDIO: L63 CODEC LENG N/A 37 AUDIO: SPEAKER AMP LENG N/A 38 AUDIO: HEADPHONE OUT LENG N/A 39 AUDIO: BLANK LENG N/A 42 AUDIO: DETECT/MIC BIAS LENG N/A 43 AUDIO: HP/MIC FILTERS LENG N/A 54 CONNECTOR: CANADA FLEX CONN,SENSOR MARKPANEL B. N/A ALIASES 55 CONNECTOR: CANADA FLEX FILTERS 56 CONNECTOR: SENSOR PANEL CONNECTORMARK 57 IO FLEX: DOCK COMPONENTS JAMES N/A 59 IO FELX: B2B Connector JAMES N/A 60 CONNECTOR: X23 WIFI/BT MIKE N/A 61 CONNECTOR: X24 CELLULAR/GPS MIKE N/A TABLE_TABLEOFCONTENTS_ITEM 13 TABLE_TABLEOFCONTENTS_ITEM 14 TABLE_TABLEOFCONTENTS_ITEM 15 TABLE_TABLEOFCONTENTS_ITEM 16 TABLE_TABLEOFCONTENTS_ITEM 17 TABLE_TABLEOFCONTENTS_ITEM 18 TABLE_TABLEOFCONTENTS_ITEM B 19 B TABLE_TABLEOFCONTENTS_ITEM 20 TABLE_TABLEOFCONTENTS_ITEM 21 TABLE_TABLEOFCONTENTS_ITEM 22 TABLE_TABLEOFCONTENTS_ITEM 23 TABLE_TABLEOFCONTENTS_ITEM 24 TABLE_TABLEOFCONTENTS_ITEM 25 TABLE_TABLEOFCONTENTS_ITEM 26 MARK B. N/A TABLE_TABLEOFCONTENTS_ITEM 27 B. N/A TABLE_TABLEOFCONTENTS_ITEM 28 TABLE_TABLEOFCONTENTS_ITEM A 29 A TABLE_TABLEOFCONTENTS_ITEM 30 DRAWING TITLE CHOPIN MLB TABLE_TABLEOFCONTENTS_ITEM 31 DRAWING NUMBER Apple Inc. TABLE_TABLEOFCONTENTS_ITEM R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED DRAWING TITLE=BACH ABBREV=DRAWING 8 7 6 5 4 3 2 051-8962 REVISION A.0.0 BRANCH PAGE 1 OF 106 SHEET 1 1 OF 42 SIZE D 8 7 6 Z2 5 4 H4P SPI1 CSA 31 D GROUNDHOG CSA 30 ISP_I2C1 MIPI1C FF CAMERA ISP_I2C0 MIPI0C REAR CAMERA CANADA FLEX SENSOR PANEL X23 SDIO CSA 31 WIFI/BT UART3 BT_I2S LPDDR2 2X32-BIT MLC MIPI0D USB1.1 UART1 UART2 UART4 GPU CSA 20 C CSA 60 ICE3.0/GPS DUAL-CORE IMG SGX543-MP LVDS SPI2 USB1.1 USART UMTS GPS CELLULAR ANT IPC PMU ALISON CSA 61 AE2 ARM A5 CPU UART5 C GPS ANT AUDIO BACKLIGHT WIFI/BT ANT X24 400MHZ/800MB/S DISPLAY/ TOUCH PANEL 1 D DUAL-CORE ARM CORTEX-A9 W/ SMP 850 MHZ Z1 2 3 USB2.0 UART0 BATTERY 30-PIN DOCK DISPLAYPORT CSA 75 VIDEO DAC DWI I2C0 CSA 81 B AMP B AUDIO CODEC L63 I2C1 PROX SENSOR SENSOR PANEL COMPASS SENSOR PANEL I2C2 FMI0 FMI1 FMI2 FMI3 I2S2 VSP I2S0 ASP I2S3 XSP CSA 57 LINEOUT AMP SPEAKER AMP HSIC0 MIC HP CSA 36 A SYNC_MASTER=MIKE GYRO ACCELEROMETER ALS BLOCK DIAGRAM: SYSTEM NAND FLASH NAND FLASH DRAWING NUMBER SD CARD READER SENSOR PANEL SENSOR PANEL CANADA FLEX NOTICE OF PROPRIETARY PROPERTY: CSA 58 8 7 6 Apple Inc. R CSA 14 5 CSA 14 4 SYNC_DATE=N/A PAGE TITLE 3 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 2 051-8962 REVISION A.0.0 BRANCH PAGE 2 OF 106 SHEET 1 2 OF 42 SIZE D A 8 7 6 5 4 2 3 1 Page Notes BOM OPTIONS Power aliases required by this page: (NONE) Signal aliases required by this page: (NONE) BOM options provided by this page: PROGRAMMABLE PARTS ALL AVAIL BOM OPTIONS D D COMMON ALTERNATE 16GB_PROD 32GB_PROD 64GB_PROD BKLT_PLL DEVELOPMENT_JTAG DEVELOPMENT_JTAG_TAP JTAG_DAP JTAG_TAP_NOT SPEAKER INTERNAL_MIC PORTRAIT_DOCK MLC_DEV MLC_PROD SCH AND BOARD P/N TABLE_5_HEAD PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION TABLE_5_ITEM 051-8962 1 SCH,CHOPIN_AUDIO,MLB,K94 SCH1 820-3069 1 PCBF,CHOPIN_AUDIO,MLB,K94 PCB1 TABLE_5_ITEM K93 K94 BOM GROUP BOM OPTIONS TABLE_BOMGROUP_HEAD BASIC COMMON,ALTERNATE TABLE_BOMGROUP_ITEM PD PARTS TABLE_5_HEAD PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION TABLE_5_ITEM 806-1396 1 FENCE,GRAPE,MLB,K93/K94 FENCE1 806-1397 1 CAN,GRAPE,MLB,K93/K94 CAN1 806-1398 1 FENCE,CPU,MLB,K93/K94 FENCE2 806-1399 1 CAN,CPU,MLB,K93/K94 806-1400 1 FENCE,NAND,MLB,K93/K94 806-1401 1 CAN,NAND,MLB,K93/K94 TABLE_5_ITEM NOSTUFF ADD DEVELOPMENT AND OTHER BOMS ONCE YOU GET BOM NUMBERS TABLE_5_ITEM TABLE_5_ITEM C CAN2 NOSTUFF C TABLE_5_ITEM FENCE3 TABLE_5_ITEM CAN3 NOSTUFF TOP BARCODE LABEL/EEE CODES (ONLY ONE IS USED PER BOM) TABLE_5_HEAD PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION TABLE_5_ITEM 825-7651 1 EEEE FOR 639-1180 (K93 16G) DH36 CRITICAL EEEE_K93_16G 825-7651 1 EEEE FOR 639-1426 (K93 32G) DH37 CRITICAL EEEE_K93_32G 825-7651 1 EEEE FOR 639-1428 (K93 64G) DG99 CRITICAL EEEE_K93_64G 825-7651 1 EEEE FOR 639-1112 (K94 16G) DFC4 CRITICAL EEEE_K94_16G 825-7651 1 EEEE FOR 639-1181 (K94 32G) DFC5 CRITICAL EEEE_K94_32G 825-7651 1 EEEE FOR 639-1182 (K94 64G) DFC6 CRITICAL EEEE_K94_64G 825-7651 1 EEEE FOR 639-1430 (K95 16G) DH3C CRITICAL EEEE_K95_16G 825-7651 1 EEEE FOR 639-1427 (K95 32G) DH3D CRITICAL EEEE_K95_32G TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM B B TABLE_5_ITEM TABLE_5_ITEM 825-7651 1 EEEE FOR 639-1429 (K95 64G) DG9C CRITICAL EEEE_K95_64G CRITICAL BOM OPTION BOTTOM LABEL TYPE 1 TABLE_5_HEAD PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) TABLE_5_ITEM 825-7639 1 631- B/C LABEL LBL1 CRITICAL 825-7639 1 639- B/C LABEL LBL2 CRITICAL TABLE_5_ITEM BOTTOM LABEL TYPE 2 TABLE_5_HEAD PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION TABLE_5_ITEM 825-7640 1 MATRIX LABEL LBL3 CRITICAL 825-7640 1 631- MATRIX LABEL LBL4 CRITICAL TABLE_5_ITEM A SYNC_MASTER=MIKE PAGE TITLE SYNC_DATE=N/A BOM TABLE DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 051-8962 REVISION A.0.0 BRANCH PAGE 5 OF 106 SHEET 1 3 OF 42 SIZE D A 8 7 6 5 4 2 3 1 TABLE_ALT_HEAD PART NUMBER ALTERNATE FOR PART NUMBER BOM OPTION REF DES NEED TO ADD BOM TABLE FOR ALT P/N OF HYNIX (?) COMMENTS: 32 =PP1V1_PLL_H4 R0620 1 TP401 0.00 2 PP1V1_PLL4_F TABLE_5_HEAD VOLTAGE=1.1V 0% 1/32W MF 01005 C AY1 AY2 AY3 AY4 AY20 AY22 AY24 AY30 AY31 AY32 AY33 AY34 B1 B2 B7 B9 B10 B12 VSS B13 B15 B17 B18 B20 B22 B23 B B28 B29 B30 B32 B33 B34 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C23 C27 C29 C32 C33 A D1 D3 D5 D7 D9 D11 D13 D15 D16 D23 8 VSS TP405 1 1 0.01UF 10% 6.3V 2 X5R 01005 1 NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM 1 C0608 0.01UF 10% 2 6.3V X5R 01005 1 56PF C0661 1 C0654 1 0.1UF =PP1V1_MIPI_PLL_H4 2 C0655 32 0201-1 1UF 10% 2 6.3V X5R 201 5% 2 6.3V NP0-C0G 01005 MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM C0660 1 56PF PP1V1_PLL0_F VOLTAGE=1.1V 1 FL0610 80-OHM-0.2A-0.4-OHM PP1V1_MIPID_PLL_F TP406 0.00 2 0% 1/32W MF 01005 MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM R0624 4 32 VOLTAGE=1.1V TP456 VOLTAGE=1.1V 10% 6.3V 2 X5R 01005 =PP1V1_USB_H4 0% 1/32W MF 01005 C0652 PP1V1_PLL1_F C0644 0.00 2 0.01UF NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM 0.00 2 0% 1/32W MF 01005 1 10% 2 6.3V CERM 402 NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM 5% 2 6.3V NP0-C0G 01005 =PP1V1_USB_H4 1 4 32 C0627 0.01UF 32 4 10% 2 6.3V X5R 01005 =PP1V1_USB_H4 1 C C0643 0.22UF 20% 6.3V 2 X5R 0201 32 =PP3V3_USB_H4 =PP1V2_HSIC_H4 1 1 C0642 0.01UF 10% 6.3V 2 X5R 01005 1 C0641 0.01UF 10% 6.3V 2 X5R 01005 JTAGSEL 0 - PARALLEL 1 - DAISY-CHAIN (FOR USE WITH 5-WIRE JTAG) PER RADAR #6755237 32 13 10 7 5 4 =PP1V8_H4 R0645 1 100K 2 TP62 TP58 DEVELOPMENT_JTAG_TAP R0662 JTAG_AP_TCK 4 28 39 32 13 10 7 5 4 R0646 1 100K 2 JTAG_AP_TMS =PP1V8_H4 4 28 39 R0647 100K 2 1 JTAG_AP_TDI 100K 2 1 39 10 OUT 39 10 OUT 39 10 4 IN 39 28 4 OUT 4 10 39 39 28 4 TP60 32 4 7MA 17MA 17MA OUT TP61 10 NC_HSIC2_AP_DATA NC_HSIC2_AP_STB C26 D26 HSIC2_DATA HSIC2_STB N31 M30 N29 M31 M32 N32 N30 JTAG_SEL JTAG_TRTCK JTAG_TRST* JTAG_TDO JTAG_TDI JTAG_TMS JTAG_TCK P29 TESTMODE AP_TESTMODE M28 =PP3V3_USB_H4 1 10K IN RST_AP_L 1% 1/32W MF 2 01005 R0632 1 100K 2 R0688 1 42.2K 1% 1/32W MF 01005 2 1 P32 RESET* NOSTUFF XW0605 AP_DDR1_CKEIN_1V2 SHORT-01005 1 2 AP_DDR1_CKEIN R0689 1 82.5K XTAL_24M_O USB_FS_D_P USB_FS_D_N USB_DP A29 USB_DM A28 USB_D_P USB_D_N USB_ANALOGTEST G26 NC_USB_ANALOGTEST RST_AP_1V8_L TP54 39 1 USB_ID F28 USB_BRICKID G27 CFSB G11 R7 DDR0_CKEIN DDR1_CKEIN Y0602 BI 11 39 BI 11 39 BI 28 39 BI 28 39 USB_REXT A21 22 2 1 2 4 C0613 TP410 22PF 100K 2 5% 1/32W MF 01005 DZ0600 PPVBUS_USB 34 TP68 1 R0642 44.2 USB_BRICKID OUT 1% 1/20W MF 2 201 35 SYNC_MASTER=JAMES PAGE TITLE SYNC_DATE=N/A AP: MAIN DRAWING NUMBER TP420 TP423 TP426 TP431 Apple Inc. TP438 R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 6 5% 16V CERM 01005 2 R0651 1 1% 1/32W MF 01005 2 7 C0607 1 22PF GDZT2R5.1B NOTE: PAGE 4608 H4P UM V0.83 3 5% 16V 2 CERM 01005 2 TP64 24M_O 1 GDZ-0201 USB_REXT 1 39 USB_AP_VBUS NC_USB_ID B SM-2 24.000MHZ-16PF-60PPM 5% 1/32W MF 01005 USB_VBUS F27 W30 CRITICAL R0640 (FOR IC TESTER) (0=NORMAL) R0655 1% MF 010051/32W FUSE1_FSRC HOLD_RESET 35 XTAL_24M_I USB11_DP A22 USB11_DM A23 P31 1000PF 39 OUT 1.00M XO0 A19 AP_HOLD_RESET 10% 16V 2 X7R 201 RST_PMU_IN BGA 10 C0618 TP59 U0652 FAST_SCAN_CLK AP_CFSB 0.01UF 10% 6.3V 2 X5R 01005 H4P-512MB 10 4 32 C0630 SYM 1 OF 12 T32 XW0604 1 WDOG P30 XI0 A18 AP_FAST_SCAN_CLK SHORT-01005 1 2 10% 6.3V 2 CERM 402 28MA 6.5MA TST_STPCLK TST_CLKOUT NOSTUFF 1% 1/32W MF 01005 HSIC1_DATA HSIC1_STB P33 P34 R0617 5MA 2.5MA AP_TST_STPCLK TP_AP_TST_CLKOUT 10 35 31 28 A26 A27 10 AP_JTAG_SEL NC_JTAG_AP_RTCK JTAG_AP_TRST_L JTAG_AP_TDO JTAG_AP_TDI JTAG_AP_TMS JTAG_AP_TCK 1UF 2.5MA EACH TP_HSIC1_AP_DATA TP_HSIC1_AP_STB C0640 2 AW34 R0623 MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM 1 AW23 AW33 10% 2 6.3V X5R 01005 R0625 PP1V1_PLL_USB_F VOLTAGE=1.1V H27 H28 AW4 0.01UF USB_VDD330 AW1 AW2 PP1V1_PLL2_F C0646 USB_VSSA0 USB_VSSAC AV33 AV34 1 C28 AV29 MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM TP409 USB_DVDD AV16 AV17 VOLTAGE=1.1V USB_DVSS AV15 TP407 0.00 2 0% 1/32W MF 01005 1 D MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM H26 J26 AV13 AV14 BOM OPTION VOLTAGE=1.1V D28 AV12 10% 2 6.3V X5R 01005 C19 C20 C21 C18 C17 C22 AR10 AT14 AV10 AV11 CRITICAL PP1V1_PLL3_F 0.01UF R0622 1 C0648 PLL0_AVDD11 PLL1_AVDD11 PLL2_AVDD11 PLL3_AVDD11 PLL4_AVDD11 PLL_USB_AVDD11 MIPI0D_VDD11_PLL MIPI1D_VDD11_PLL AV8 AV9 1 PLL0_AVSS11 PLL1_AVSS11 PLL2_AVSS11 PLL3_AVSS11 PLL4_AVSS11 PLL_USB_AVSS11 MIPI_VSS_0 MIPI_VSS_1 AV7 0% 1/32W MF 01005 HSIC_DVSS AV5 AV6 REFERENCE DESIGNATOR(S) TP403 D19 D20 D21 D18 D17 D22 AN10 AN11 AV4 DESCRIPTION 0.00 2 E24 SC58940X01-A030 AV2 AV3 1 QTY NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM D25 HSIC_VDD121 D24 HSIC_VDD122 F24 HSIC_DVDD BGA SYM 11 OF 12 AV1 0.01UF 10% 6.3V 2 X5R 01005 R0621 D27 D32 E1 E2 E3 E4 E6 E8 E10 E12 E14 E16 E17 E18 E19 E20 E21 E22 E23 E25 E26 E27 E28 E30 E31 E32 E34 F1 F2 F3 F5 F19 F20 F21 F22 F23 F25 F26 F29 F30 F31 F32 G1 G3 G4 G7 G8 G9 G10 G12 G13 G14 G15 G16 G17 G18 G19 G20 G21 G22 G25 G28 G29 G30 H1 H2 H3 H5 H7 H8 H10 H12 H14 H16 H18 H20 H22 H24 H25 H29 H30 J1 J2 J3 J4 J7 J9 J11 J13 J15 J17 J19 PART# MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM HSIC_VSS121 HSIC_VSS122 D H4P-512MB AU16 AU17 C0651 C25 C24 U0652 AU14 AU15 1 5 4 3 2 051-8962 REVISION A.0.0 BRANCH PAGE 6 OF 106 SHEET 1 4 OF 42 SIZE D A 8 7 6 32 27 26 32 28 5 1 R0700 4.7K 39 35 19 10 5 39 25 5 D 39 25 5 39 26 25 5 39 26 25 5 5% 1/32W MF 2 01005 I2C0_SDA_1V8 I2C0_SCL_1V8 1 R0701 4.7K 5% 1/32W MF 2 01005 1 R0702 4.7K 5% 1/32W MF 2 01005 1 1 R0703 4.7K R0704 1.8K 5% 1/32W MF 2 01005 5% 1/32W MF 2 01005 1 =PP1V8_S2R_MISC 1 1.8K 35 29 5 5% 1/32W MF 2 01005 HOME_L 35 29 5 IN 35 25 5 IN 32 =PP1V8_ALWAYS TP27 35 25 5 TP47 NC_AP_GPIO3 220K 2 1 NC_AP_GPIO4 5% 1/20W MF 201 NC_AP_GPIO6 ONOFF_L TP565 NC_AP_GPIO5 30 32 28 5 =PP1V8_S2R_MISC 35 25 5 1 SRL_L OUT PM_BT_WAKE NC_AP_GPIO8 TP571 R0765 TP554 HOME_L ONOFF_L NC_AP_GPIO2 R0770 TP67 I2C2_SDA_3V0 I2C2_SCL_3V0 2 3 220K 2 5% 1/20W MF 201 R0705 TP69 I2C1_SDA_1V8 I2C1_SCL_1V8 4 1 R0771 =PP3V0_OPTICAL =PP1V8_H4 32 13 10 7 4 39 35 19 10 5 5 31 5 220K 2 OUT PM_RADIO_ON NC_AP_GPIO10 5% 1/20W MF 201 TP619 31 IN 31 IN 35 IN 19 IN RST_DET_L SPI_IPC_SRDY IRQ_PMU_L NC_AP_GPIO14 (SCREEN ROTATION LOCK) TP46 IRQ_CODEC_L NC_BOARD_ID_3 25 5 10 35 5 OUT IRQ_GYRO_INT2 IN BOOT_CONFIG_0 OUT PM_KEEPACT NC_AP_GPIO20 18 OUT IRQ_GRAPE_HOST_INT_L 31 OUT 31 IN 10 IN 37 5 IN NC_AP_GPIO22 TP616 TP599 5 TP618 TP566 TP572 C TP573 TP453 OUT 10 IN 10 IN 31 OUT 31 OUT 25 OUT 25 IN 31 IN 25 IN 26 IN 25 IN 20 OUT 11 OUT GPS_SYNC GSM_TXBURST_IND BOOT_CONFIG_1 FORCE_DFU DFU_STATUS BOOT_CONFIG_2 BOOT_CONFIG_3 RST_GPS_L PM_GPS_STANDBY_L IRQ_PROX_INT_L IRQ_GYRO_INT1 IRQ_GPS_INT_L TP_IRQ_COMPASS_INT_L IRQ_ACCEL_INT1_L IRQ_ALS_INT_L IRQ_ACCEL_INT2_L AUD_SPKRAMP_MUTE_L PORT_DOCK_VIDEO_AMP_EN GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21 GPIO22 GPIO23 GPIO24 GPIO25 GPIO26 GPIO27 GPIO28 GPIO29 GPIO30 GPIO31 GPIO32 GPIO33 GPIO34 GPIO35 GPIO36 GPIO37 GPIO38 GPIO39 U30 V30 GPIO_3V0 GPIO_3V1 U0652 H4P-512MB BGA SC58940X01-A030 SYM 2 OF 12 EHCI_PORT_PWR0 AL7 EHCI_PORT_PWR1 AL6 EHCI_PORT_PWR2 AM6 AP_GPIO40_BRD_REV0 AP_GPIO41_BRD_REV1 AP_GPIO42_BRD_REV2 TMR32_PWM0 AC30 TMR32_PWM1 AA27 TMR32_PWM2 AB30 3.0V 1.8V GROUP 1 1.8V/3.0V GROUP 0 10 IN 10 IN 10 D NC_AP_GPIO185 NC_AP_GPIO186 NC_AP_GPIO187 UART0_RXD R31 UART0_TXD R30 UART_0_RXD UART_0_TXD UART1_CTSN UART1_RTSN UART1_RXD UART1_TXD AN4 AM5 AM3 AM1 UART_1_CTS_L UART_1_RTS_L UART_1_RXD UART_1_TXD UART2_CTSN UART2_RTSN UART2_RXD UART2_TXD AP4 AM2 AM4 AN5 UART3_CTSN UART3_RTSN UART3_RXD UART3_TXD AP1 AR2 AR4 AP2 UART_3_CTS_L UART_3_RTS_L UART_3_RXD UART_3_TXD UART4_CTSN UART4_RTSN UART4_RXD UART4_TXD AU1 AT3 AT4 AT1 UART_4_CTS_L UART_4_RTS_L UART_4_RXD UART_4_TXD IN 10 OUT 10 SRL_L RST_BB_L UART_2_RXD UART_2_TXD UART5_RTXD AR3 UART6_CTSN UART6_RTSN UART6_RXD UART6_TXD IN IN 10 OUT 10 IN 10 OUT 10 IN 10 OUT 10 AUD_VOL_DOWN_L IPC_GPIO AUD_VOL_UP_L TP_PROX_GPIO TO BB USART 5 25 35 IN OUT 31 IN 10 OUT 10 IN 10 OUT 10 IN 10 OUT 10 IN 10 OUT 10 BATTERY_SWI OUT AU2 AN3 AU3 AP3 TO DOCK MUX TP577 TO BB UMTS TO BT UART TO GPS UART C 33 35 IN 25 IN 31 IN 25 TP574 TP620 TP575 VSS A1 A2 A3 A6 A7 A8 A9 A10 A11 A12 NC_GPIO_218 AA3 AA4 AA5 AA6 AA7 AB3 AB4 AB5 AC7 AC4 AD7 AC3 AD6 AD5 AD4 AD3 AE7 AD1 AE1 AE4 AE3 AE2 AF4 AF3 AF7 AF2 AG7 AG6 AG5 AG4 AG3 AG1 AH1 AH2 AH7 AH3 AH4 AJ5 AJ4 AJ3 PM_KEEPACT IRQ_GYRO_INT2 FORCE_DFU DFU_STATUS PM_RADIO_ON TP42 R0720 TP567 33.2 1% 1/32W MF 01005 39 19 CODEC ASP OUT TP40 2 I2S_AP_0_MCK Y32 I2S_AP_0_MCK_R 1 AB33 39 19 OUT I2S_AP_0_BCLK Y31 39 19 OUT I2S_AP_0_LRCK AC34 I2S_AP_0_DIN 39 19 IN AA32 I2S_AP_0_DOUT 39 19 OUT B CODEC VSP & BT 30 19 39 30 19 39 39 19 39 19 CODEC XSP 39 19 39 19 IN 10 IN 10 IN TO GRAPE A TO BB I2C1_SCL_1V8 I2C1_SDA_1V8 OUT I2C2_SCL AF30 I2C2_SDA AF29 I2C2_SCL_3V0 I2C2_SDA_3V0 OUT NC_I2S_AP_2_MCK OUT I2S_AP_2_BCLK OUT I2S_AP_2_LRCK I2S_AP_2_DIN IN OUT I2S_AP_2_DOUT V33 V32 U34 U32 V31 I2S2_MCK I2S2_BCLK I2S2_LRCK I2S2_DIN I2S2_DOUT NC_I2S_AP_3_MCK I2S_AP_3_BCLK I2S_AP_3_LRCK OUT I2S_AP_3_DIN IN OUT I2S_AP_3_DOUT T31 W32 U31 T30 W29 I2S3_MCK I2S3_BCLK I2S3_LRCK I2S3_DIN I2S3_DOUT W31 SPDIF OUT NC_AP_GPIO216 10 I2C1_SCL AD31 I2C1_SDA AE30 I2S1_MCK I2S1_BCLK I2S1_LRCK I2S1_DIN I2S1_DOUT BB (NOT USED) 30 19 39 I2C0_SCL_1V8 I2C0_SDA_1V8 AC33 AD32 Y34 W34 AC32 NC_I2S_AP_1_MCK NC_I2S_AP_1_BCLK NC_I2S_AP_1_LRCK NC_I2S_AP_1_DIN NC_I2S_AP_1_DOUT 30 19 39 I2S0_MCK U0652 I2S0_BCLK H4P-512MB I2S0_LRCK BGA I2S0_DIN SC58940X01-A030 I2C0_SCL AD26 SYM 3 OF 12 I2S0_DOUT I2C0_SDA AD29 BOARD_ID_2_SPI_FLASH_DOUT BOARD_ID_1_SPI_FLASH_DIN BOARD_ID_0_SPI_FLASH_CLK NC_SPI_FLASH_CS_L AE29 AG34 AE31 AE32 SPI_GRAPE_MISO SPI_GRAPE_MOSI SPI_GRAPE_SCLK SPI_GRAPE_CS_L AH32 AF28 AG32 AF31 SPI1_MISO SPI1_MOSI SPI1_SCLK SPI1_SSIN SPI_IPC_MISO SPI_IPC_MOSI SPI_IPC_SCLK SPI_IPC_MRDY AF34 AG33 AE27 AE28 SPI2_MISO SPI2_MOSI SPI2_SCLK SPI2_SSIN 40 17 IN 40 17 OUT 40 17 OUT 40 17 OUT 40 31 IN 40 31 OUT 40 31 IN 40 31 OUT GROUP 7 1 SWI_DATA AA30 SDIO0_CLK SDIO0_CMD SDIO0_DATA0 SDIO0_DATA1 SDIO0_DATA2 SDIO0_DATA3 1.8V/3.0V GROUP 5 DWI_AP_CLK DWI_AP_DI DWI_AP_DO AB27 AC26 AB31 AD30 AB26 AB32 GROUP 6 OUT BI BI R0735 100K 5 10 19 35 39 5% 1/20W MF 2 201 5 10 19 35 39 5 25 39 100K 5% 1/32W MF 2 01005 1 R0737 100K 5% 1/20W MF 2 201 1 R0738 100K 5% 1/20W MF 2 201 1 5 5 31 R0739 100K 5% 1/20W MF 2 201 B 5 25 26 39 5 25 26 39 OUT 35 39 IN 35 39 OUT 35 39 SDIO_WL_CLK OUT SDIO_WL_CMD OUT SDIO_WL_DATA<0> BI SDIO_WL_DATA<1> BI SDIO_WL_DATA<2> BI SDIO_WL_DATA<3> BI 30 40 30 40 30 40 TO WIFI 30 40 30 40 30 40 TP333 SPI3_MISO SPI3_MOSI SPI3_SCLK SPI3_SSIN AH31 AH29 AH30 AG30 SYNC_MASTER=JAMES PAGE TITLE NC_SPI_AP_3_MISO NC_SPI_AP_3_MOSI NC_SPI_AP_3_SCLK NC_SPI_AP_3_CS_L SYNC_DATE=N/A AP: I/Os DRAWING NUMBER Apple Inc. R A13 A14 A15 A16 A17 A20 A30 A33 A34 AA9 NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED TP334 7 R0736 5 37 5 25 39 VSS 8 1 5 25 NC_SWI_AP DWI_CLK AB34 DUAL-WIRE INTF DWI_DI AA31 FOR PMU DWI_DO Y27 SPI0_MISO SPI0_MOSI SPI0_SCLK SPI0_SSIN BI 5 35 6 5 4 3 2 051-8962 REVISION A.0.0 BRANCH PAGE 7 OF 106 SHEET 1 5 OF 42 SIZE D A 8 7 6 5 4 10 9 6 D C J21 J23 J25 J27 J28 J29 J30 K1 K3 U0652 BGA 39 12 6 R17 R19 39 12 6 39 12 6 39 12 6 R21 K5 K7 R23 R25 39 12 6 39 12 6 39 12 6 F1CE0_L F1CE1_L F1CE2_L F1CE3_L F0CE0_L F0CE1_L F0CE2_L F0CE3_L 5% 1/32W MF 01005 5% 5% 1/32W 1/32W MF MF 2 01005 2 01005 1 1 1 5% 1/32W 2 MF 01005 5% 1/32W MF 2 01005 5% 1/32W MF 2 01005 R0831 100K R0834 R0825 100K 100K 1 R0827 10 9 6 5% 1/32W MF 2 01005 1 R27 R29 R34 39 12 6 K14 T1 39 12 6 K16 K18 T2 T3 K20 K22 T5 T7 K24 T8 K26 K30 T10 T12 K31 T14 39 12 6 K32 L1 T16 T18 39 12 6 L2 T20 39 12 6 L3 L4 T22 T24 39 12 6 L7 L9 T26 T29 39 12 6 L11 T33 L13 L15 U1 U3 L17 U4 L19 L21 U7 U9 L23 U11 L25 L28 U13 U15 L29 L30 U17 U19 L31 U21 L32 L33 U23 U25 39 12 6 39 12 6 10 9 6 =PPIO_NAND_H4 R0860 R0861 R0862 1 1 100K 1100K 100K 5% 5% 39 12 6 39 12 6 39 12 6 R0800 100K 5% 1/32W MF 2 01005 K8 39 12 6 =PPIO_NAND_H4 100K K10 K12 M3 M5 2 F1CE4_L F1CE5_L F1CE6_L F1CE7_L F0CE4_L F0CE5_L F0CE6_L F0CE7_L 1/32W MF 01005 2 5% 1/32W MF 01005 2 1/32W MF 01005 1 R0863 100K 5% 1/32W MF 2 01005 R0864 1 100K 2 5% 1/32W MF 01005 R0865 R0866 1 100K 2 5% 1/32W MF 01005 1 100K 2 5% 1/32W MF 01005 39 12 6 1 39 12 6 R0867 39 12 6 100K 39 12 6 5% 1/32W MF 2 01005 1 R0801 100K 5% 1/32W MF 2 01005 1 1 R0802 R0803 100K 100K 5% 1/32W MF 2 01005 5% 1/32W MF 2 01005 D F0WE_L F0RE_L F1WE_L F1RE_L F0ALE F0CLE F1ALE F1CLE 1 R0810 100K 5% 1/32W MF 2 01005 1 R0811 1 R0812 100K 100K 5% 1/32W MF 2 01005 5% 1/32W MF 2 01005 1 R0813 100K 5% 1/32W MF 2 01005 C U27 VSS VSS U0652 U28 V1 H4P-512MB M7 V2 M8 M10 V3 V5 39 12 6 OUT 39 12 6 OUT M12 M14 V7 V8 39 12 6 OUT 39 12 6 OUT M16 V10 39 12 6 OUT M18 M20 V12 V14 39 12 6 OUT 39 12 6 OUT M22 V16 39 12 6 OUT M24 M26 V18 V20 M29 V22 M33 N1 V24 V26 N2 N3 V28 V34 N4 W1 N7 N9 W2 W3 N11 39 12 BI 39 12 BI 39 12 BI 39 12 BI 39 12 BI 39 12 BI 39 12 BI 39 12 BI 39 12 6 OUT W4 39 12 6 OUT N13 N15 W7 W9 39 12 6 OUT 39 12 6 OUT N17 W11 N19 N21 W13 W15 39 12 6 OUT 39 12 6 N23 N25 W17 W19 OUT 39 12 6 OUT 39 12 6 N27 W21 OUT 39 12 6 N28 P1 W23 W25 OUT 39 12 6 OUT 39 12 6 P2 W27 OUT P3 P5 Y3 Y5 39 12 BI P7 Y7 39 12 BI P8 P10 Y8 Y10 39 12 BI 39 12 BI P12 P14 Y12 Y14 39 12 BI 39 12 BI P16 Y16 39 12 BI P18 P20 Y18 Y20 39 12 BI P22 Y22 P24 P26 Y24 Y29 R1 Y30 39 12 6 OUT 39 12 6 OUT 39 12 6 OUT 39 12 6 OUT 39 12 6 OUT F0CE0_L F0CE1_L F0CE2_L F0CE3_L F0CE4_L F0CE5_L F0CE6_L F0CE7_L AV20 AW21 AU19 AU20 AV31 AT31 AV32 AU30 FMI0_CEN0 FMI0_CEN1 FMI0_CEN2 FMI0_CEN3 FMI0_CEN4 FMI0_CEN5 FMI0_CEN6 FMI0_CEN7 F0AD<0> F0AD<1> F0AD<2> F0AD<3> F0AD<4> F0AD<5> F0AD<6> F0AD<7> AV18 AU18 AT22 AW19 AV21 AU22 AY21 AR20 FMI0_IO0 FMI0_IO1 FMI0_IO2 FMI0_IO3 FMI0_IO4 FMI0_IO5 FMI0_IO6 FMI0_IO7 F0ALE F0CLE F0WE_L F0RE_L AT20 AU21 AT19 AV22 AT21 FMI0_ALE FMI0_CLE FMI0_WEN FMI0_REN FMI0_DQS AN22 AY19 AP20 AT18 AN30 AU34 AU33 AP30 FMI1_CEN0 FMI1_CEN1 FMI1_CEN2 FMI1_CEN3 FMI1_CEN4 FMI1_CEN5 FMI1_CEN6 FMI1_CEN7 F1AD<0> F1AD<1> F1AD<2> F1AD<3> F1AD<4> F1AD<5> F1AD<6> F1AD<7> AV25 AU23 AW25 AU25 AU24 AV24 AT23 AV23 FMI1_IO0 FMI1_IO1 FMI1_IO2 FMI1_IO3 FMI1_IO4 FMI1_IO5 FMI1_IO6 FMI1_IO7 F1ALE F1CLE F1WE_L F1RE_L AP23 AV19 AN23 AN21 AY25 FMI1_ALE FMI1_CLE FMI1_WEN FMI1_REN FMI1_DQS NC_AP_GPIO76 F1CE0_L F1CE1_L F1CE2_L F1CE3_L F1CE4_L F1CE5_L F1CE6_L F1CE7_L NC_AP_GPIO93 GROUP 2 BGA GROUP 2 SYM 4 OF 12 GROUP 3 3.3V GROUP 2 GROUP 5 GROUP 2 GROUP 2 GROUP 3 3.3V GROUP 4 GROUP 5 GROUP 4 GROUP 2 FMI2_CEN0 FMI2_CEN1 FMI2_CEN2 FMI2_CEN3 FMI2_CEN4 FMI2_CEN5 FMI2_CEN6 FMI2_CEN7 AY26 AU26 AW26 AV26 AP34 AL32 AK31 AM32 NC_F2CE0_L NC_F2CE1_L NC_F2CE2_L NC_F2CE3_L FMI2_IO0 FMI2_IO1 FMI2_IO2 FMI2_IO3 FMI2_IO4 FMI2_IO5 FMI2_IO6 FMI2_IO7 AY29 AR30 AU29 AV28 AY28 AW30 AW28 AU28 NC_F2AD<0> NC_F2AD<1> NC_F2AD<2> NC_F2AD<3> NC_F2AD<4> NC_F2AD<5> NC_F2AD<6> NC_F2AD<7> FMI2_ALE FMI2_CLE FMI2_WEN FMI2_REN FMI2_DQS AW27 AU27 AV27 AY27 AV30 NC_F2ALE NC_F2CLE NC_F2WE_L NC_F2RE_L FMI3_CEN0 FMI3_CEN1 FMI3_CEN2 FMI3_CEN3 FMI3_CEN4 FMI3_CEN5 FMI3_CEN6 FMI3_CEN7 AT30 AP31 AU31 AU32 AN34 AM33 AM34 AN33 FMI3_IO0 FMI3_IO1 FMI3_IO2 FMI3_IO3 FMI3_IO4 FMI3_IO5 FMI3_IO6 FMI3_IO7 AP33 AL31 AR34 AN32 AM31 AN31 AR32 AP32 NC_F3AD<0> NC_F3AD<1> NC_F3AD<2> NC_F3AD<3> NC_F3AD<4> NC_F3AD<5> NC_F3AD<6> NC_F3AD<7> FMI3_ALE FMI3_CLE FMI3_WEN FMI3_REN FMI3_DQS AT32 AT34 AT33 AR31 AR33 NC_F3ALE NC_F3CLE NC_F3WE_L NC_F3RE_L TP70 RST_MLC_L TP_GPIO_SD_CTRL RST_GRAPE_L OUT GRAPE_FW_DNLD_EN_L OUT 17 17 OUT 14 1 R0878 100K 5% 1/32W MF 2 01005 B NC_AP_GPIO_110 NC_F3CE0_L NC_F3CE1_L NC_F3CE2_L NC_F3CE3_L NC_AP_GPIO_147 TP_RST_SD_CTRL_L PM_MLC_PWR_EN OUT 36 TP_CD_SD_CTRL_L SYNC_MASTER=JAMES PAGE TITLE DRAWING NUMBER Apple Inc. VSS 8 7 6 5 SYNC_DATE=N/A AP: NAND NC_AP_GPIO_135 R NOTICE OF PROPRIETARY PROPERTY: AA11 AA13 AA15 AA17 AA19 AA21 AA23 AA25 AA29 AB1 AB6 AB8 A R13 R15 R0832 1 R0836 1 R0833 1 R0828 100K 100K 100K 100K 5% 1/32W MF 2 01005 2 R11 SYM 12 OF 12 M1 B 1 R4 R9 SC58940X01-A030 1 =PPIO_NAND_H4 R3 H4P-512MB 2 3 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 4 3 2 051-8962 REVISION A.0.0 BRANCH PAGE 8 OF 106 SHEET 1 6 OF 42 SIZE D A 8 7 6 5 4 2 3 1 MIN_NECK_MIDTH SHOULD BE 0.2MM 32 9 VOLTAGE=1.8V MIN_LINE_WIDTH=0.4MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM =PP3V0_IO_H4 1 C0954 0.01UF 10 D 1 0.22UF C0926 1 0.22UF 20% 2 6.3V X5R 402 C0925 0.22UF 20% 6.3V 2 X5R 402 56PF 5% 2 6.3V NP0-C0G 01005 =PP1V8_DPORT_H4 2 5% 1/20W MF 201 C0924 1 1 32 C0923 D 56PF 5% 2 6.3V NP0-C0G 01005 =PP3V0_VIDEO_H4 1 PP_DP_PAD_AVDD0 C0952 0.01UF 32 13 10 5 4 PP_DP_PAD_AVDD1 0.1UF 10% 6.3V 2 X5R 201 J33 J34 DAC_AP_IREF DAC_AP_COMP K34 U0652 DAC_IREF H4P-512MB DAC_COMP BGA 6.34K DP_PAD_DVDD J31 39 26 7 DAC_OUT3 L34 DAC_OUT2 M34 DAC_OUT1 N34 DAC_AP_OUT3 OUT DAC_AP_OUT2 OUT DAC_AP_OUT1 OUT DP_AP_HPD IN 11 40 11 40 YIN DP_PAD_TX1P A32 DP_PAD_TX1N A31 DP_AP_TX_P<1> OUT DP_AP_TX_N<1> OUT 11 40 CIN CVBSIN 13 BI 13 40 BI 13 40 32 B TP443 5% 1/32W MF 2 01005 1 R0932 1.00K 5% 1/32W MF 2 01005 1 R0933 1.00K 5% 1/32W MF 2 01005 TP543 TP546 TP606 TP590 C0930 1UF 10% 6.3V 2 CERM 402 1% 1/20W MF 2 201 200 1% 1/20W MF 2 201 C0908 0.1UF 10% 6.3V 2 X5R 201 1 C0903 0.1UF 10% 6.3V 2 X5R 201 MIPI_VDD11 10 13 40 28MA 10 13 40 10 13 40 10 13 40 200 1% 1/20W MF 2 201 NOTE: PLACE R0955-57 NEAR U0652 40 27 IN 40 27 IN NC_AP_GPIO184 AA26 MIPI_VSYNC MIPI0C_AP_DATA_P<0> MIPI0C_AP_DATA_N<0> AW10 AY10 MIPI0C_DPDATA0 MIPI0C_DNDATA0 NC_MIPI0C_AP_DATA_P<1> NC_MIPI0C_AP_DATA_N<1> NC_MIPI0C_AP_DATA_P<2> NC_MIPI0C_AP_DATA_N<2> TP447 NC_MIPI0C_AP_DATA_P<3> NC_MIPI0C_AP_DATA_N<3> 40 27 OUT 40 27 OUT 40 14 OUT 40 14 OUT 40 14 OUT 40 14 OUT 40 14 OUT 40 14 OUT OUT 40 14 OUT 40 14 OUT 40 14 OUT MIPI0C_AP_CLK_P MIPI0C_AP_CLK_N AW11 AY11 MIPI0C_DPDATA1 MIPI0C_DNDATA1 AW13 AY13 MIPI0C_DPDATA2 MIPI0C_DNDATA2 AW14 AY14 MIPI0C_DPDATA3 MIPI0C_DNDATA3 AW12 AY12 SYM 5 OF 12 SC58940X01-A030 GROUP 5 U0652 MIPI0C_DPCLK MIPI0C_DNCLK H4P-512MB BGA 1 C0920 2.2NF TP450 10% 10V 2 X5R 201 ISP0_FLASH ISP0_PRE_FLASH ISP0_SCL ISP0_SDA AG31 AG29 AE26 AC29 NC_AP_GPIO153 ISP1_FLASH ISP1_PRE_FLASH ISP1_SCL ISP1_SDA AJ32 AG28 AC31 AF27 NC_AP_GPIO155 SENSOR0_CLK AA33 SENSOR0_RST Y26 SENSOR1_CLK AA34 SENSOR1_RST Y33 MIPID_AP_DATA_P<0> MIPID_AP_DATA_N<0> AW5 AY5 MIPI0D_DPDATA0 MIPI0D_DNDATA0 MIPI1C_DPDATA0 AW15 MIPI1C_DNDATA0 AY15 MIPID_AP_DATA_P<1> MIPID_AP_DATA_N<1> AW6 AY6 MIPI0D_DPDATA1 MIPI0D_DNDATA1 MIPI1C_DPDATA1 AW17 MIPI1C_DNDATA1 AY17 MIPID_AP_DATA_P<2> MIPID_AP_DATA_N<2> AW8 AY8 MIPI0D_DPDATA2 MIPI0D_DNDATA2 MIPI1C_DPCLK AW16 MIPI1C_DNCLK AY16 MIPID_AP_DATA_P<3> MIPID_AP_DATA_N<3> AW9 AY9 MIPI0D_DPDATA3 MIPI0D_DNDATA3 MIPID_AP_CLK_P MIPID_AP_CLK_N AW7 AY7 MIPI0D_DPCLK MIPI0D_DNCLK NC_AP_GPIO152 ISP_AP_0_SCL OUT ISP_AP_0_SDA BI 7 25 39 REAR CAMERA 7 25 39 NC_AP_GPIO154 ISP_AP_1_SCL OUT ISP_AP_1_SDA BI CLK_CAM_RF_R 22 7 26 39 FRONT CAMERA 7 26 39 1 R0900 2 CLK_CAM_RF PM_REAR_CAM_SHUTDOWN CLK_CAM_FF_R 22 1 R0940 2 OUT 27 39 OUT 25 OUT 26 39 PM_FRONT_CAM_SHUTDOWN OUT 26 MIPI1C_AP_DATA_P<0> IN MIPI1C_AP_DATA_N<0> IN B TP446 CLK_CAM_FF 26 40 26 40 NC_MIPI1C_AP_DATA_P<1> FRONT CAMERA NC_MIPI1C_AP_DATA_N<1> MIPI1C_AP_CLK_P MIPI1C_AP_CLK_N OUT 26 40 OUT 26 40 MIPI_VSS AN12 AP12 AR14 AR16 AR17 AR18 40 14 C 10% 2 10V X5R 201 PP_AP_MIPI1D_0P4V 1 R0955 1 R0956 1 R0957 200 C0902 2.2NF =PP1V1_MIPI_H4 REAR CAMERA TP436 1 VOLTAGE=0.4V MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM 2MA ??? 1 DP_PAD_DVSS 1% 1/32W MF 2 01005 DP_PAD_AVSSP0 4.99K DP_AP_AUX_P DP_AP_AUX_N C0907 10% 2 6.3V X5R 201 J32 R0920 M27 DAC_AVSS30A K27 DAC_AVSS30A X5R 2 01005 DP_AP_TX_P<0> OUT DP_AP_TX_N<0> OUT DP_PAD_AVSS_AUX 0.01UF 10% NOSTUFF 6.3V 1 DP_PAD_TX0P D34 DP_PAD_TX0N C34 DAC_AVSS30D C0950 1 DP_PAD_R_BIAS DP_PAD_AVSSX 0.6V ANALOG REF AP_DP_R_BIAS H34 DP_PAD_AUXP G34 DP_PAD_AUXN F34 K28 NOTE: DP_PAD_DC_TP H32 H33 4.7K PP_AP_MIPI0D_0P4V =PP1V8_MIPI_H4 0.1UF 1 TP_DP_AP_ANALOG_TEST R0931 VOLTAGE=0.4V MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM 1.2MA DP_HPD R32 C31 10% 6.3V X5R 2 201 1% 1/20W MF 201 2 SC58940X01-A030 DP_PAD_AVSS0 DP_PAD_AVSS1 R0950 1 DAC_VREF 1 ISP_AP_1_SCL ISP_AP_1_SDA 39 26 7 10% 6.3V 2 X5R 201 1 SYM 6 OF 12 D29 C30 1 0.1UF 5MA 39 25 7 0.1UF 5% 1/32W MF 2 01005 ISP_AP_0_SCL ISP_AP_0_SDA 39 25 7 32 C0909 32 DAC_AP_VREF C0956 2MA 1 <= 5MA G31 C 63MA 63MA DP_PAD_AVDDX G32 6MA 21MA C0955 DP_PAD_AVDDP0 D31 1 DP_PAD_AVDD0 E29 DP_PAD_AVDD1 D30 DAC_AP_COMP_FTR DP_PAD_AVDD_AUX H31 2 0201 DAC_AVDD30D K29 1 TP428 DAC_AVDD30A L27 FL0910 240-OHM-0.2A-0.8-OHM R0930 4.7K 10 =PP1V1_DPORT_H4 VOLTAGE=1.8V MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM =PP3V0_VIDEO_H4 =PP1V8_H4 10 1 10% 2 6.3V X5R 01005 MIPI1D_VREG_0P4V AR15 10% 2 6.3V CERM 402 MIPI0D_VREG_0P4V AR11 1UF MIPI0D_VDD18 AN13 MIPI1D_VDD18 AN15 C0951 AP10 AP11 AP13 AP14 AP15 AP16 AP17 AP18 AR12 1 32 7 0 1 C0927 1 20% 2 6.3V X5R 402 32 7 R0910 TP435 PP_AP_DP_AVDD_AUX 10% 6.3V 2 X5R 01005 A SYNC_MASTER=JAMES PAGE TITLE SYNC_DATE=N/A AP: TV,DP,MIPI DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 051-8962 REVISION A.0.0 BRANCH PAGE 9 OF 106 SHEET 1 7 OF 42 SIZE D A 8 7 =PP1V2_S2R_H4 1 8 32 32 8 6 1 1% 1/32W MF 2 01005 PPVREF_DDR0_CA 1 R1006 1 2.21K NOSTUFF C1002 0.01UF 1% 1/32W MF 2 01005 TP57 10% 6.3V 2 X5R 01005 VOLTAGE=0.6V 1 MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.3MM 32 8 1% 1/32W MF 2 01005 NOSTUFF 8 39 C1032 VOLTAGE=0.6V C1052 0.01UF 10% 6.3V 2 X5R 01005 C1054 0.01UF 10% 6.3V 2 X5R 01005 C1000 0.22UF 1 MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.3MM R1056 1 1.00K NET_SPACING_TYPE=VREF MAX_NECK_LENGTH=3 MM NOSTUFF C1056 10% 6.3V 2 X5R 01005 NET_SPACING_TYPE=VREF MAX_NECK_LENGTH=3 MM 1 (DDR IMPEDANCE CONTROL) 240 1 240 H11 R8 39 8 39 8 39 8 C1005 1 1 32 C1009 4.3UF 1 C1010 1UF 20% 4V X5R-CERM 2 0610 1 C1011 1UF 1 10% 6.3V CERM 2 402 10% 6.3V CERM 2 402 C1015 1 10UF C1016 1 1UF C1019 0.22UF 1 1UF 10% 6.3V CERM 2 402 20% 6.3V X5R 2 603 B 10% 6.3V CERM 2 402 C1020 1 0.22UF 20% 6.3V 2 X5R 0201 C1006 1 0.22UF 20% 6.3V X5R 2 0201 C1012 0.01UF 1 C1007 0.22UF C1024 10UF C1013 1 56PF 10% 10V X5R 2 201 1 20% 6.3V 2 X5R 0201 C1017 1 0.01UF 10% 6.3V X5R 2 01005 C1021 0.22UF 5% 6.3V NP0-C0G 2 01005 NOSTUFF 1 C1018 10% 6.3V X5R 2 01005 C1022 C1027 1 C1029 56PF 5% 6.3V NP0-C0G 01005 0.22UF 1 20% 6.3V 2 X5R 0201 5% 6.3V NP0-C0G 2 01005 NOSTUFF 0.01UF 2 C1030 1 20% 6.3V 2 X5R 0201 C1031 1 0.22UF 20% 6.3V 2 X5R 0201 NOSTUFF TP48 7 1 10% 6.3V X5R 2 01005 0.22UF 1 56PF C1026 1 20% 4V X5R-CERM 2 0610 1 0.01UF 20% 6.3V 2 X5R 0201 4.3UF 20% 6.3V X5R 2 603 8 1 20% 6.3V 2 X5R 0201 =PP1V2_VDDQ_H4 C1023 1 A 20% 6.3V X5R 2 0201 6 <1MA <1MA AA1 A25 DDR1_VREF_DQ DDR0_VREF_DQ VSS_36 AB18 VSS_37 AB20 DDR0_ZQ DDR1_ZQ VSS_38 AB22 VSS_39 AB24 TP449 AY18 AK34 AD33 AH33 AW20 AW24 AW29 W33 A24 AA2 AF33 AK33 AL1 AW22 AW31 B4 B5 B25 F33 T34 Y1 A4 A5 AB2 AL2 AL33 AW18 AW32 B26 E33 U33 AC2 AG2 AK2 AN2 AT2 AW3 B3 B6 B8 B11 B14 B16 B19 B21 B24 B27 B31 D2 D33 G2 G33 K2 K33 M2 N33 R2 R33 U2 Y2 VDDCA VSS 80MA VDD2 VSS 320MA VDD1 VSS 40MA VDDQ VSS 500MA (VDDQ = VDDIOD: 5 DON’T DOUBLE COUNT) C1038 1 C1039 1 0.22UF 20% 6.3V X5R 2 0201 1 C1040 1 20% 6.3V 2 X5R 0201 5% 6.3V NP0-C0G 2 01005 0.22UF 20% 6.3V 2 X5R 0201 56PF NOSTUFF VSS_34 AB14 VSS_35 AB16 PPVREF_DDR1_DQ PPVREF_DDR0_DQ SYM 7 OF 12 SC58940X01-A030 C1037 0.22UF VSS_32 AB10 VSS_33 AB12 DDR0_VREF_CA DDR1_VREF_CA TP49 =PP1V8_S2R_H4 C1014 32 8 1 0.22UF 20% 6.3V X5R 2 0201 DDR0_VDDQ_CKE DDR1_VDDQ_CKE 1 20% 6.3V X5R 2 0201 AY23 AE34 DDR0_ZQ DDR1_ZQ =PP1V2_S2R_H4 C1004 0.22UF PPVREF_DDR0_CA PPVREF_DDR1_CA 2 1% 1/20W MF 201 2 1% 1/20W MF 201 R1000 0.22UF C1036 U0652 H4P-512MB MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.3MM R1001 20% 6.3V X5R 2 603 20% 6.3V X5R 2 0201 1 20% 6.3V 2 X5R 0201 BGA 39 8 C C1001 8 39 TP437 10UF 1 0.22UF 20% 4V X5R-CERM 2 0610 0.22UF VOLTAGE=0.6V 0.01UF 1% 1/32W MF 2 01005 1 20% 6.3V X5R 2 0201 TP45 PPVREF_DDR1_DQ C1008 D4 D6 D8 D10 D12 D14 E5 E7 E9 E11 E13 E15 F4 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 G5 G6 H4 H6 J5 J6 K4 K6 L5 L6 M4 M6 N5 N6 P4 P6 R5 R6 T4 T6 U5 U6 V4 V6 W5 W6 Y4 Y6 =PP1V2_S2R_H4 32 8 8 39 VOLTAGE=0.6V 32 8 C1035 1 4.3UF 20% 6.3V X5R 2 603 NET_SPACING_TYPE=VREF MAX_NECK_LENGTH=3 MM R1055 1% 1/32W MF 2 01005 TP65 1 C1034 1 10UF MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.3MM 1.00K NOSTUFF =PP1V2_VDDIOD_H4 =PP1V2_VDDQ_H4 1 PPVREF_DDR0_DQ 1.00K 1 1% 1/32W MF 2 01005 R1053 R1054 R1052 2.21K NET_SPACING_TYPE=VREF MAX_NECK_LENGTH=3 MM 1.00K 1 32 PPVREF_DDR1_CA 8 39 =PP1V2_VDDQ_H4 1% 1/32W MF 2 01005 1 R1051 TP448 1 2 3 2.21K 1% 1/32W MF 2 01005 32 8 4 =PP1V2_S2R_H4 R1005 2.21K D 5 AB29 AC1 AC5 AC9 AC11 AC13 AC15 AC17 AC19 AC21 AC23 AC25 AC27 AD2 AD8 AD10 AD12 AD14 AD16 AD18 AD20 AD22 AD24 AD27 AD34 AE5 AE9 AE11 AE13 32 9 =PP1V8_VDDIO18_H4 C1041 1 56PF 5% 6.3V NP0-C0G 2 01005 NOSTUFF AE15 AE17 AE19 AE21 AE23 AE25 AE33 AF1 AF5 AF8 AF10 AF12 AF14 AF16 AF18 AF20 AF22 AF24 AF26 AF32 AG9 AG11 AG13 AG15 AG17 AG19 AG21 AG23 AG25 C1044 0.22UF 1 20% 6.3V X5R 2 0201 C1042 0.22UF 1 20% 6.3V X5R 2 0201 C1045 0.22UF 1 20% 6.3V X5R 2 0201 C1043 1 10% 6.3V CERM 2 402 C1046 1UF BGA SYM 9 OF 12 SC58940X01-A030 VDDIOD 1 10% 6.3V CERM 2 402 VSS 500MA (VDDQ = VDDIOD: AA28 AB7 AB28 AC6 AC28 AD28 AE6 AF6 AH6 AN6 AN7 AN8 H23 P28 R28 T28 W28 Y28 1UF AM16 AM18 AM20 AM22 AM24 AM26 AM28 AM29 AM30 AN1 AN14 AN16 AN17 AN18 AN19 AN20 AN24 AN25 AN26 AN27 AN28 AN29 AP5 AP6 AP7 AP8 AP9 AP19 AP21 AP22 AR1 AR5 AR6 AR7 AR8 AR9 AR13 AR19 AR24 AR25 AR26 AR27 AR28 AR29 AT5 AT6 AT7 AT8 AT9 AT10 AT11 AT12 AT13 AT15 U0652 H4P-512MB DON’T DOUBLE COUNT) VDDIO18 VSS SYNC_MASTER=JAMES SYNC_DATE=N/A DRAWING NUMBER R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 3 2 B AP: PWR Apple Inc. 4 C AT16 AT17 AT24 AT25 AT26 AT27 AT28 AT29 AU4 AU5 AU6 AU7 AU8 AU9 AU10 AU11 AU12 AU13 44MA PAGE TITLE D 051-8962 SIZE D REVISION A.0.0 BRANCH PAGE 10 OF 106 SHEET 1 8 OF 42 A 8 32 7 5 4 2 3 1 =PPVDD_SOC_H4 C1100 C1101 1 NOSTUFF C1104 C1105 1 5% 6.3V NP0-C0G 2 01005 C1108 0.22UF 1 20% 6.3V X5R 2 0201 C1112 0.22UF 1 20% 6.3V 2 X5R 0201 C1117 1 1 20% 6.3V X5R 2 0201 C1113 0.22UF 1 20% 6.3V 2 X5R 0201 0.22UF 20% 6.3V 2 X5R 0201 C1121 C1109 C1118 0.22UF C1106 1 1 20% 6.3V 2 X5R 0201 NOSTUFF C1107 1 56PF 5% 6.3V NP0-C0G 2 01005 0.22UF 20% 4V X5R-CERM 2 0610 NOSTUFF 56PF C1110 20% 6.3V X5R 2 0201 C1115 1 0.22UF C1119 1 0.22UF 20% 6.3V 2 X5R 0201 0.22UF 1 0.22UF 20% 6.3V X5R 2 0201 C1114 5% 6.3V NP0-C0G 2 01005 C1111 1 1 56PF 5% 6.3V NP0-C0G 2 01005 0.22UF 1 4.3UF 20% 4V X5R-CERM 2 0610 NOSTUFF 56PF C1103 1 4.3UF 20% 6.3V 2 X5R 603 20% 4V X5R-CERM 2 0610 D C1102 1 10UF 4.3UF C 6 20% 6.3V 2 X5R 0201 1 20% 6.3V 2 X5R 0201 C1120 0.22UF 1 20% 6.3V 2 X5R 0201 1 4.3UF 20% 4V X5R-CERM 2 0610 B A C1116 0.22UF 1 20% 6.3V 2 X5R 0201 AA20 AA22 AA24 AB9 AB11 AB13 AB15 AB17 AB19 AB21 AB23 AB25 AC8 AC10 AC12 AC14 AC16 AC18 AC20 AC22 AC24 AD9 AD11 AD13 AD15 AD17 AD19 AD21 AD23 AD25 AE8 AE10 AE12 AE14 AE16 AE18 AE20 AE22 AE24 AF9 AF11 AF13 AF15 AF17 AF19 AF21 AF23 AF25 AG8 AG10 AG12 AG14 AG16 AG18 AG20 AG22 AG24 AG26 AH9 AH11 AH13 AH15 AH17 AH19 AH21 AH23 AH25 AJ8 AJ10 AJ12 AJ14 AJ16 AJ18 AJ20 AJ22 AJ24 AJ26 AK9 AK11 AK13 AK15 AK17 AK19 AK21 AK23 AK25 AL8 AL10 AL12 AL14 AL16 AL18 U0652 H4P-512MB BGA SYM 10 OF 12 SC58940X01-A030 VDD VDD 2100MA AL20 AL22 AL24 AL26 AM9 AM11 AM13 AM15 AM17 AM19 AM21 AM23 AM25 H9 H13 H15 H17 H19 H21 J8 J10 J12 J14 J16 J18 J20 J22 J24 K9 K11 K13 K15 K17 K19 K21 K23 K25 L8 L10 L12 L14 L16 L18 L20 L22 L24 L26 M9 M11 M13 M15 M17 M19 M21 M23 M25 N20 N22 N24 N26 P19 P21 P23 P25 P27 R20 R22 R24 R26 T19 T21 T23 T25 T27 U20 U22 U24 U26 V19 V21 V23 V25 V27 W20 W22 W24 W26 Y19 Y21 Y23 Y25 32 =PPVDD_CPU_H4 C1125 C1126 1 10UF C1129 1 56PF C1137 C1138 1 C1130 C1131 C1132 1 C1139 1 20% 6.3V 2 X5R 0201 C1135 20% 6.3V 2 X5R 0201 5% 6.3V NP0-C0G 2 01005 C1136 1 1 0.22UF 0.22UF 20% 6.3V X5R 2 0201 20% 6.3V 2 X5R 0201 C1140 1 56PF 5% 6.3V NP0-C0G 2 01005 1 0.22UF 1 56PF 1 20% 6.3V 2 X5R 0201 0.22UF 20% 6.3V 2 X5R 0201 20% 4V X5R-CERM 2 0610 0.22UF 20% 6.3V 2 X5R 0201 1 4.3UF 20% 4V X5R-CERM 2 0610 C1134 1 C1128 1 4.3UF 5% 6.3V NP0-C0G 2 01005 0.22UF 0.22UF C1127 20% 4V X5R-CERM 2 0610 56PF 5% 6.3V NP0-C0G 2 01005 C1133 1 4.3UF 20% 6.3V X5R 2 603 AA8 AA10 AA12 AA14 AA16 AA18 N8 N10 N12 N14 N16 N18 P9 P11 P13 P15 P17 R10 R12 R14 R16 R18 T9 T11 T13 T15 T17 U8 U10 U12 U14 U16 U18 V9 V11 V13 V15 V17 W8 W10 W12 W14 W16 W18 Y9 Y11 Y13 Y15 Y17 C1141 1 1 0.22UF 0.22UF 20% 6.3V 2 X5R 0201 20% 6.3V 2 X5R 0201 =PP3V0_IO_H4 32 9 7 C1142 C1143 1 0.22UF G23 G24 U29 V29 1 0.22UF 20% 6.3V X5R 2 0201 20% 6.3V X5R 2 0201 AJ7 AK7 U0652 H4P-512MB BGA SYM 8 OF 12 SC58940X01-A030 VDD_CPU AN9 =PP1V8_VDDIO18_H4 NOSTUFF C1150 C1151 1 0.22UF C1152 1 0.22UF 20% 6.3V 2 X5R 0201 10 6 AP24 AP25 AP26 AP27 AP28 AR21 AR22 AR23 1 56PF 20% 6.3V 2 X5R 0201 5% 6.3V NP0-C0G 2 01005 =PPIO_NAND_H4 C1144 0.22UF 1 20% 6.3V 2 X5R 0201 AP29 C1145 0.22UF 1 20% 6.3V 2 X5R 0201 C1146 1 56PF C1147 C1148 1 1UF 5% 6.3V NP0-C0G 2 01005 1UF 1 10% 6.3V CERM 2 402 10% 6.3V 2 CERM 402 C1149 1 AL27 AM27 10UF 20% 6.3V 2 X5R 603 100MA VDDIOD0 GPIO[30-39] 1.8V VDDIOD1 UART4 1.8V 32 9 7 AJ27 AK27 AH27 AG27 1UF 1 10% 6.3V 2 CERM 402 C1181 1UF 1 10% 6.3V 2 CERM 402 VDDIOD2 24MA VSS VSS FMI[0-2] 3.3V VDDIOD3 FMI[0-1]_CEN[4-7] 3.3V VDDIOD4 FMI[3] 3.3V 24MA 7 AL9 AL11 AL13 B AL15 AL17 AL19 AL21 AL23 AL25 AL28 AL29 AL30 AL34 AM7 AM8 AM10 VDDIOD6 VDDIOD7 AM12 AM14 C1182 1UF 1 10% 6.3V 2 CERM 402 C1160 0.22UF 1 20% 6.3V 2 X5R 0201 C1161 1MA 1MA SPI1 I2C2 3.0V 1 0.22UF 20% 6.3V X5R 2 0201 SYNC_MASTER=JAMES PAGE TITLE SYNC_DATE=N/A AP: PWR DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: 6 C AK32 AL3 AL4 AL5 FMI[2-3]_CEN[4-7] VSS SPI3,ISP FLASH VDDIOD5 NOT USED THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 D 24MA =PP3V0_IO_H4 C1180 10MA 24MA NOSTUFF VSS VDDIO30 9MA 32 8 VSS 1900MA AH5 AH8 AH10 AH12 AH14 AH16 AH18 AH20 AH22 AH24 AH26 AH28 AH34 AJ1 AJ2 AJ6 AJ9 AJ11 AJ13 AJ15 AJ17 AJ19 AJ21 AJ23 AJ25 AJ28 AJ29 AJ30 AJ31 AJ33 AJ34 AK1 AK3 AK4 AK5 AK6 AK8 AK10 AK12 AK14 AK16 AK18 AK20 AK22 AK24 AK26 AK28 AK29 AK30 5 4 3 2 051-8962 SIZE D REVISION A.0.0 BRANCH PAGE 11 OF 106 SHEET 1 9 OF 42 A 8 7 BOOT CONFIG ID 32 13 10 7 5 4 6 R1200 10K 5% 1/20W MF 2 201 TP41 BOOT_CONFIG[3] (GPIO29) 5 BOOT_CONFIG_3 BOOT_CONFIG[2] (GPIO28) 5 BOOT_CONFIG_2 BOOT_CONFIG[1] (GPIO25) 5 BOOT_CONFIG_1 BOOT_CONFIG[0] (GPIO18) 5 BOOT_CONFIG_0 TP43 1. 2. 3. 10K 5% 1/20W MF 2 201 K93-K94 BOARD_ID[3] 5% 1/32W MF 2 01005 BOARD_ID_3 BOARD_ID[2] 5 BOARD_ID_2_SPI_FLASH_DOUT BOARD_ID[1] 5 BOARD_ID_1_SPI_FLASH_DIN BOARD_ID[0] 5 BOARD_ID_0_SPI_FLASH_CLK C BOARD_ID[3-0] 0100 0101 0110 0111 0010 0011 R1212 10K 5% 1/32W MF 2 01005 JTAG_DAP 39 4 R1210 100 AP_JTAG_SEL 2 OUT 1 100 2 K93 K93 K94 K94 K95 K95 AP DEV AP DEV AP DEV K94-K95 10K 5% 1/32W MF 2 01005 TP36 JTAG_AP_TRST_L K9X_DEV OUT BRD_REV[2-0] 1 0.00 2 IN 11 28 40 IN 11 28 40 D VIDEO_EMI_Y_PR 0% 1/32W MF 01005 4 10 39 DEVELOPMENT_JTAG_TAP R1214 OUT JTAG_AP_TRST_L 1 0.00 2 VIDEO_EMI_CVBS_PB SCAN DUMP PRODUCTION DEVELOPMENT_JTAG DEVELOPMENT_JTAG_TAP JTAG_DAP 10K 5% 1/32W MF 2 01005 TP51 TP50 TP52 PLACEMENT NOTE: NEAR U0652 7 PP_AP_DP_AVDD_AUX MAKE_BASE=TRUE SET GPIO AS INPUT DISABLE PU AND ENABLE PD READ DP_AP_TX_P<0> OUT DP_AP_TX_N<0> OUT DP_AP_TX_P<1> OUT DP_AP_TX_N<1> OUT SIGNAL_MODEL=EMPTY NOSTUFF R1250 SIGNAL_MODEL=EMPTY NOSTUFF 1 R1251 150 5% 1/20W MF 2 201 5% 1/20W MF 2 201 DP_TERM_C1250 NOSTUFF 1 5% 1/20W MF 2 201 11 28 40 R1213 DEVELOPMENT_JTAG JTAG_DAP 150 10K 5% 1/20W MF 2 201 OUT 0% 1/32W MF 01005 SIGNAL_MODEL=EMPTY NOSTUFF 1 R1252 150 10K 1 5% 1/20W MF 2 201 7 13 40 7 13 40 9 6 R1260 5% 1/20W MF 2 201 1 100PF 5% 25V 2 CERM 201 7 =PP3V3_NAND_H4 =PPIO_NAND_H4 R1253 1 DP_TERM_C1251 C1250 7 PP_DP_PAD_AVDD1 C 7 13 40 150 5% 1/20W MF 2 201 PP_DP_PAD_AVDD0 7 13 40 SIGNAL_MODEL=EMPTY NOSTUFF 1 SIGNAL_MODEL=EMPTY NOSTUFF R1207 R1208 R1209 10K VIDEO_EMI_C_Y 0% 1/32W MF 01005 JTAG_AP_TDI OUT 39 10 4 TP37 1 0.00 2 DEVELOPMENT_JTAG_TAP TP71 AP_GPIO42_BRD_REV2 AP_GPIO41_BRD_REV1 AP_GPIO40_BRD_REV0 1 1 TP75 39 4 SET GPIO AS INPUT DISABLE PU AND ENABLE PD READ S/W READ FLOW 1. 2. 3. JTAG_AP_TDO IN 4 R1211 TP44 1 BOARD REVISION 000 001 010 011 100 DEVELOPMENT_JTAG_TAP R1203 R1204 1 R1205 1 R1206 10K 1 JTAG FMI_NOTEST 1 =PP1V8_H4 1 B 5% 1/20W MF 2 201 R1202 2-WIRE DAP 32 13 10 7 5 4 5 10K FMI_TEST 1 S/W READ FLOW FMI0/1 4/4 CS FMI0/1 4/4 CS WITH TEST BOARD ID 5 R1201 JTAG_DAP BOOT_CONFIG[3-0] 5 1 2 3 1 TP39 1101 1110 4 =PP1V8_H4 1 D 5 NOSTUFF SIGNAL_MODEL=EMPTY NOSTUFF XW0601 100PF NOSTUFF C1251 XW0602 5% 25V 2 CERM 201 NOSTUFF XW0603 100 32 TP433 AP_TESTMODE 4 2 5% 1/32W MF 01005 SHORT-01005 1 2 TP432 AP_TST_STPCLK SHORT-01005 1 2 SHORT-01005 1 2 4 AP_FAST_SCAN_CLK 4 AP_HOLD_RESET 4 S/W READ FLOW 1. 2. 3. PROTO 1 PROTO 2 EVT EVT2 DVT SET GPIO AS INPUT ENABLE PU AND DISABLE PD READ UART_0_RXD UART_0_TXD 5 5 MAKE_BASE=TRUE MAKE_BASE=TRUE UART_1_CTS_L UART_1_RTS_L UART_1_RXD UART_1_TXD 5 5 5 5 MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE FOR REFERENCE 1110 FMI0/1 4/4 CS W/TEST 1111 RESERVED UART_2_RXD UART_2_TXD 5 5 MAKE_BASE=TRUE MAKE_BASE=TRUE BOOT_CONFIG[3:0] 0000 SPI0 0001 SPI3 0010 SPI0 W/TEST 0011 SPI3 W/TEST 0100 FMI0 2CS 0101 FMI0 4CS 0110 FMI0 4CS W/TEST 0111 RESERVED 1000 FMI1 2 CS 1001 FMI1 4 CS 1010 FMI1 4CS W/TEST 1011 RESERVED 1100 FMI0/1 2/2 CS CURRENT SETTING -> 1101 FMI0/1 4/4 CS UART_3_CTS_L UART_3_RTS_L UART_3_RXD UART_3_TXD 5 5 5 5 MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE UART_4_CTS_L UART_4_RTS_L UART_4_RXD UART_4_TXD 5 5 5 5 MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE CHS_SCL CHS_SDA 23 23 MAKE_BASE=TRUE UART_AP_0_RXD IN UART_AP_0_TXD OUT UART_AP_1_CTS_L IN UART_AP_1_RTS_L OUT UART_AP_1_RXD IN UART_AP_1_TXD OUT UART_AP_2_RXD IN UART_AP_2_TXD OUT UART_AP_3_CTS_L IN UART_AP_3_RTS_L OUT UART_AP_3_RXD IN UART_AP_3_TXD OUT UART_AP_4_CTS_L IN UART_AP_4_RTS_L OUT UART_AP_4_RXD IN UART_AP_4_TXD OUT I2C0_SCL_1V8 I2C0_SDA_1V8 MAKE_BASE=TRUE A B 11 TO DOCK MUX 11 31 31 TO BB USART 31 31 31 TO BB UMTS 31 30 30 TO BT UART 30 30 31 31 TO GPS UART 31 31 IN 5 19 35 39 OUT 5 19 35 39 SYNC_MASTER=JAMES PAGE TITLE SYNC_DATE=N/A AP: MISC & ALIASES DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 051-8962 SIZE D REVISION A.0.0 BRANCH PAGE 12 OF 106 SHEET 10 OF 42 1 A 8 7 6 5 4 2 3 1 D D NOTE: LDO3 PROVIDES 50MA TO BOTH H4P AND U1300 IF THAT’S NOT ENOUGH, STUFF R1371 AND NOSTUFF R1370 R1371 32 =PP3V0_VIDEO_BUF 1 0.00 2 0% 1/32W MF 01005 TP73 NOSTUFF R1370 32 =PP3V0_VIDEO_BUFFER 1 0.00 2 0% 1/32W MF 01005 =PP3V2_S2R_USBMUX VOLTAGE=3.0V MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM C1301 TP412 56PF ~15MA PP3V0_U0900_FILTR 1 1 C1300 32 1 0.1UF 5% 6.3V NP0-C0G 2 01005 10% 6.3V X5R 201 2 C1370 0.1UF 10% 2 6.3V X5R 201 VDL D2 VDH E2 VA_0 C1 VA_1 C4 TP414 PORT_DOCK_VIDEO_AMP_EN R1372 YIN CVBSIN CIN 40 7 IN 40 7 IN 40 7 IN TP415 10 IN 10 OUT 39 31 BI 39 31 BI TP416 CH.1_IN CH.2_IN CH.3_IN CH.1_OUT A2 CH.2_OUT A1 CH.3_OUT B1 UART_AP_0_TXD UART_AP_0_RXD D4 E4 TX_VLOW RX_VLOW RX_VHIGH/USB_2D+ E1 TX_VHIGH/USB_2D- D1 USB_BB_D_P USB_BB_D_N F3 F4 USB_D+ USB_D- 1 5% 1/32W MF 01005 2 VID_EN C3 A3 A4 B4 DAC_AP_OUT3 DAC_AP_OUT2 DAC_AP_OUT1 PLACE R0960-62 NEAR U0900 R1360 100K THS7380IZSYR UCSP NOTE: 5 JTAG_DAP U1300 C IN 1 75 VIDEO_EMI_Y_PR OUT 2 C 10 28 40 1% 1/20W MF 201 JTAG_DAP R1361 BUF_Y_PR BUF_CVBS_PB 40 BUF_C_Y 40 1 40 USB_FS_P_ACC_RX USB_FS_N_ACC_TX USB_1D+ F2 USB_1D- F1 USB_FS_D_P USB_FS_D_N SEL C2 DOCK_BB_EN 75 2 VIDEO_EMI_CVBS_PB OUT 10 28 40 VIDEO_EMI_C_Y OUT 10 28 40 1% 1/20W MF 201 BI 4 39 BI 4 39 IN 35 OUT 28 39 IN 28 39 JTAG_DAP R1362 1 1 R1315 75 1% 1/20W MF 201 2 TP74 1.00M DGND 1 D3 E3 B2 B3 AGND TP411 R1320 5% 1/32W MF 2 01005 100K 5% 1/32W MF 2 01005 NOTE: DOCK_BB_EN = 1: DOCK_BB_EN = 0: BB USB <-> DOCK SERIAL BB USB <-> H4P FS USB H4P UART0 <-> DOCK SERIAL B B A SYNC_MASTER=JAMES SYNC_DATE=N/A PAGE TITLE AP: VIDEO BUFFER,BB USB MUXES DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 051-8962 SIZE D REVISION A.0.0 BRANCH PAGE 13 OF 106 SHEET 11 OF 42 1 A 8 7 6 5 4 2 3 16GB FLASH CONFIGURATIONS 1 64GB FLASH CONFIGURATIONS TABLE_5_HEAD PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) TABLE_5_HEAD BOM OPTION PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION TABLE_5_ITEM 335S0701 1 TOSHIBA 32NM 16GB RAW U1400 TABLE_5_ITEM 16GB_PROD 335S0702 2 TOSHIBA 32NM 32GB RAW U1400,U1410 64GB_PROD TABLE_ALT_HEAD PART NUMBER ALTERNATE FOR PART NUMBER BOM OPTION REF DES COMMENTS: 335S0682 335S0701 16GB_PROD U1400 SAMSUNG 35NM 16GB RAW TABLE_ALT_HEAD PART NUMBER ALTERNATE FOR PART NUMBER BOM OPTION REF DES COMMENTS: 335S0665 335S0702 64GB_PROD U1400,U1410 SAMSUNG 35NM 32GB RAW 335S0791 335S0702 64GB_PROD U1400,U1410 SAMSUNG 27NM 32GB RAW HYNIX 26NM 16GB PPN 335S0722 335S0702 64GB_PROD U1400,U1410 SANDISK 32NM 32GB RAW 32GB FLASH CONFIGURATIONS 335S0782 335S0702 64GB_PROD U1400,U1410 HYNIX 26NM 32GB PPN TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM 335S0790 335S0701 16GB_PROD TABLE_ALT_ITEM SAMSUNG 27NM 16GB RAW U1400 TABLE_ALT_ITEM D 335S0781 335S0701 16GB_PROD U1400 D TABLE_ALT_ITEM TABLE_ALT_ITEM 128GB FLASH CONFIGURATIONS TABLE_5_HEAD PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION TABLE_5_ITEM 335S0701 2 TOSHIBA 32NM 16GB RAW U1400,U1410 32GB_PROD TABLE_ALT_HEAD PART NUMBER ALTERNATE FOR PART NUMBER BOM OPTION REF DES COMMENTS: 335S0682 335S0701 32GB_PROD U1400,U1410 SAMSUNG 35NM 16GB RAW 335S0790 335S0701 32GB_PROD U1400,U1410 SAMSUNG 27NM 16GB RAW 335S0781 335S0701 32GB_PROD U1400,U1410 HYNIX 26NM 16GB PPN TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM =PP3V3_NAND 12 32 =PP3V3_NAND 1 C1403 82PF 1 C1400 0.1UF 10% 6.3V 2 X5R 201 5% 25V 2 CERM 0201 1 C1401 0.1UF 10% 6.3V 2 X5R 201 1 C1402 2.2UF 20% 6.3V 2 CERM 402-LF 1 5% 25V 2 CERM 0201 TP523 TP522 TP525 TP530 39 12 6 BI 39 12 6 BI 39 12 6 BI 39 12 6 BI 39 12 6 BI 39 12 6 BI 39 12 6 BI 39 12 6 BI 39 12 6 BI 39 12 6 BI 39 12 6 BI 39 12 6 BI R1400 1 B 100K 2 1% 1/20W MF 201 NAND0_RB NAND0_VDDL 12 TP542 1 C1404 1UF 10% 6.3V 2 X5R 402 TP584 IO2_0 LGA IO2_1 IO3_0 IO3_1 IO4_0 IO4_1 IO5_0 IO5_1 IO6_0 IO6_1 IO7_0 IO7_1 CE0* CE1* CE2* CE3* CE4* CE5* CE6* CE7* C1 D2 F0ALE F1ALE A5 C5 A1 OA0 G5 F2 OB0 OE0 F0CE0_L F1CE0_L F0CE1_L F1CE1_L F0CE4_L F1CE4_L F0CE5_L F1CE5_L IN 6 12 39 IN 6 12 39 IN 6 39 IN 6 39 IN 6 39 IN 6 39 IN 6 39 IN 6 39 IN 6 39 TP552 TP482 TP483 TP537 TP478 IN 6 39 F0CLE F1CLE IN 6 12 39 CLE1 A3 C3 IN 6 12 39 RE0* RE1* C7 D6 F0RE_L F1RE_L IN 6 12 39 IN 6 12 39 R/B0* R/B1* E5 E7 WE0* WE1* E3 E1 CLE0 A7 INC OA8 OB8 INC_VDDI OC0 OC8 OD0 OD8 OF0 OF8 TP548 TP477 TP539 TP476 TP553 TP460 TP472 TP529 TP461 TP534 TP470 TP555 TP462 TP519 TP473 TP550 TP469 TP475 TP538 TP474 TP541 TP479 TP540 TP480 TP547 NAND0_RB F0WE_L F1WE_L 39 12 6 BI 39 12 6 BI 39 12 6 BI 39 12 6 BI 39 12 6 BI 39 12 6 BI 39 12 6 BI 39 12 6 BI 39 12 6 BI 39 12 6 BI 39 12 6 BI 39 12 6 BI 39 12 6 BI 39 12 6 BI 39 12 6 BI 39 12 6 BI G3 G1 H2 J1 J3 L1 K2 N3 L5 N5 K6 L7 J5 J7 H6 G7 F0AD<0> F1AD<0> F0AD<1> F1AD<1> F0AD<2> F1AD<2> F0AD<3> F1AD<3> F0AD<4> F1AD<4> F0AD<5> F1AD<5> F0AD<6> F1AD<6> F0AD<7> F1AD<7> R1401 12 IN IN 6 12 39 6 12 39 TP536 1 TP535 100K 2 1% 1/20W MF 201 12 NAND1_RB NAND1_VDDL TP490 R 1 TP601 C1414 1UF 10% 6.3V 2 X5R 402 ALE0 IO1_0 U1410 IO1_1 IO2_0 LGA IO2_1 IO3_0 IO3_1 IO4_0 IO4_1 IO5_0 IO5_1 IO6_0 IO6_1 IO7_0 IO7_1 OC0 OC8 OD0 OD8 OF0 OF8 ALE1 CE0* CE1* CE2* CE3* CE4* CE5* CE6* CE7* CLE0 CLE1 RE0* RE1* A7 INC OA8 OB8 INC_VDDI 1 C1411 0.1UF 10% 6.3V 2 X5R 201 1 C1412 2.2UF 20% 6.3V 2 CERM 402-LF C R/B0* R/B1* C1 D2 A5 C5 A1 OA0 G5 F2 OB0 OE0 F0ALE F1ALE F0CE2_L F1CE2_L F0CE3_L F1CE3_L F0CE6_L F1CE6_L F0CE7_L F1CE7_L IN 6 12 39 IN 6 12 39 IN 6 39 IN 6 39 IN 6 39 IN 6 39 IN 6 39 IN 6 39 IN 6 39 IN 6 39 TP493 TP492 TP498 TP502 TP481 TP484 TP499 TP459 A3 C3 F0CLE F1CLE IN 6 12 39 IN 6 12 39 C7 D6 F0RE_L F1RE_L IN 6 12 39 IN 6 12 39 E5 E7 NAND1_RB WE0* E3 WE1* E1 F0WE_L F1WE_L TP495 TP488 TP497 TP494 TP491 TP489 B 12 IN 6 12 39 IN 6 12 39 TP486 TP487 R M2 OE8 B2 F6 L3 TP510 TP558 TP507 TP533 10% 6.3V 2 X5R 201 IO0_0 IO0_1 TP506 TP517 0.1UF VCCQ VCC VCCQ U1400 IO1_1 ALE1 VSSQ TP515 BI ALE0 IO1_0 M2 OE8 TP521 39 12 6 IO0_0 IO0_1 NAND-XXNM-64GX8 VLGA5-N90 TP512 BI VSS TP516 39 12 6 G3 G1 H2 J1 J3 L1 K2 N3 L5 N5 K6 L7 J5 J7 H6 G7 F0AD<0> F1AD<0> F0AD<1> F1AD<1> F0AD<2> F1AD<2> F0AD<3> F1AD<3> F0AD<4> F1AD<4> F0AD<5> F1AD<5> F0AD<6> F1AD<6> F0AD<7> F1AD<7> B2 F6 L3 TP513 BI VSSQ TP518 TP520 BI 39 12 6 C1410 OMIT B6 M6 N1 N7 B6 M6 N1 N7 VCC TP524 39 12 6 1 OMIT NAND-XXNM-64GX8 VLGA5-N90 TP527 VSS TP528 C1413 82PF C TP526 12 32 TP496 TP551 TP508 A TP471 TP485 SYNC_MASTER=JONATHAN PAGE TITLE SYNC_DATE=N/A NAND DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 051-8962 SIZE D REVISION A.0.0 BRANCH PAGE 14 OF 106 SHEET 12 OF 42 1 A 8 7 6 5 4 2 3 1 D D DISPLAYPORT AC COUPLING 40 10 7 IN DP_AP_TX_P<0> C1702 1 2 1 2 1 2 10% 0.1UF 40 10 7 IN DP_AP_TX_N<0> C1703 40 10 7 IN DP_AP_TX_P<1> C1704 IN DP_AP_TX_N<1> 10% 0.1UF 10% 0.1UF 40 10 7 C1705 1 X5R DP_EMI_TX_P<0> OUT 28 40 DP_EMI_TX_N<0> OUT 28 40 201 32 13 6.3V X5R 201 6.3V X5R 201 DP_EMI_TX_P<1> OUT 28 40 28 40 X5R DP_EMI_TX_N<1> OUT 201 2 10% 0.1UF 6.3V 6.3V =PP3V0_IO_MISC 1 100K 1% 1/32W MF 2 01005 40 28 13 DP_EMI_AUX_N 40 28 13 DP_EMI_AUX_P 1 40 7 BI 1 BI C1707 DP_AP_AUX_N 2 10% 0.1UF 40 7 R1723 100K C1706 DP_AP_AUX_P R1720 1 0.1UF 6.3V X5R 201 6.3V X5R 201 2 10% DP_EMI_AUX_P BI 13 28 40 DP_EMI_AUX_N BI 13 28 40 1% 1/32W MF 2 01005 C C DISPLAYPORT HOT PLUG DETECT 32 13 =PP3V0_IO_MISC 1 32 10 7 5 4 B 1 10% 6.3V 2 X5R 201 0.00 IN FW_ZENER_PWR TP361 0% 1/32W MF 01005 1 R1751 10K 6 U1701 74LVC1G07 SOT886 DP_AP_HPD OUT Y 4 1 NC NOSTUFF B 5% 1/32W MF 2 01005 VCC 2 A DP_BUF_HPD 2 CRITICAL GND TP55 5% 1/32W MF 2 01005 7 NC 5 TP56 3 35 28 1 C1750 0.1UF R1750 R1731 220K =PP1V8_H4 TABLE_ALT_HEAD PART NUMBER ALTERNATE FOR PART NUMBER 311S0536 311S0341 BOM OPTION REF DES COMMENTS: U1701 RADAR:8481319 TABLE_ALT_ITEM A SYNC_MASTER=JAMES PAGE TITLE SYNC_DATE=N/A VIDEO: DISPLAY PORT DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 051-8962 SIZE D REVISION A.0.0 BRANCH PAGE 17 OF 106 SHEET 13 OF 42 1 A 8 7 6 5 4 MLC EEPROM:RAW APN 335S0661 2 3 1 TABLE_5_HEAD PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION CRITICAL 100MHZ_PANEL TABLE_5_ITEM 341S2799 =PP3V3_MLC 1 R2006 1 U2001 1% 1/20W MF 201 2 E2 E1 E0 WC* 2 1 7 MLC_2WC_L 6 R2050 1 R2051 1 5% 1/20W MF 201 2 5% 1/20W MF 201 2 4.7K M24C64 EEPROM 3 MLP SCL SDA VSS THM_P 4 FL2000 MLC_MUX_SDA_3V3 MLC_MUX_SCL_3V3 2 FL2001 80-OHM-0.2A-0.4-OHM 1 2 FL2002 20% 10V 2 CERM 402 C2011 1 1 4.7UF C2014 0.1UF 20% 10V 2 CERM 402 20% 6.3V X5R-CERM 2 402 PP2009 C2015 20% 10V 2 CERM 402 B3 M_VREG_0P4V C2004 U2000 PP2011 MIPID_AP_DATA_P<0> 7 14 40 TP393 32 16 14 RADAR:8377307 0.1UF 2.2NF NOSTUFF PP 1 MLC_VREG_0V4 10% 10V 2 X5R 201 P4MM SM 1 20% 6.3V X5R-CERM 2 402 7 14 40 1 B 1 4.7UF 40 14 7 IN 40 7 IN 40 14 7 IN 40 7 IN TP392 =PP3V3_MLC 40 7 NOSTUFF R2052 1 R2008 1 1% 1/20W MF 201 2 1% 1/20W MF 201 2 100K 100K TP391 IN 40 7 IN 40 7 IN 40 7 IN 40 7 IN 40 14 7 IN 6 IN NC_MIPI_MLC_MASTER_CLK_P NC_MIPI_MLC_MASTER_CLK_N C1 M_DPCLK C2 M_DNCLK NC_MIPI_MLC_MASTER_DATA_P NC_MIPI_MLC_MASTER_DATA_N B1 M_DPDATA0 B2 M_DNDATA0 F1 S_DPCLK F2 S_DNCLK MIPID_AP_DATA_P<0> MIPID_AP_DATA_N<0> D1 S_DPDATA0 D2 S_DNDATA0 MIPID_AP_DATA_P<1> MIPID_AP_DATA_N<1> E1 S_DPDATA1 E2 S_DNDATA1 MIPID_AP_DATA_P<2> MIPID_AP_DATA_N<2> G1 S_DPDATA2 G2 S_DNDATA2 MIPID_AP_DATA_P<3> MIPID_AP_DATA_N<3> H1 S_DPDATA3 H2 S_DNDATA3 MLC_BIST MLC_TEST B7 BIST B8 TEST RST_MLC_L B5 RESET* A 1% 1/20W MF 201 2 R2003 100K 1% 1/20W MF 2 201 R2010 100K 1 MLC_MONITOR0_PD NC_MLC_MONITOR1 NC_MLC_MONITOR2 NC_MLC_MONITOR3 1% 1/20W MF 201 2 C3 MLC_SCL MLC_SDA A6 A5 MLC_SCL_3V3 MLC_SDA_3V3 OUT EDID_SCL EDID_SDA A8 LVDS_DDC_CLK LVDS_DDC_DATA OUT 16 OUT 16 TCLKP TCLKN C8 TAP TAN G8 G7 TBP TBN F8 TCP TCN E8 TDP TDN D8 D7 NC_LVDS_DATA_P<3> NC_LVDS_DATA_N<3> ROUT_LVDS C5 ROUT_LVDS VSYNC PWM PPC F5 MONITOR4 MONITOR5 MONITOR6 F4 E4 H6 SWI H5 MONITOR0 G3 MONITOR1 G4 MONITOR2 G5 MONITOR3 A3 VSS12D_PLL 100K 1 TP384 CAP_18LDO CAP_12LDO_0 CAP_12LDO_1 CAP_12LDO_3 CAP_12LDO_5 S6T2MLC MIPID_AP_CLK_P MIPID_AP_CLK_N SWI_MLC R2002 1 FBGA1 MLC_CAP_1V8LDO MLC_CAP_1V2LDO_0 MLC_CAP_1V2LDO_1_3 E3 H7 A7 A4 B6 C7 F7 E7 D4 G6 D3 MLC_CAP_1V2_LDO_5 BI LVDS_CLK_P LVDS_CLK_N 15 15 OUT 16 40 OUT 16 40 LVDS_DATA_P<0> LVDS_DATA_N<0> OUT 16 40 OUT 16 40 LVDS_DATA_P<1> LVDS_DATA_N<1> OUT 16 40 OUT 16 40 LVDS_DATA_P<2> LVDS_DATA_N<2> OUT 16 40 OUT 16 40 VOLTAGE=1.2V MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR C2000 4.7UF VOLTAGE=1.2V MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR VOLTAGE=1.2V MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR VOLTAGE=1.2V MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR B C2001 1 4.7UF 20% 6.3V X5R-CERM 2 402 1 20% 6.3V X5R-CERM 2 402 C2002 4.7UF C2003 1 4.7UF 20% 6.3V X5R-CERM 2 402 1 20% 6.3V X5R-CERM 2 402 TP382 TP_MLC_VSYNC TP_PM_LCD_BKLT_PWM TP395 PM_MLC_PPC_OUT NC_MLC_MONITOR4 NC_MLC_MONITOR5 NC_MLC_MONITOR6 1 TP396 R2001 8.45K OUT 16 1% 1/20W MF 2 201 SYNC_MASTER=MIKE E6 VSS33P_LVDS PP C2012 VDD33D_LVDS E5 C2013 0.1UF VDD33A_LVDS C6 1 VOLTAGE=0.4V MIN_LINE_WIDTH=0.2 MM MIN_NECK_WIDTH=0.1 MM MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MIPID_AP_DATA_N<3> C2000,C2001,C2002,C2003,C2010,C2011,C2012,C3609,C3611,C3616 PAGE TITLE F6 VSS33D_LVDS 20% 6.3V X5R-CERM 2 402 NOSTUFF P4MM SM 1 C TABLE_ALT_ITEM VDD33P_LVDS D5 1 4.7UF 7 14 40 COMMENTS: VOLTAGE=3.3V MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR C2010 MIPID_AP_CLK_P 138S0618 REF DES PP3V3_MLC_DIG_12LDO NOSTUFF 1 138S0652 BOM OPTION TP385 2 0201-1 SM PP ALTERNATE FOR PART NUMBER VOLTAGE=3.3V MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR 80-OHM-0.2A-0.4-OHM PP2000 P4MM PART NUMBER PP3V3_MLC_18LDO_12LDO 0201-1 1 TABLE_ALT_HEAD D6 VSS33A_LVDS 5% 25V 2 CERM 0201 VOLTAGE=3.3V MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR TP386 VDD33A_12LDO_0 F3 VDD33A_12LDO_1 H8 VDD33A_12LDO_2 B4 82PF H3 VSS33A_12LDO_0 C4 VSS33A_12LDO_1 C C2016 TP381 PP3V3_MLC_LVDS 0201-1 1 15 9 VDD33A_OSC H4 1 15 BI IN TP398 80-OHM-0.2A-0.4-OHM =PP3V3_MLC D 5 TP380 32 16 14 U2001 4.7K A1 VSS33A_18LDO D MLC EEPROM 100MHZ LVDS,2MHZ SWI OMIT 8 VCC 10K WHEN WC_L IS LOW, CAN WRITE TO EEPROM WHEN WC_L IS HIGH, CANNOT WRITE TO EEPROM 1 C2017 0.1UF 20% 2 10V CERM 402 VDD33A_18LDO A2 32 16 14 SYNC_DATE=N/A VIDEO: MLC DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 051-8962 SIZE D REVISION A.0.0 BRANCH PAGE 20 OF 106 SHEET 14 OF 42 1 A 8 7 6 5 4 3 2 1 D D C C 14 14 MLC_SDA_3V3 MLC_SCL_3V3 MLC_MUX_SDA_3V3 MLC_MUX_SCL_3V3 14 14 B B A SYNC_MASTER=MIKE PAGE TITLE SYNC_DATE=N/A VIDEO: MLC ALIASES DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 051-8962 SIZE D REVISION A.0.0 BRANCH PAGE 21 OF 106 SHEET 15 OF 42 1 A 8 7 6 5 4 2 3 1 LVDS(LCD)CONNECTOR D CRITICAL VOLTAGE=3.3V MIN_LINE_WIDTH=0.30 MM MIN_NECK_WIDTH=0.20 MM PP3V3_S0_LCD_FERR Q2200 SIA413DJ TP309 C2240 82PF 32 16 14 5% 25V 2 CERM 0201 =PP3V3_MLC NOSTUFF 10K 82PF 5% 25V 2 CERM 0201 1 10K 1 R2205 1% 1/20W MF 2 201 21.5K2 1 1% 1/20W MF 201 0 R2250_1 C2203 0.1UF C2204 R2250 1 1 1 D S 1 R2203 39K 1% 1/20W MF 2 201 D 3 PM_MLC_PPC_OUT TP94 R2210 LCDVDD_PWREN_L 1% 1/20W MF 201 2 IN C2241 NOSTUFF R2204 R2211 1 14 1 1 L2201 10% 2 6.3V X5R 201 C2202 1 10UF 1 1000PF 2 1 2 CABLINE-CA CONNECTOR: 518S0787 NOTE: CONNECTOR ON PANEL IS FLIPPED 10% 16V X7R 201 C2230 82PF CRITICAL 5% 2 25V CERM 0201 20% 2 6.3V X5R 603 J2201 CABLINE-CA F-RT-SM 32 0.015UF 2 LCDVDD_PWREN_L_R 1 2 C2231 TP297 5% 1/20W MF 201 10% 6.3V X5R 0201 TP95 Q2201 1 82PF 1 SOT-523-3 S 2 41 C2232 40 82PF 2 5% 25V 2 CERM 0201 5% 25V CERM 0201 2N7002TXG 1 G D C2206 TP97 FERR-120-OHM-1.5A 0402 G 1 4 =PP3V3_LCD 3 32 7 SC70-6L 39 38 37 36 C2200 100K 1% 1/20W MF 2 201 32 16 14 1000PF =PP3V3_MLC 1 1 R2201 10K TP293 C 14 IN LVDS_DDC_CLK 1 R2200 10K 35 2 10% 16V X7R 201 34 33 VOLTAGE=3.3V MIN_LINE_WIDTH=0.30 MM MIN_NECK_WIDTH=0.20 MM 5% 1/20W MF 2 201 5% 1/20W MF 2 201 30 29 PP3V3_LCDVDD_SW_F 28 (LVDS DDC POWER) 35 SIA413DJ MOSFET IN 24 40 14 P-TYPE CHANNEL RDS(ON) 100MOHM @-1.5V IMAX 3 A VGS MAX +/- 8V LVDS_DDC_DATA IN 40 IN 2 LVDS_DATA_N<0> 90-OHM-50MA TCM0605 3 1 LVDS_DATA_P<0> LVDS_DATA_CONN_N<2> LVDS_DATA_CONN_P<2> 15 1 L2200 4 TP93 TP313 PART NUMBER ALTERNATE FOR PART NUMBER BOM OPTION REF DES 40 14 376S0961 376S0796 Q2200 RADAR:8403895 376S0903 376S0796 Q2200 RADAR:8403865 155S0583 155S0460 IN 2 LVDS_DATA_N<2> IN TP91 90-OHM-50MA TCM0605 3 TP92 TP329 TABLE_ALT_ITEM 40 14 TP328 L2232 COMMENTS: TABLE_ALT_ITEM B TP326 TP315 1 LVDS_DATA_P<2> =PPLED_REG 1 2 11 10 35 IN 35 IN 35 IN 35 IN 35 IN 35 IN 35 SYM_VER-2 RADAR:8376383 9 PPLED_BACK_REG NC LED_IO_6 LED_IO_5 LED_IO_4 LED_IO_3 LED_IO_2 LED_IO_1 BOARD_TEMP4_N 8 7 6 5 4 3 2 1 VOLTAGE=20.4V MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.2 MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM 4 TABLE_ALT_ITEM L2202,L2212,L2222,L2232,L5500,L5501,L5600,L5601,L5702,L5716 13 NC_LCD_PGAMMA FERR-240-OHM-25%-300MA SYM_VER-2 TABLE_ALT_HEAD 14 12 L2222 90-OHM-50MA TCM0605 2 3 LVDS_DATA_P<1> 16 LVDS_CLK_CONN_N 40 LVDS_CLK_CONN_P 0402 IN 17 40 32 40 14 19 4 SYM_VER-2 LVDS_DATA_N<1> 20 18 40 TP310 IN 22 40 TP311 40 14 LVDS_DATA_CONN_N<0> LVDS_DATA_CONN_P<0> LVDS_DATA_CONN_N<1> 40 LVDS_DATA_CONN_P<1> L2212 TP295 40 40 14 23 21 TP296 SIA413DJ C 26 25 40 14 27 BOARD_TEMP4 OUT B 31 TP314 TP330 L2202 TP316 40 14 40 14 IN IN 2 LVDS_CLK_N 1 90-OHM-50MA 3 TCM0605 100PF 2 1 LVDS_CLK_P C2233 TP312 4 1 C2220 820PF 10% 2 50V CERM 402 5% 50V CERM 402 SYM_VER-2 TP323 TP325 TP317 NOSTUFF RESISTORS ARE THERE TO INVESTIGATE POSSIBILITY OF REMOVING THE CHOKE A SYNC_MASTER=ALEX SYNC_DATE=N/A PAGE TITLE VIDEO: LVDS CONNECTOR DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 051-8962 SIZE D REVISION A.0.0 BRANCH PAGE 22 OF 106 SHEET 16 OF 42 1 A 7 6 =PP3V0_GRAPE_MARIO1 C3005 1 0.1UF QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL 10% 25V X5R 402 U3003 CRITICAL BOM OPTION 2 3 1 =PP3V0_GRAPE PP18V_GRAPE TABLE_5_HEAD PART# 4 C3007 C3053 1 0.1UF 1 0.1UF 10% 25V X5R 402 2 1 10% 25V X5R 402 2 17 18 32 32 1 C3006 R3025 10K 0.1UF 5% 1/20W MF 2 201 10% 6.3V 2 X5R 201 2 A6 17 5 F3 E9 B6 8 TABLE_5_ITEM TP280 VCC_DIG U3003 18 18 18 18 18 18 18 18 18 (TOUCH SCREEN) CONNECTORS TO GRAPE FLEX 18 18 18 18 18 P/N 518S0817 18 18 MATES WITH LEFTMOST GRAPE FLEX TAIL 18 K4 H5 I5 J8 J9 K8 J10 I10 H10 F11 C11 E10 NC NC NC NC A11 B4 A5 A2 Z1_BON_L<0> Z1_BON_L<1> Z1_BON_L<2> Z1_BON_L<3> Z1_BON_L<4> Z1_BON_L<5> C7 A7 B7 B8 A8 C8 J3010 502250-8237 41 39 F-RT-SM 18 18 C 17 TP142 TP140 17 TP160 TP150 18 18 TP151 TP152 18 18 TP149 TP158 18 18 TP145 TP156 18 18 TP154 TP159 18 18 TP157 TP162 18 18 TP161 TP165 18 18 TP164 TP166 18 MT_PANEL_OUT<36> MT_PANEL_OUT<38> MT_PANEL_IN<29> MT_PANEL_IN<27> MT_PANEL_IN<25> MT_PANEL_IN<23> MT_PANEL_IN<21> MT_PANEL_IN<19> MT_PANEL_IN<17> MT_PANEL_IN<15> MT_PANEL_IN<13> MT_PANEL_IN<11> MT_PANEL_IN<9> MT_PANEL_IN<7> MT_PANEL_IN<5> MT_PANEL_IN<3> MT_PANEL_IN<1> 37 35 33 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 36 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 MT_PANEL_OUT<37> MT_PANEL_OUT<39> 18 17 17 TP141 18 TP143 18 TP186 MT_PANEL_IN<28> MT_PANEL_IN<26> MT_PANEL_IN<24> MT_PANEL_IN<22> MT_PANEL_IN<20> MT_PANEL_IN<18> MT_PANEL_IN<16> MT_PANEL_IN<14> MT_PANEL_IN<12> MT_PANEL_IN<10> MT_PANEL_IN<8> MT_PANEL_IN<6> MT_PANEL_IN<4> MT_PANEL_IN<2> MT_PANEL_IN<0> 18 TP185 18 18 TP148 TP183 18 18 TP144 TP182 18 18 TP155 TP181 18 18 TP147 TP180 18 18 TP179 TP178 18 18 TP177 TP163 38 40 B C6 D3 D4 D5 D6 D8 D9 E4 E8 F4 F5 F8 NC F9 G3 G4 G9 H3 H4 H7 H8 H9 J6 K7 NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC TP146 TP184 18 18 18 BON_L0 BON_L1 BON_L2 BON_L3 BON_L4 BON_L5 A1 B2 C2 D1 VSTM0 BGA VSTM1 CRITICAL VSTM2 I DON’T WANT TO OMIT! Texas Instruments VSTM3 VSTM4 CD3240B0 VSTM5 VSTM6 VSTM7 VSTM8 VSTM9 VSTM10 VSTM11 VSTM12 VSTM13 VSTM14 VSTM15 VSTM16 VSTM17 VSTM18 VSTM19 VSTM20 VSTM21 VSTM22 VSTM23 VSTM24 VSTM25 VSTM26 VSTM27 VSTM28 VSTM29 VSTM30 VSTM31 VSTM32 VSTM33 VSTM34 VSTM35 VSTM36 VSTM37 VSTM38 VSTM39 VSTM40 VSTM41 VSTM42 VSTM43 VSTM44 VSTM46 VSTM45 VSTM47 MT_PANEL_OUT<0> 17 MT_PANEL_OUT<1> 17 MT_PANEL_OUT<2> 17 MT_PANEL_OUT<3> 17 MT_PANEL_OUT<4> 17 MT_PANEL_OUT<5> 17 MT_PANEL_OUT<6> 17 MT_PANEL_OUT<7> 17 MT_PANEL_OUT<8> 17 MT_PANEL_OUT<9> 17 MT_PANEL_OUT<10> 17 MT_PANEL_OUT<11> 17 MT_PANEL_OUT<12> 17 MT_PANEL_OUT<13> 17 MT_PANEL_OUT<14> 17 MT_PANEL_OUT<15> 17 MT_PANEL_OUT<16> 17 MT_PANEL_OUT<17> 17 MT_PANEL_OUT<18> 17 MT_PANEL_OUT<19> 17 MT_PANEL_OUT<20> 17 MT_PANEL_OUT<21> 17 MT_PANEL_OUT<22> 17 MT_PANEL_OUT<23> 17 MT_PANEL_OUT<24> 17 MT_PANEL_OUT<25> 17 MT_PANEL_OUT<26> 17 MT_PANEL_OUT<27> 17 MT_PANEL_OUT<28> 17 MT_PANEL_OUT<29> 17 MT_PANEL_OUT<30> 17 MT_PANEL_OUT<31> 17 MT_PANEL_OUT<32> 17 MT_PANEL_OUT<33> 17 MT_PANEL_OUT<34> 17 MT_PANEL_OUT<35> 17 MT_PANEL_OUT<36> 17 MT_PANEL_OUT<37> 17 MT_PANEL_OUT<38> 17 MT_PANEL_OUT<39> 17 D2 E2 F1 G1 G2 I1 H2 I2 K1 K2 I3 K3 J4 I4 K6 H6 K5 J5 I7 K9 I8 K10 I6 J7 K11 I9 J11 I11 H11 G11 G10 F10 C10 D10 E11 D11 B11 B10 C4 A4 B5 A3 C5 B3 17 TP106 TP104 17 17 TP110 TP108 17 17 TP115 TP113 17 17 TP119 TP117 17 17 TP124 TP122 17 17 TP128 TP126 17 17 TP133 A 17 TP131 17 17 TP137 TP135 17 TP112 TP121 TP103 TP101 17 17 TP105 17 17 TP111 1 TP125 10% 16V X5R 402 SOD-323 1 2 5% 1/20W MF 2 201 40 17 5 IN 40 17 5 IN 1 U3000 L NC 3 TP132 FB 4 CTRL 5 TPS61045 TP134 QFN-1 C3008 5% 25V NP0-C0G 201 2 1% 1/16W MF-LF 402 33PF R3031 10K 5% 1/20W MF 2 201 1 IN 1 0.1UF 10% 2 6.3V X5R 201 SPI_GRAPE_SCLK SPI_GRAPE_CS_L CRITICAL 3.3K 10% 2 6.3V X5R 201 5% 1/20W MF 2 201 VCCA VCCB 1 17 18 32 R3033 C 10K 5% 1/20W MF 2 201 U3007 PQFP1 6 1A1 8 2A1 4 1DIR 1 1OE* SPI_GRAPE_MOSI 7 1A2 9 2A2 5 2DIR 16 2OE* GRAPE_FW_DNLD_EN_L IN C3031 1 R3032 0.1UF DIR_U3007 TP269 40 17 5 C3030 1B1 15 13 Z1_SCLK OUT Z2_H_CS_L OUT 2B1 18 17 18 TO Z1/Z2 TP252 1B2 14 2B2 12 Z1_MISO OUT Z1_CS_OE OUT TP270 18 17 18 TP254 APN:311S0485 (A -> B) TP255 GND TP253 TP273 Z1_B_ADR<0> 18 Z1_B_ADR<1> 18 Z1_B_ADR<2> 18 CRITICAL IN IN Z1_CS_OE 1 17 18 32 B C3050 0.1UF 10% 6.3V 2 X5R 201 SN74LVC1G126DRYR-M LLP =PP3V0_GRAPE 1 OE 1 Z2_H_CS_L 2 A Y 4 GND 1 Z1_CS_L OUT 0.1UF 18 10% 6.3V 2 X5R 201 2 SN74LVC1G125DRYR-M R3066 C3000 1UF 1M U3009 TP275 LOAD CURRENT ~ 153UA 1 1 NC 0.1 1% 1/20W MF 201 40 17 5 PP18V_GRAPE 2 17 18 32 C3041 OUT SPI_GRAPE_MISO 6 LLP 17 3 MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM VOLTAGE=18V NET_SPACING_TYPE=PWR Z1_MOSI 2 4 NC 5 OE* IN 18 TP271 1 TP236 10% 2 25V X5R 603-1 18 17 IN Z1_CS_OE DO VR_BOOST_FBK PM_BOOST_EN 1 18 1 TP138 1 C3001 2.2UF THRML PAD SW 8 C3002 470PF TP234 10% 16V 2 X5R-X7R 201 R3012 71.5K 1% 1/20W MF 2 201 TABLE_ALT_HEAD PART NUMBER ALTERNATE FOR PART NUMBER BOM OPTION REF DES COMMENTS: 9 7 6 AGND_U3000 TP130 TP233 311S0523 311S0485 U3007 311S0524 311S0533 U3009 DRAWING NUMBER Apple Inc. TABLE_ALT_ITEM 311S0525 311S0532 U3010 R NOTICE OF PROPRIETARY PROPERTY: SM THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 1 TP232 5 4 3 SYNC_DATE=N/A GRAPE: GROUNDHOG,CONN,BOOST TABLE_ALT_ITEM 2 XW3000 6 SYNC_MASTER=RAMSIN PAGE TITLE TABLE_ALT_ITEM TP139 7 1 TP272 MIN_LINE_WIDTH=0.2MM 8 R3030 10K 6 PP18V_R_GRAPE R3009 18 =PP3V0_GRAPE VCC 1 IN VIN TP129 TP136 2 CRITICAL GRAPE_MISO SPI_GRAPE_MISO OUT U3010 B0520WSXG 2 0.1UF 10% 2 6.3V X5R 603 38 40 C3009 TP120 TP127 17 17 32 18 17 TP123 17 17 VLF =PP3V0_GRAPE TP118 17 17 VR_BOOST_SW 2 18 TP63 NET_SPACING_TYPE=PWR TP99 MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM VOLTAGE=18V D3000 18 TO Z2 OUT CRITICAL MIN_LINE_WIDTH=0.2MM 18 OUT 1 MIN_NECK_MIDTH SHOULD BE 0.4MM TP114 17 17 TP98 VR_BOOST_L 1 TP116 17 17 L3000 4.7UH-700MA-280MOHM TP109 17 17 MIN_LINE_WIDTH=0.2MM TP107 GRAPE_MOSI OUT RST_GRAPE_Z1_L MAKE_BASE=TRUE G8 G7 G6 G5 F7 F6 E7 E6 E5 E3 D7 C9 17 RST_GRAPE_L 3 MT_PANEL_OUT<1> MT_PANEL_OUT<3> MT_PANEL_OUT<5> MT_PANEL_OUT<7> MT_PANEL_OUT<9> MT_PANEL_OUT<11> MT_PANEL_OUT<13> MT_PANEL_OUT<15> MT_PANEL_OUT<17> MT_PANEL_OUT<19> MT_PANEL_OUT<21> MT_PANEL_OUT<23> MT_PANEL_OUT<25> MT_PANEL_OUT<27> MT_PANEL_OUT<29> MT_PANEL_OUT<31> MT_PANEL_OUT<33> MT_PANEL_OUT<35> BOOST CONVERTOR 18 TP284 40 17 5 18 17 17 PGND TP100 IN =PP3V0_GRAPE GND 17 TP102 IN 6 RST_GRAPE_Z2_L 18 17 MT_PANEL_OUT<0> MT_PANEL_OUT<2> MT_PANEL_OUT<4> MT_PANEL_OUT<6> MT_PANEL_OUT<8> MT_PANEL_OUT<10> MT_PANEL_OUT<12> MT_PANEL_OUT<14> MT_PANEL_OUT<16> MT_PANEL_OUT<18> MT_PANEL_OUT<20> MT_PANEL_OUT<22> MT_PANEL_OUT<24> MT_PANEL_OUT<26> MT_PANEL_OUT<28> MT_PANEL_OUT<30> MT_PANEL_OUT<32> MT_PANEL_OUT<34> MAKE_BASE=TRUE 18 OUT TP245 F-RT-SM 36 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 SPI_GRAPE_MOSI GRAPE_SCLK OUT GRAPE_CS_L MAKE_BASE=TRUE MAKE_BASE=TRUE 502250-8237 37 35 33 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 MAKE_BASE=TRUE D 40 17 5 GND J3011 SPI_GRAPE_SCLK SPI_GRAPE_CS_L NC NC NC NC NC NC NC NC A_AD_R0 A10 A_AD_R1 B9 A_AD_R2 A9 MATES WITH RIGHTMOST GRAPE FLEX TAIL 41 39 IN 2 18 MUX0 MUX1 MUX2 MUX3 MUX4 MUX5 MUX6 MUX7 MUX8 MUX9 MUX10 MUX11 MUX12 MUX13 MUX14 MUX15 MUX16 MUX17 MUX18 MUX19 MUX20 MUX21 MUX22 MUX23 40 17 5 10 D 18 B1 C1 E1 F2 H1 J1 J2 J3 MUX_IN<0> MUX_IN<1> MUX_IN<2> MUX_IN<3> MUX_IN<4> MUX_IN<5> MUX_IN<6> MUX_IN<7> MUX_IN<8> MUX_IN<9> MUX_IN<10> MUX_IN<11> MUX_IN<12> MUX_IN<13> MUX_IN<14> MUX_IN<15> MUX_IN<16> MUX_IN<17> MUX_IN<18> MUX_IN<19> IN 6 18 GROUNDHOG 40 17 5 SN74AVCH4T245RSV VDDH 11 IC,ASIC,GROUNDHOG B0,120B BGA 3 1 5 343S0525 2 051-8962 SIZE D REVISION A.0.0 BRANCH PAGE 30 OF 106 SHEET 17 OF 42 1 A 8 7 5 =PP3V0_GRAPE_Z2 1 C3107 R3101 1 VOLTAGE=1.8V NET_SPACING_TYPE=PWR 1 C3112 2.2UF 20% 4V 2 X5R 402 1 C3110 0.1UF 1 10% 6.3V 2 X5R 201 C3108 C3106 22UF Z1_1V8_OUT 18 MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM VOLTAGE=1.8V NET_SPACING_TYPE=PWR 1% 1/20W MF 201 C3191 1 0.1UF 10% 6.3V 2 X5R 201 10% 6.3V 2 X5R 201 1.00 2 1 Z2_3V3_1V8_IN 1 0.1UF 5% 1/20W MF 201 R3190 MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM 4.7 2 VOLTAGE=3.0V MIN_LINE_WIDTH=0.2MM NET_SPACING_TYPE=PWR 1 C3104 2.2UF 20% 2 4V X5R 402 1 A7 NC A8 NC B8 NC C8 NC B7 NC C7 NC A6 NC B6 NC C6 NC C5 NC B5 NC A5 NC A4 NC B4 NC A3 NC B3 NC C2 NC A2 NC C CFG0 MODE 0 0 DEPENDENT 1 0 1 DEPENDENT 2 1 0 AUTONOMOUS 1 1 SLAVE B2 NC C1 NC B1 NC A1 NC E6 NC K48 USES DEPENDENT 2 MODE BOOT_CFG0_R BOOT_CFG1_R TP298 1 NC R3173 NC 0 5% 1/20W MF 2 201 NC U3101 B 1 J8 H9 J9 H7 J7 H5 GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 J2 J3 H4 J6 G3 F3 F4 H6 JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS G6 E8 E9 F7 H_CS* H_SCLK H_SDI H_SDO H1 J1 H3 J4 A_CS* A_SCLK A_SDI A_SDO F1 G1 F2 G4 TM0 TM1 E7 D4 CLKIN CLKOUT E5 E4 RESET* D5 BROADCOM BCM5974CKFBGH IN2_0 IN2_1 FBGA IN3_0 IN3_1 IN4_0 IN4_1 IN5_0 IN5_1 IN6_0 IN6_1 IN7_0 IN7_1 IN8_0 IN8_1 IN9_0 IN9_1 IN10_0 IN10_1 IN11_0 IN11_1 ARMTAPMD* BOOT_CFG0 BOOT_CFG1 G5 F5 FLOO LFOO EXTFLLIN INTERNAL PU R3171 0 BON_L0 BON_L1 BON_L2 BON_L3 BON_L4 BON_L5 CRITICAL F6 D3 G7 B_ADR0 B_ADR1 B_ADR2 F9 F8 G9 IN0_0 IN0_1 IN1_0 IN1_1 0 5% 1/20W MF 201 VDDIO VDDLDO 1 Z1_PCLK 17 17 Z1_CS_OE IN 2 17 17 18 17 =PP3V0_GRAPE_Z2 NOSTUFF Z1_CS_OE_R NC_BON_L1 NC_BON_L2 NC_BON_L3 NC_BON_L4 Z2_BON_L4 1 R3161 17 18 32 17 17 100K NOTE: PLATEFORM DETECTION PIN "H5" PULL DOWN = K48 FLOATING = K93/K94 PULL UP = RESERVED FOR FUTURE 5% 1/20W MF 2 201 TP285 17 17 17 OUT OUT 5 17 17 17 18 17 1 18 GRAPE_CS_L GRAPE_MOSI GRAPE_MISO GRAPE_SCLK IN 17 IN 17 OUT 17 IN 17 R3160 17 100K 17 5% 1/20W MF 2 201 17 17 17 17 TP_U3101_TCK TP_U3101_TDI TP_U3101_TDO TP_U3101_TMS TP283 17 TP287 17 TP286 17 =PP3V0_GRAPE TP281 Z2_H_CS_L IN Z1_SCLK IN Z1_MISO IN Z1_MOSI OUT Z2_A_CS_L TP_Z2_A_SCLK TP_Z2_A_SDI TP_Z2_A_SDO TP_U3101_TM0 U3101_TM1 17 1 17 17 R3107 100K 17 18 17 5% 1/20W MF 2 201 17 18 17 18 17 17 17 R3180 TP291 TP290 1 TP289 100 17 17 2 17 5% 1/32W MF 01005 TP288 17 17 17 TP282 HOST_REFCLK CLK_32K_PMU MAKE_BASE=TRUE NC 17 18 32 17 IN 35 39 17 17 RST_GRAPE_Z2_L TP299 IN 17 17 17 GND 2 17 17 IRQ_GRAPE_HOST_INT_L PM_BOOST_EN Z1_GO Z1_DONE 17 17 17 17 TP307 32 18 17 17 TP243 =PP3V0_GRAPE TP306 17 17 17 C3103 D 0.1UF 10% 2 6.3V X5R 201 D1 IN0 D2 IN1 D3 IN2 MT_PANEL_IN<0> MT_PANEL_IN<1> MT_PANEL_IN<2> MT_PANEL_IN<3> MT_PANEL_IN<4> MT_PANEL_IN<5> MT_PANEL_IN<6> MT_PANEL_IN<7> MT_PANEL_IN<8> MT_PANEL_IN<9> MT_PANEL_IN<10> MT_PANEL_IN<11> MT_PANEL_IN<12> MT_PANEL_IN<13> MT_PANEL_IN<14> MT_PANEL_IN<15> MT_PANEL_IN<16> MT_PANEL_IN<17> MT_PANEL_IN<18> MT_PANEL_IN<19> MT_PANEL_IN<20> MT_PANEL_IN<21> MT_PANEL_IN<22> MT_PANEL_IN<23> MT_PANEL_IN<24> MT_PANEL_IN<25> MT_PANEL_IN<26> MT_PANEL_IN<27> MT_PANEL_IN<28> MT_PANEL_IN<29> MUX_IN<0> MUX_IN<1> MUX_IN<2> MUX_IN<3> MUX_IN<4> MUX_IN<5> MUX_IN<6> MUX_IN<7> MUX_IN<8> MUX_IN<9> MUX_IN<10> MUX_IN<11> MUX_IN<12> MUX_IN<13> MUX_IN<14> MUX_IN<15> MUX_IN<16> MUX_IN<17> MUX_IN<18> MUX_IN<19> =PP3V0_GRAPE U3100 E3 IN6 E4 IN7 F1 IN8 C3107 RADAR:8392120 138S0618 138S0648 C3107 BOM CONSOLIDATION PCLK A10 Z1_PCLK 18 IN 17 18 IN 17 IN 17 18 OUT 17 18 TP248 18 TP279 18 Z1_STMIN Wites OM Tesla NOTE:WARNING!!! VERY IMPORTANT IF THIS JUMPER IS REMOVED ON BOARD TOUCH WILL NOT WORK IF SO JUMPER B9 AND B10 ON THE IC! G4 IN15 G5 IN16 H1 IN17 H2 IN18 H3 IN19 H4 IN20 H5 IN21 J1 IN22 K1 IN23 J2 IN24 B_ADR0 B2 B_ADR1 B3 B_ADR2 B4 Z1_B_ADR<0> Z1_B_ADR<1> Z1_B_ADR<2> BON_L0 A1 BON_L1 A2 BON_L2 A3 Z1_BON_L<0> Z1_BON_L<1> Z1_BON_L<2> Z1_BON_L<3> Z1_BON_L<4> Z1_BON_L<5> BON_L3 A4 BON_L4 A5 BON_L5 B1 K2 IN25 J3 IN26 K3 IN27 INTERNAL PU 17 C TP238 17 TP241 17 TP237 TM B8 U3100_TM 17 17 TP240 TP242 17 17 TP235 TP244 17 TP246 17 TP239 TP247 RST_GRAPE_Z1_L RESET* C5 K5 IN31 K6 IN32 J6 IN33 R3181 J7 IN34 K7 IN35 J8 IN36 5% 1/32W MF 01005 1 100 2 17 TP257 K8 IN37 J9 IN38 K9 IN39 J10 IN40 K10 IN41 H6 IN42 H7 IN43 B H8 IN44 H9 IN45 H10 IN46 G6 IN47 G7 IN48 G8 IN49 G9 IN50 G10 IN51 F7 IN52 F8 IN53 F9 IN54 F10 IN55 E7 IN56 E8 IN57 E9 IN58 E10 IN59 D7 IN60 D8 IN61 D9 IN62 D10 IN63 GNDDIG GNDIO F6 138S0648 Z1_GO Z1_DONE STMOUT B9 STMIN B10 E6 COMMENTS: GO B5 DONE B6 G1 IN12 G2 IN13 G3 IN14 C9 D6 REF DES TP278 Z1_SCLK Z1_CS_L Z1_MISO Z1_MOSI TP249 F2 IN9 F3 IN10 F4 IN11 C2 138S0652 BOM OPTION 5% 1/20W MF 2 201 MOSI A6 BGA-HF J4 IN28 K4 IN29 J5 IN30 R3155 100K SCLK A9 CS* A8 MISO A7 BROADCOM BCM5973 GNDANA TABLE_ALT_HEAD ALTERNATE FOR PART NUMBER 17 18 32 TP251 CRITICAL D4 IN3 E1 IN4 E2 IN5 NC NC NC NC NC NC NC NC NC NC NC NC NC NC PART NUMBER 2.2UF 1 17 C3 C4 D6 D7 D8 C9 D9 G2 D1 H8 CFG1 E2 E3 G8 H2 J5 E1 D2 A9 NC B9 NC R3120 C3101 20% 2 4V X5R 402 VDDANA VDDANA VDDCORE 1 TP250 MIN_NECK_MIDTH SHOULD BE 0.4MM 20% 6.3V 2 X5R-CERM 603 TP276 Z1_1V8_OUT MT_3V3_INT C1 TP277 18 0.1UF 20% 6.3V 2 X5R 402 TP308 VOLTAGE=1.8V MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR C3102 10% 2 6.3V X5R 201 4.7UF V18 C6 1 C3 10% 6.3V 2 X5R 201 C4 0.1UF 10% 6.3V 2 X5R 201 Z2_VDDANA D C3105 1 0.1UF VDDIO VDDANA AND VDDCORE ARE EACH GENERATED WITHIN Z2 AND BYPASSED OUTSIDE C3109 1 C8 20% 6.3V 2 X5R 603 B7 10UF F5 C3111 1 TP274 =PP3V0_GRAPE_Z1 VDDDIG C7 1 NET_SPACING_TYPE=PWR 32 18 32 E5 VOLTAGE=1.8V 2 3 ZEPHYR 1+ ASIC TP292 Z2_VDDCORE MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.1MM 4 C10 D5 ARM9 MCU (Z2 BASED) 6 TABLE_ALT_ITEM A TABLE_ALT_ITEM SYNC_MASTER=RAMSIN PAGE TITLE SYNC_DATE=N/A GRAPE: Z1, Z2 DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 051-8962 SIZE D REVISION A.0.0 BRANCH PAGE 31 OF 106 SHEET 18 OF 42 1 A 8 7 6 5 4 2 3 1 L63 AUDIO CODEC APN:338S0940 D 32 20 32 =PP1V7_VA_VCP =PPVCC_MAIN_AUDIO 1 C3605 27PF 0.1UF C3602 1 0.1UF 20% 4V X5R 2 01005 C3603 1 1 1 10UF 20% 4V X5R 2 01005 1 C3606 1 10UF C3607 0.1UF 20% 4V 2 X5R 402 20% 4V 2 X5R 01005 1 C3608 4.7UF 20% 4V 2 TANT 402-3 C3604 0.1UF TP579 10% 6.3V 2 X5R 201 GND_AUDIO_CODEC VD B11 20% 6.3V X5R 2 603 XW3600 VCP D11 C3601 VP F5 2 VA G2 1 10% 6.3V X5R 01005 5% 16V 2 NP0-C0G 01005 VL C11 C3600 1000PF 1 1 SM 1 39 5 TP557 TP562 I2C0_SDA_1V8 C7 SDA HPOUTB G9 HP_R OUT 21 OUT IRQ_CODEC_L E4 HPOUTA G10 HP_L OUT 21 IN RST_L63_L E5 RESET* HPOUT_REF F9 OUT AUD_MIK_HS1_INT_L E3 WAKE* LINEOUT1B G8 LINEOUT1A F8 IN IN 39 5 IN 39 5 IN 39 5 OUT TP445 39 30 5 39 30 5 TP444 IN 39 30 5 IN OUT TP441 OUT I2S_AP_0_LRCK I2S_AP_0_BCLK I2S_AP_0_DOUT I2S_AP_0_DIN 25 OUT 25 DMIC_SD_SENSOR IN DMIC_SD_CANADA 39 5% 1/32W MF 01005 1 5% 1/32W 2 R3620 22 NOSTUFF C9 VSP_LRCLK C10 VSP_SLCLK A11 VSP_SDIN 22 2 39 22 2 39 5% 1/32W MF 01005 MF 01005 R3621 22 1 5% 1/32W 2 MF 01005 1 5% 1/32W 2 23 OUT 23 IN HSMIC_C_P 40 23 IN 40 23 IN 23 IN A10 VSP_SDOUT B6 XSP_LRCLK A6 XSP_SCLK A8 XSP_SDIN/DAC2B_MUTE A7 XSP_SDOUT L63_XSP_SDOUT DMIC_SCLK_CODEC DMIC_SD_CODEC B5 DMIC_SCLK A5 DMIC_SD NC_LINE_IN1_CODEC C5 LINEINA NC_LINE_IN1_REF_CODEC C4 LINEINA_REF MF 01005 NC_MIC1N_CODEC B3 MIC1_REF NC_MIC1_FILT_CODEC E2 MIC1_BIAS_FILT MIC2_DET 2 RIGHT_CH_OUT_P RIGHT_CH_OUT_REF EAROUT+ G3 EAROUT- F3 NC_EAROUT_AP NC_EAROUT_AN SPEAKEROUTA+ F6 SPEAKEROUTA- G6 NC_SPEAKEROUT_AP NC_SPEAKEROUT_AN SPEAKEROUTB+ F4 SPEAKEROUTB- G4 NC_SPEAKEROUT_BP NC_SPEAKEROUT_BN FILT+ G1 21 23 21 OUT 21 IN 21 C TP629 TP630 TP628 OUT 20 40 IN 20 40 TP593 TP596 OUT 20 40 IN 20 40 TP594 TP595 C3617 2.2UF 2 C3618 20% 10V X5R-CERM 402 VHP_FLYC SPKR_VQ 2.2UF 1 2 20% 10V X5R-CERM 402 NOT USING SPEAKER AMPLIFIER, THIS CAN BE A NO STUFF FILT_P B D3 MIC2_DETECT B2 MIC2_REF 1.00K2 MIC2_DET_REF C3 MIC2_DETECT_REF 1 1% 1/32W MF 01005 TP563 LINEOUT2B F7 LINEOUT2B_REF G7 IN OUT 24 B1 MIC2 1/32W MF 01005 R3605 HSMIC_C_N LEFT_CH_OUT_P LEFT_CH_OUT_REF IN C2 MIC2_BIAS 1% EXT_MIC_REF LINEOUT2A D7 LINEOUT2A_REF E7 FLYN G11 VHP_FLYN NC_MIC1P_CODEC 1.00K CODEC_LINE_OUT_REF SPEAKER_VQ E6 A3 MIC1 EXT_MIC_P HP_REF CODEC_LINE_OUT_R CODEC_LINE_OUT_L 1 D4 MIC1_BIAS R3604 HP_DET LINEOUT1_REF E8 FLYC F11 NC_MIC1_BIAS_CODEC 1 HP_DETECT E9 FLYP E11 VHP_FLYP D6 LINEINB D5 LINEINB_REF NC_LINE_IN2_CODEC NC_LINE_IN2_REF_CODEC TP582 TP583 EXT_MIC_BIAS L63_VSP_SDOUT R3603 1 R3622 22 B L63_ASP_SDOUT 5% 1/32W MF 01005 IN IN 2 R3602 1 TP22 25 22 5% 1/32W MF 01005 39 5 DMIC_SCLK_CANADA C8 ASP_LRCLK B7 ASP_SCLK B8 ASP_SDIN A9 ASP_SDOUT R3601 1 I2S_AP_2_LRCK I2S_AP_2_BCLK I2S_AP_2_DOUT I2S_AP_2_DIN TP21 INT* B9 MCLK I2S_AP_0_MCK_R I2S_AP_3_LRCK I2S_AP_3_BCLK IN I2S_AP_3_DOUT 39 5 IN 39 5 OUT I2S_AP_3_DIN NOSTUFF R3608 22 1 2 DMIC_SCLK_SENSOR 39 5 TP440 25 IN 39 30 5 TP442 21 23 BI TP556 TP560 GND_AUDIO_HP_AMP I2C0_SCL_1V8 TP581 39 5 MIN_LINE_WIDTH=1.0MM MIN_NECK_WIDTH=0.2MM IN TP549 C 2 C6 SCL TP467 35 2 XW3602 WLCSP 35 TP580 SM I2C ADDRESS: 1001010X?? 5 2 XW3601 U3600 39 35 10 5 19 21 SM CS42L63B 39 35 10 5 D 32 =PP1V8_AUDIO +VCP_FILT D10 VHPPFILT -VCP_FILT F10 VHPNFILT MIC2_BIAS_FILT C1 MIC2_BIAS_FILT D2 MIC3A_BIAS A1 MIC3A 2.2UF RECOMMENDED A2 MIC3A_REF C3614 D1 MIC3A_BIAS_FILT C3613 10UF GND 20% 6.3V 2 X5R 603 C3615 20% 2 6.3V X5R-CERM 402 1UF 10% 2 6.3V TANT 402-1 D9 D8 G5 GNDP 1 4.7UF F2 GNDA C3609 B10 GNDD 20% 6.3V X5R-CERM 2 402 A 1 E1 MIC3B_BIAS_FILT E10 GNDCP 1 CRITICAL 1 B4 MIC3B_REF C3616 4.7UF 20% 6.3V X5R 2 603 A4 MIC3B 4.7UF 1 10UF F1 MIC3B_BIAS C3611 CRITICAL 1 SYNC_MASTER=LENG PAGE TITLE 20% 6.3V X5R-CERM 2 402 DRAWING NUMBER TP597 TP564 TP623 21 19 GND_AUDIO_CODEC Apple Inc. TP631 R MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM NOTICE OF PROPRIETARY PROPERTY: MAX_NECK_LENGTH=75 MM THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 SYNC_DATE=N/A AUDIO: L63 CODEC 4 3 2 051-8962 SIZE D REVISION A.0.0 BRANCH PAGE 36 OF 106 SHEET 19 OF 42 1 A 8 7 6 5 4 2 3 GAIN 12DB 9DB 6DB 3DB 0DB D SPEAKER AMPLIFIER 1 APN:353S2958 TURN ON TIME: 7.5MS TURN ON DELAY: 20MS 80HZ +/- XXX% XW3701 =PPVCC_MAIN_AUDIO 1 MIN_LINE_WIDTH=0.30MM MIN_NECK_WIDTH=0.20MM 2 0.1UF 1 LEFT_CH_OUT_P 100 40 1 40 20 5 IN SSM2375_L_IN_N 2 0.047UF LEFT_CH_P 2 1 40 A2 SD* SSM2375_L_IN_P 603 OUT+ C3 OUT- B3 GAIN A3 MIN_LINE_WIDTH=0.50MM MIN_NECK_WIDTH=0.20MM SPKRAMP_L_OUT_P SPKRAMP_L_OUT_N MIN_LINE_WIDTH=0.50MM MIN_NECK_WIDTH=0.20MM SSM2375_L_GAIN OUT 20 OUT 20 GND CRITICAL R3702 20% 10V 2 X5R EDGE B2 10% 6.3V X5R 201 AUD_SPKRAMP_MUTE_L WLCSP C3704 10UF 0% 1/32W MF 01005 2 SSM2375 B1 IN+ A1 IN- 1 0.00 U3700 C3701 1% 1/32W MF 01005 C X5R 201 R3703 1 VDD C1 IN 2 2 10% 6.3V X5R 201 R3701 40 19 10% 6.3V 0.047UF LEFT_CH_OUT_REF 1 C2 C3703 CRITICAL C3702 OUT SPEAKER CONNECTOR APN 518S0521 100K 5% 1/32W MF 01005 2 0% 1/32W MF 01005 2 M-RT-SM 5 XW3700 SM TP190 TP191 GND_SPKR_AMP1 2 MIN_LINE_WIDTH=0.30MM MIN_NECK_WIDTH=0.20MM 20 20 20 TP222 20 TP187 1 2 3 4 NOSTUFF CRITICAL NOSTUFF CRITICAL 1 1 C3750 16V 16V 2 NP0-C0G 01005 16V 1 100PF 5% 16V 2 NP0-C0G 01005 2 TP229 TP189 MIN_LINE_WIDTH=0.30MM MIN_NECK_WIDTH=0.20MM AUD_SPKR_AMP2_PBUS 2 C3753 1 5% NP0-C0G 01005 SM NOSTUFF CRITICAL 100PF XW3711 1 01005 NOSTUFF CRITICAL C3751 6 5% 2 NP0-C0G SPEAKER AMPLIFIER 2 C3752 100PF 5% =PPVCC_MAIN_AUDIO TP188 SPKRAMP_L_OUT_P SPKRAMP_L_OUT_N SPKRAMP_R_OUT_P SPKRAMP_R_OUT_N 100PF L63 LINEOUT2A IS CONNECTED TO U3700 L63 LINEOUT2B IS CONNECTED TO U3710 J3700 78171-0004 1 TP223 C TP225 GAIN:6DB R3700 1 1 0.00 32 20 19 D AUD_SPKR_AMP1_PBUS LEFT CHANNEL IS INVERTED TO FIX CODEC BUG ON LINEOUT2 40 19 GND NC 47K NC NC SHORT VDD 47K NC SHORT NC NC TP224 SM 32 20 19 1 TP192 R37131 C3713 0.1UF 10% CRITICAL IN RIGHT_CH_OUT_P 2 1 40 RIGHT_CH_P 2 1% 1/32W MF 01005 40 19 OUT 1 10% 6.3V X5R 201 RIGHT_CH_OUT_REF 40 VDD 2 U3710 SSM2375_R_IN_P C3712 0.047UF 1 40 WLCSP A2 SD* B C3714 10UF 20% 10V 2 X5R 603 SPKRAMP_R_OUT_P SPKRAMP_R_OUT_N A3 SSM2375_R_GAIN OUT+ C3 OUT- B3 GAIN MIN_LINE_WIDTH=0.50MM MIN_NECK_WIDTH=0.20MM MIN_LINE_WIDTH=0.50MM MIN_NECK_WIDTH=0.20MM OUT 20 OUT 20 EDGE B2 SSM2375_R_IN_N GND 10% 6.3V X5R 201 AUD_SPKRAMP_MUTE_L 1 SSM2375 B1 IN+ A1 IN- CRITICAL 2 TP267 20 5 X5R 201 0.047UF 0% 1/32W MF 01005 2 TP256 C1 40 19 100 6.3V C3711 R3711 0.00 1 C2 B GAIN:6DB R37121 0.00 0% 1/32W MF 01005 2 XW3710 SM TP231 1 2 MIN_LINE_WIDTH=0.30MM MIN_NECK_WIDTH=0.20MM GND_SPKR_AMP2 TP230 A SYNC_MASTER=LENG PAGE TITLE SYNC_DATE=N/A AUDIO: SPEAKER AMP DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 051-8962 SIZE D REVISION A.0.0 BRANCH PAGE 37 OF 106 SHEET 20 OF 42 1 A 8 7 6 5 4 3 2 1 HEADPHONE OUTPUT ZOBEL NETWORK XW3851 D D SM 19 HP_L IN 1 AUD_HP1_MLBCON_L OUT 2 24 XW3850 SM 19 HP_R IN 1 R3850 1 1 100 1 10% 6.3V 2 X5R 201 23 19 23 19 OUT 24 R3851 1% 1/32W MF 2 01005 1 C3853 1 27PF 1 C3852 27PF 5% 2 16V NP0-C0G 01005 HP_ZL HP_ZR C3850 OUT 100 1% 1/32W MF 01005 2 33000PF AUD_HP1_MLBCON_R 2 5% 16V 2 NP0-C0G 01005 C3851 33000PF 10% 2 6.3V X5R 201 GND_AUDIO_HP_AMP HP_REF IN C 1 C C3854 27PF 5% 16V 2 NP0-C0G 01005 DOCK LINE OUTPUT XW3800 SM 19 B OUT CODEC_LINE_OUT_REF MIN_LINE_WIDTH=0.1MM MIN_NECK_WIDTH=0.07MM 1 2 MIN_LINE_WIDTH=0.1MM MIN_NECK_WIDTH=0.07MM 19 IN IN CODEC_LINE_OUT_L MIN_LINE_WIDTH=0.1MM MIN_NECK_WIDTH=0.07MM 1 MIN_LINE_WIDTH=0.1MM MIN_NECK_WIDTH=0.07MM 2 SM CODEC_LINE_OUT_R MIN_LINE_WIDTH=0.1MM MIN_NECK_WIDTH=0.07MM 1 AV_EMI_DIFF_SENSE AUDIO_EMI_LO_L IN 28 OUT 28 B AUDIO_EMI_LO_R 15PF C3802 15PF C3803 28 DOCK 1 15PF NOSTUFF 1 5% 16V NP0-C0G-CERM 2 01005 XW3803 OUT C3801 5% 16V 2 NP0-C0G-CERM 01005 C3800 1 0.01UF 5% 16V NP0-C0G-CERM 2 01005 10% 10V 2 X7R 201 SM 1 MIN_LINE_WIDTH=0.1MM MIN_NECK_WIDTH=0.07MM MIN_LINE_WIDTH=0.1MM MIN_NECK_WIDTH=0.07MM 2 CODEC GND_AUDIO_CODEC 1.00 2 XW3802 1 19 1 1% 1/20W MF 201 XW3801 SM 19 R3800 AUD_LO_REF_FILT MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM 2 GND_AUDIO_PT_DK IN 28 MAX_NECK_LENGTH=75 MM A SYNC_MASTER=LENG SYNC_DATE=N/A PAGE TITLE AUDIO: HEADPHONE OUT DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 051-8962 SIZE D REVISION A.0.0 BRANCH PAGE 38 OF 106 SHEET 21 OF 42 1 A 8 7 6 5 4 3 2 1 D D C C B B A SYNC_MASTER=LENG PAGE TITLE SYNC_DATE=N/A AUDIO: BLANK DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 051-8962 SIZE D REVISION A.0.0 BRANCH PAGE 39 OF 106 SHEET 22 OF 42 1 A 8 7 6 5 4 2 3 1 D D EXTERNAL (HEADSET) MIC INPUT CIRCUITRY TP569 32 =PP3V0_S2R_HALL_CHSW 1 C4200 0.1UF CHS_CLAMPI A1 10% 2 6.3V X5R 201 VDD R4203 U4200 TS3A8235YFP 1 WCSP C AUD_HS_MIC1_HI FROM HEADSET 24 C4216 33PF 1 5% 16V NP0-C0G 2 01005 C4212 15PF 5% 16V NP0-C0G-CERM 2 01005 C3 B3 GND 24 24 21 19 21 19 B OUT RAMPO CLAMPI D3 C4 CLAMPO B4 CHS_CLAMPO MIC REF D2 D1 HSMIC_C_P HSMIC_C_N SCL SDA ADDR A3 A4 A2 B1 MIC1 C1 MIC2 1 AUD_HS_MIC1_LO IN RAMPI D4 R4202 1 R4201 2.2K 2 1 1% 1/20W MF 201 1K 2 EXT_MIC_BIAS IN 5% 1/20W MF 201 HSMIC_C_P C4211 0.1UF 1 1 2 C4201 470 1 EXT_MIC_P 2 1% 1/20W MF 201 1 C4213 0.1UF 1 2 10% 6.3V X5R 201 1000PF HSMIC_R_N 1 19 40 470 2 EXT_MIC_REF OUT 19 40 HSMIC_C_N OUT 19 2319 23 1% 1/20W MF 201 CHS_SCL CHS_SDA 10 10 EXT MIC LPF FC = 677KHZ XW4200 SM 1 OUT C TO CODEC AUD_HS_RET2 HP_REF 19 2319 23 R4213 AUD_HS_RET1 GND_AUDIO_HP_AMP OUT C4217 10% 2 16V X7R 201 10UF 20% 6.3V 2 CERM-X5R 0402-1 19 R4212 HSMIC_R_P 10% 6.3V X5R 201 GND2 GND1 IN 1% 1/20W MF 201 B2 C2 24 2.2K 2 2 B A SYNC_MASTER=LENG SYNC_DATE=N/A PAGE TITLE AUDIO: DETECT/MIC BIAS DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 051-8962 SIZE D REVISION A.0.0 BRANCH PAGE 42 OF 106 SHEET 23 OF 42 1 A 8 7 6 5 4 2 3 1 D D HEADPHONE JACK CONNECTION IS ON FRONT PANEL FLEX, CSA 55/PDF 29 PLACE ALL COMPONENTS NEAR J5501 L4301 30-OHM-1.7A 25 IN CONN_AUD_HS_MIC1_HI IN C 25 25 IN CONN_AUD_HS_RET1 IN CONN_AUD_HS_RET2 30-OHM-1.7A 1 MIN_LINE_WIDTH=1.0MM MIN_NECK_WIDTH=0.1MM 2 IN AUD_HS_MIC1_LO 0402 MAKE_BASE=TRUE MIN_LINE_WIDTH=1.0MM MIN_NECK_WIDTH=0.1MM MAKE_BASE=TRUE MIN_LINE_WIDTH=1.0MM MIN_NECK_WIDTH=0.1MM OUT 0201 AUD_HS_RET1 OUT 23 AUD_HS_RET2 OUT 23 AUD_HP1_DET_H 2 23 C L4304 OUT 24 AUD_HP1_MLBCON_R IN 21 AUD_HP1_MLBCON_L IN 21 30-OHM-1.7A CONN_AUD_HP1_MLBCON_R 1 2 0402 OUT OUT L4303 1 TP609 25 23 240-OHM-0.2A-0.8-OHM CONN_AUD_HP1_DET_H TP604 25 OUT TP603 TP602 25 AUD_HS_MIC1_HI L4302 TP589 CONN_AUD_HS_MIC1_LO MIN_LINE_WIDTH=1.0MM MIN_NECK_WIDTH=0.1MM MIN_NECK_WIDTH=0.1MM MIN_LINE_WIDTH=1.0MM 2 0402 MIN_LINE_WIDTH=1.0MM MIN_NECK_WIDTH=0.1MM 25 1 L4306 30-OHM-1.7A CONN_AUD_HP1_MLBCON_L 1 2 0402 HEADSET JACK INSERTION DETECT R4312 B 24 IN AUD_HP1_DET_H 1 3.3K 2 5% 1/32W MF 01005 HP_DET OUT B 19 NOSTUFF 1 C4310 4700PF 10% 10V 2 X7R 201 A SYNC_MASTER=LENG SYNC_DATE=N/A PAGE TITLE AUDIO: HP/MIC FILTERS DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 051-8962 SIZE D REVISION A.0.0 BRANCH PAGE 43 OF 106 SHEET 24 OF 42 1 A 8 7 6 5 4 2 3 1 D D CANADA FLEXES CONN. SENSOR BOARD CONN ALIASES APN: 518S0817 J5501 39 27 40 27 CRITICAL TP559 41 39 40 27 26 C OUT 24 OUT 24 24 TP612 TP608 IN 31 OUT IN 24 OUT 26 OUT 39 26 BI 39 26 BI 26 IN PPVSIM SIM_CLK_FILT SIM_DET CONN_AUD_HS_MIC1_HI CONN_AUD_HS_MIC1_LO CONN_AUD_HP1_MLBCON_R CONN_AUD_HP1_DET_H IRQ_ALS_INT_CONN_L I2C2_SDA_3V0_ALS ISP_CAM_1_SDA PM_FRONT_CAM_SHUTDOWN_FILT MAKE_BASE=TRUE MAKE_BASE=TRUE CONN_CLK_CAM_RF_FILT CONN_MIPI0C_CAM_DATA_N<0> CONN_MIPI0C_CAM_DATA_P<0> 27 27 27 MAKE_BASE=TRUE 40 27 MIPI0C_CAM_CLK_N MIPI0C_CAM_CLK_P 7 PM_REAR_CAM_SHUTDOWN 40 27 31 26 CLK_CAM_RF_FILT MIPI0C_CAM_DATA_N<0> MIPI0C_CAM_DATA_P<0> 37 35 33 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 36 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 TP588 SIM_RST SIM_IO CONN_AUD_HS_RET1 CONN_AUD_HS_RET2 CONN_AUD_HP1_MLBCON_L DMIC_SCLK_CANADA I2C2_SCL_3V0_ALS DMIC_SD_CANADA ISP_CAM_1_SCL PP3V0_ALS CLK_CAM_FF_CONN PP1V8_CAM_FF PP2V85_CAM_FF MIPI1C_CAM_CLK_P MIPI1C_CAM_CLK_N MIPI1C_CAM_DATA_P<0> MIPI1C_CAM_DATA_N<0> IN BI 31 27 31 27 OUT 24 OUT 24 IN 24 19 19 39 7 IN 26 39 IN 26 39 IN 26 39 IN 19 OUT 19 39 7 39 26 5 39 26 5 5 26 5 5 26 5 TP613 26 39 5 TP635 IN 26 40 IN 26 40 BI 26 40 BI 26 40 39 5 TP636 35 TP637 5 TP638 27 TP639 35 5 38 40 35 5 5 5 MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE PP1V8_SENSOR_FILT PP2V85_CAM_REAR DMIC_SD_SENSOR MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE DMIC_SCLK_SENSOR ISP_AP_0_SCL ISP_AP_0_SDA I2C2_SCL_3V0 I2C2_SDA_3V0 IRQ_ACCEL_INT1_L IRQ_ACCEL_INT2_L IRQ_GYRO_INT1 IRQ_GYRO_INT2 I2C1_SCL_1V8 I2C1_SDA_1V8 IRQ_HALL IRQ_PROX_INT_L PP3V0_S2R_HALL_FILT ONOFF_L SRL_L AUD_VOL_UP_L AUD_VOL_DOWN_L MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE CONN_MIPI0C_CAM_CLK_N CONN_MIPI0C_CAM_CLK_P 27 27 CONN_PM_REAR_CAM_SHUTDOWN 27 CONN_PP1V8_SENSOR_FILT CONN_PP2V85_CAM_REAR CONN_DMIC_SD_SENSOR 27 27 C 27 CONN_DMIC_SCLK_SENSOR CONN_ISP_AP_0_SCL CONN_ISP_AP_0_SDA CONN_I2C2_SCL_3V0 CONN_I2C2_SDA_3V0 CONN_IRQ_ACCEL_INT1_L CONN_IRQ_ACCEL_INT2_L CONN_IRQ_GYRO_INT1 CONN_IRQ_GYRO_INT2 CONN_I2C1_SCL_1V8 CONN_I2C1_SDA_1V8 CONN_IRQ_HALL CONN_IRQ_PROX_INT_L CONN_PP3V0_S2R_HALL CONN_ONOFF_FTR_L CONN_SRL_FTR_L CONN_AUD_VOL_UP_FTR_L CONN_AUD_VOL_DOWN_FTR_L 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 MAKE_BASE=TRUE F-RT-SM 502250-8237 27 PP3V0_OPTICAL_SENS CONN_PP3V0_OPTICAL_SENS 27 MAKE_BASE=TRUE B B A SYNC_MASTER=MARK B. SYNC_DATE=N/A PAGE TITLE CONNECTOR: CANADA FLEX CONN,SENSOR PANEL ALIASES DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 051-8962 SIZE D REVISION A.0.0 BRANCH PAGE 54 OF 106 SHEET 25 OF 42 1 A 8 7 6 5 4 2 3 TP615 PP3V0_ALS 25 D 1 L5540 VOLTAGE=3.0V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM NET_SPACING_TYPE=PWR 240-OHM-0.2A-0.8-OHM MAX_NECK_LENGTH=3 MM 1 =PP3V0_OPTICAL 2 D 5 27 32 0201 31 25 1 PPVSIM 0.1UF 10% 6.3V 201 2 X5R VOLTAGE=1.8V MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm NET_SPACING_TYPE=PWR L5520 =PP1V8_CAM 32 26 1 5% 2 25V CERM 0201 CANADA FLEX CONN ON PG 54 PP1V8_CAM_FF 25 MAX_NECK_LENGTH=3 MM 2 10% 2 10V X5R 402 10% 2 16V X7R 201 C5530 C5540 1 C5541 FILTER PLACEHOLDER 1UF 82PF 1 1000PF 1 240-OHM-0.2A-0.8-OHM C5542 PP2V85_CAM_FF 25 L5510 VOLTAGE=2.85V MIN_LINE_WIDTH=0.3MM MIN_NECK_WIDTH=0.2MM NET_SPACING_TYPE=PWR 240-OHM-0.2A-0.8-OHM 1 2 =PP2V85_CAM MAX_NECK_LENGTH=3 MM 27 32 0201 0201 1 C5521 1 C5520 82PF FILTER PLACEHOLDER 1 1UF 10% 2 10V X5R 402 5% 2 25V CERM 0201 C5522 1000PF 10% 2 16V X7R 1 C5512 1 1000PF 201 10% 16V 2 X7R 201 C5510 1 C5511 FILTER PLACEHOLDER 1UF 82PF 10% 2 10V X5R 402 5% 2 25V CERM 0201 C C CANADA FLEX SIGNAL FILTERS R5510 0 1 B 31 SIM_CLK IN SIM_CLK_FILT OUT 2 NOSTUFF B 5% 1/20W MF 201 25 L5500 90-OHM-50MA TCM0605 SYM_VER-1 1 U5500 5 OUT TP586 39 7 CLK_CAM_FF IN 39 25 5 BI 2 0603 IRQ_ALS_INT_L 1 2 3 4 I2C2_SDA_3V0 NOSTUFF 1 TP25 IN1 OUT1 5 IN2 OUT2 6 IN3 IN4 OUT3 7 OUT4 8 C5501 IRQ_ALS_INT_CONN_L I2C2_SDA_3V0_ALS CLK_CAM_FF_CONN IN BI OUT 25 IN 40 7 BI 40 7 BI 25 39 TP26 1 5% 1/20W MIPI1C_AP_CLK_P MIPI1C_AP_CLK_N MIPI1C_AP_DATA_P<0> MIPI1C_AP_DATA_N<0> TP587 9 10 10% 16V 201 2 X7R IN 40 7 25 39 GND 1000PF 40 7 0 2 MF 201 R5512 1 5% 1/20W TP23 0 2 MF 201 OUT 25 40 3 MIPI1C_CAM_CLK_N OUT 25 40 NOSTUFF NOSTUFF L5501 TP24 90-OHM-50MA TCM0605 TP605 SYM_VER-1 1 32 26 MIPI1C_CAM_CLK_P R5511 800MHZ-100MA-27PF TP509 4 4 MIPI1C_CAM_DATA_P<0> BI 25 40 3 MIPI1C_CAM_DATA_N<0> BI 25 40 =PP1V8_CAM 2 R5501 100K 5% 1/20W MF 2 201 A 39 25 5 IN 39 7 BI 7 IN 39 7 IN R5513 U5501 TP20 1 TP611 800MHZ-100MA-27PF 0603 I2C2_SCL_3V0 ISP_AP_1_SDA PM_FRONT_CAM_SHUTDOWN ISP_AP_1_SCL 1 2 3 4 IN1 IN2 OUT1 5 OUT2 6 IN3 OUT3 7 1 C5500 100PF 5% 2 25V CERM OUT4 8 IN4 NOSTUFF TP8 I2C2_SCL_3V0_ALS ISP_CAM_1_SDA PM_FRONT_CAM_SHUTDOWN_FILT ISP_CAM_1_SCL OUT BI 25 39 25 39 7 NOSTUFF SYNC_MASTER=MARK B. 25 39 DRAWING NUMBER Apple Inc. TP614 R NOTICE OF PROPRIETARY PROPERTY: TP607 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 6 SYNC_DATE=N/A CONNECTOR: CANADA FLEX FILTERS 25 201 8 2 PAGE TITLE OUT OUT 0 5% 1/20W MF 201 GND 9 10 1 5 4 3 2 051-8962 SIZE D REVISION A.0.0 BRANCH PAGE 55 OF 106 SHEET 26 OF 42 1 A 8 7 6 5 R5600 TP53 D 39 7 1 CLK_CAM_RF IN 0 2 5% 1/20W MF 201 0 2 3 1 TP544 D CLK_CAM_RF_FILT NOSTUFF 1 C5600 1000PF 10% 16V 201 2 X7R R5610 1 5% 1/20W 4 2 MF 201 NOSTUFF L5600 90-OHM-50MA TCM0605 TP30 SYM_VER-1 1 4 2 R5611 TP31 40 7 40 7 IN 40 7 BI 3 2 NOSTUFF 5% 1/20W MF 201 MIPI0C_AP_DATA_N<0> MIPI0C_AP_DATA_P<0> MIPI0C_AP_CLK_N MIPI0C_AP_CLK_P IN BI 40 7 0 1 SENSOR PANEL CONNECTOR R5612 1 5% 1/20W 0 2 MF 201 NOSTUFF CABLINE-CA CONNECTOR: 518S0787 L5601 90-OHM-50MA TCM0605 CRITICAL J5600 SYM_VER-1 C 1 4 2 3 C CABLINE-CA F-RT-SM 31 R5613 1 0 25 39 MIPI0C_CAM_DATA_N<0> MIPI0C_CAM_DATA_P<0> 2 NOSTUFF 5% 1/20W MF 201 MIPI0C_CAM_CLK_N MIPI0C_CAM_CLK_P 25 25 40 25 25 40 25 40 25 25 40 25 25 L5610 32 1 =PP3V0_S2R_HALL 25 TP568 25 2 PP3V0_S2R_HALL_FILT 0201 1 C5601 82PF 5% 2 25V CERM 0201 1 25 25 C5602 1UF 1 C563 1000PF 10% 2 16V X7R 201 10% 2 10V X5R 402 VOLTAGE=3.0V MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm NET_SPACING_TYPE=PWR CONNECTED BY PG 54 ALIASES MAX_NECK_LENGTH=3 MM 25 25 25 25 25 25 25 L5611 25 TP532 240-OHM-0.2A-0.8-OHM 32 B 1 =PP1V8_SENSOR 2 25 25 PP1V8_SENSOR_FILT 25 0201 1 C5612 82PF TP531 5% 25V 2 CERM 0201 1 C5613 1UF 1 C5620 1000PF 10% 16V 2 X7R 201 10% 10V 2 X5R 402 TP545 1 2 0201 25 25 MAX_NECK_LENGTH=3 MM 25 25 CONN_CLK_CAM_RF_FILT CONN_ISP_AP_0_SCL CONN_ISP_AP_0_SDA CONN_PM_REAR_CAM_SHUTDOWN CONN_MIPI0C_CAM_DATA_N<0> CONN_MIPI0C_CAM_DATA_P<0> CONN_MIPI0C_CAM_CLK_N CONN_MIPI0C_CAM_CLK_P CONN_IRQ_HALL CONN_I2C1_SDA_1V8 CONN_I2C1_SCL_1V8 CONN_IRQ_PROX_INT_L CONN_PP3V0_S2R_HALL CONN_IRQ_GYRO_INT2 CONN_IRQ_GYRO_INT1 CONN_IRQ_ACCEL_INT1_L CONN_IRQ_ACCEL_INT2_L CONN_I2C2_SCL_3V0 CONN_I2C2_SDA_3V0 CONN_AUD_VOL_DOWN_FTR_L CONN_AUD_VOL_UP_FTR_L CONN_SRL_FTR_L CONN_ONOFF_FTR_L 2 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 B 23 24 25 26 25 CONN_DMIC_SD_SENSOR 27 25 CONN_DMIC_SCLK_SENSOR 28 25 CONN_PP3V0_OPTICAL_SENS 29 TP576 30 TP28 240-OHM-0.2A-0.8-OHM =PP2V85_CAM 25 VOLTAGE=1.8V MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm NET_SPACING_TYPE=PWR L5613 32 26 1 3 25 25 240-OHM-0.2A-0.8-OHM CONN_PP2V85_CAM_REAR CONN_PP1V8_SENSOR_FILT 33 PP2V85_CAM_REAR 1 25 C5617 1 5% 25V 0201 2 X5R 82PF 2 CERM C5618 1 10% 10V 402 2 X7R 1UF C5621 1000PF 10% 16V 201 34 VOLTAGE=3.3V MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm NET_SPACING_TYPE=PWR 35 36 MAX_NECK_LENGTH=3 MM 37 38 39 40 41 L5612 =PP3V0_OPTICAL 1 2 32 TP598 240-OHM-0.2A-0.8-OHM 32 26 5 PP3V0_OPTICAL_SENS 25 0201 1 C5614 1 5% 25V 0201 2 X5R 82PF A 2 CERM C5615 1 10% 10V 402 2 X5R 1UF C5616 1 10% 6.3V 201 2 X7R 0.1UF C5623 1000PF 10% 16V 201 VOLTAGE=3.0V MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.2 MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM SYNC_MASTER=MARK B. SYNC_DATE=N/A PAGE TITLE CONNECTOR: SENSOR PANEL CONNECTOR DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 051-8962 SIZE D REVISION A.0.0 BRANCH PAGE 56 OF 106 SHEET 27 OF 42 1 A 7 USB 32 1 PPVBUS_USB_EMI 2 0603 C5721 C5722 1 27PF 1 12PF 5% 2 25V NP0-C0G 201 VOLTAGE=5V MIN_LINE_WIDTH=4.1MM MIN_NECK_WIDTH=0.2MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM L5757 FERR-70-OHM-4A MIN_LINE_WIDTH=4.1MM MIN_NECK_WIDTH=0.2MM 1 6 2 R5790 1 5% 1/20W MF 2 201 0402 5% 2 25V NP0-C0G 201 1 4 2 3 C5750 1 29 ANALOG VIDEO FL5711 TP217 80-OHM-0.2A-0.4-OHM C5783 40 11 10 0.01UF IN 10% 2 25V X7R 402 VIDEO_EMI_CVBS_PB IN 1 2 VIDEO_PT_DK_CON_CVBS_PB 28 29 40 39 4 IN 39 4 IN 0201 DEVELOPMENT_JTAG R5730 JTAG_AP_TCK JTAG_AP_TMS 1 1 2 L5716 D 28 29 40 BI 40 11 10 USB_D_P 1 4 USB_D_N 2 3 USB_PT_DK_CON_D_P IN 1 VIDEO_EMI_Y_PR 2 BI USB_PT_DK_CON_D_N NC_D5703_6 5 IO 2 NC TP211 TP201 VIDEO_PT_DK_CON_Y_PR 28 29 40 VIDEO_PT_DK_CON_C_Y 28 29 40 VIDEO_PT_DK_CON_CVBS_PB 28 29 40 AV_PT_DK_CON_RET 29 CRITICAL OMIT D5703 RCLAMP0502N SLP1210N6 1 1 1 NOTE: JTAG_AP_TMS = 3.3V: JTAG_AP_TMS = 1.8V: C 32 1 =PP3V3_PORT_ACC 2 TP199 3 4 0402 2 0.095 OHM DCR C5751 DZ5790 1 0201 5% 2 25V NP0-C0G 201 8V-100PF 1 32 TP168 LINEOUT 27PF 4 DP_PT_DK_CON_TX_P<0> 1 IN DP_EMI_TX_N<0> 2 3 DP_PT_DK_CON_TX_N<0> NC_D5700_6 40 13 0.01UF 10% 2 10V X5R 201 TP424 6 VBUS TP175 DZ5753 1 35 10K 5% 1/20W MF 201 SYM_VER-1 C5752 DP_EMI_TX_P<1> 1 4 DP_PT_DK_CON_TX_P<1> IN DP_EMI_TX_N<1> 2 3 DP_PT_DK_CON_TX_N<1> NC_D5701_6 5% 2 25V NP0-C0G 201 40 13 5 IO 2 NC 1 2 AV_PT_DK_CON_DIFF_SENSE 29 MIN_LINE_WIDTH=0.1MM MIN_NECK_WIDTH=0.07MM 0201 DZ5712 IO 4 NC 3 6.8V-100PF 0201 TP196 1 1 TP202 SLP1210N6 C C5760 0.01UF DZ5752 10% 16V X5R-CERM 0201 29 1 1 0 A C5753 1 100 5% 2 25V NP0-C0G 201 1 IN DP_EMI_AUX_P 1 4 DP_PT_DK_CON_AUX_P 40 13 IN DP_EMI_AUX_N 2 3 DP_PT_DK_CON_AUX_N NC_D5702_6 VBUS 29 39 5 IO 2 NC TP205 C5754 2 AUDIO_PT_DK_RET 28 MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM 0402 29 40 29 40 FIREWIRE DETECT/ DISPLAYPORT HPD R5710 IO 4 NC 3 35 13 TP204 SLP1210N6 FW_ZENER_PWR 1 DZ5720 47K 2 5% 1/20W MF 201 GND FW_PT_DK_CON_PWR 29 C5780 0.01UF 10% 50V 2 X7R 402 GDZ-0201 1 TP226 1 GDZT2R5.1B RCLAMP0502N DZ5751 OUT 2 D5702 5% 25V 2 NP0-C0G 201 B1 1 6 27PF A1 GND_AUDIO_PT_DK SYM_VER-1 40 13 NOSTUFF TP203 30-OHM-1.7A 90-OHM-50MA TCM0605 TP210 ACC_PT_DK_CON_TX 2 IN B L5763 TP503 L5702 27PF TP207 5% 1/20W MF 201 GND 21 0201 14.2V-6PF R5740 5% 1/20W MF 2 201 RCLAMP0502N ACC_PT_DK_CON_ID USB_FS_N_ACC_TX IN TP218 22-OHM-25%-900MA AV_EMI_DIFF_SENSE 2 TP209 IN 21 D5701 R5720 39 11 29 40 6 TP197 2 2 L5762 29 40 TP504 27PF 100K 2 1 UCLAMP0511Z IN R5752 R5753 DZ5711 0201 VBUS 1% 1/20W MF 201 29 MIN_LINE_WIDTH=0.1MM MIN_NECK_WIDTH=0.07MM GND TP216 1 AUDIO_PT_DK_CON_LO_R L5701 29 40 13 2 0201 TP228 2 0402 12-OHM-100MA-8.5GHZ TCM0806-4SM TP215 ACC_PT_DK_CON_DET_L 1 OUT PORT_DOCK_ACCID 1 1 6.8V-100PF B FERR-120-OHM-1.5A AUDIO_EMI_LO_R IN TP221 L5761 TP501 1 5% 1/20W MF 201 35 TP174 IO 4 NC 3 2 SLP1210N6 C 29 40 21 RCLAMP0502N 2 1 UCLAMP0511Z 1 D5700 R5751 PLACE BY PMU PMU_ADC_REF DZ5710 29 40 0201 C5782 5 IO 2 NC 5% 1/20W MF 2 201 29 MIN_LINE_WIDTH=0.1MM MIN_NECK_WIDTH=0.07MM 29 220K 10K AUDIO_PT_DK_CON_LO_L 2 1 R5750 1 2 0402 SYM_VER-1 DP_EMI_TX_P<0> =PPVCC_MAIN_DOCK OUT PORT_DOCK_ACC_DET_L 1 AUDIO_EMI_LO_L IN TP220 L5760 FERR-120-OHM-1.5A TP173 TCM0806-4SM IN 1 35 21 L5700 12-OHM-100MA-8.5GHZ TP425 40 13 ACC_PT_DK_CON_PP3V3 U5730’S IN = 2.13V U5730’S IN = 1.16V 2 DISPLAYPORT VOLTAGE=3.3V MIN_LINE_WIDTH=0.3MM MIN_NECK_WIDTH=0.1MM MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR OUT 4 31 35 1% 1/32W MF 2 01005 5 ACCESSORY L5714 RST_AP_L 1.00M TP500 FERR-120-OHM-1.5A R5796 SOT953 1 2 TP219 GND DEVELOPMENT_JTAG 0.1UF 10% 2 6.3V X5R 201 NUP412VP5XXG SM AUDIO_PT_DK_RET OUT A1 GND C5730 U5700 XW5700 28 1 D UCSP A2 IN DEVELOPMENT_JTAG 29 39 TP213 U5730 MAX9061 B1 REF 28 29 40 TP200 TP198 6 IO 4 NC 3 =PP1V8_S2R_MISC U5730_IN TP214 VBUS 32 5 VIDEO_PT_DK_CON_Y_PR TP258 39 4 29 DEVELOPMENT_JTAG 1% 1/32W MF 2 01005 0201 29 39 R5795 523K 80-OHM-0.2A-0.4-OHM SYM_VER-1 39 4 29 DEVELOPMENT_JTAG 1 VIDEO_PT_DK_CON_C_Y FL5708 90-OHM-50MA TCM0605 TP212 2 0 0201 NOTE: MAX CONTINUOUS VOLTAGE IS 19V - SPEC IS 16V (JTAG_TCK) PT_DK_CON_P14 PT_DK_CON_P17 (JTAG_TMS) 2 R5731 DEVELOPMENT_JTAG 80-OHM-0.2A-0.4-OHM VIDEO_EMI_C_Y 0 1 FL5707 TP268 40 11 10 1 JTAG TP193 PPVBUS_USB_PT_DK_CONN 27PF 27V-100PF 100K 5% 2 25V NP0-C0G 201 DZ5760 5 B2 8 1 USBULC6-2F3 BGA A2 B2 A SYNC_MASTER=JAMES TABLE_ALT_HEAD TP206 R5721 39 11 OUT USB_FS_P_ACC_RX TP208 1 0 ALTERNATE FOR PART NUMBER 377S0090 BOM OPTION REF DES COMMENTS: NOSTUFF 1 377S0081 DZ5751 ? 377S0111 377S0099 DZ5710,DZ5711 RADAR:8379541 377S0107 377S0066 155S0625 155S0559 IO FLEX: DOCK COMPONENTS DRAWING NUMBER Apple Inc. TABLE_ALT_ITEM C5755 27PF 7 29 39 R TABLE_ALT_ITEM D5700,D5701,D5702,D5703 RADAR:8289785 NOTICE OF PROPRIETARY PROPERTY: TABLE_ALT_ITEM 6 5 L5700,L5701 SYNC_DATE=N/A PAGE TITLE TABLE_ALT_ITEM ACC_PT_DK_CON_RX 2 5% 1/20W MF 201 5% 2 25V NP0-C0G 201 8 PART NUMBER RADAR:8423156 4 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 3 2 051-8962 SIZE D REVISION A.0.0 BRANCH PAGE 57 OF 106 SHEET 28 OF 42 1 A 8 7 6 5 4 3 2 1 D D DOCK CONNECTOR PN 516S0817 (PLUG - MALE) CRITICAL J5900 AXK844135WG TP194 M-ST-SM C 28 PPVBUS_USB_PT_DK_CONN TP170 TP171 VIDEO_PT_DK_CON_CVBS_PB VIDEO_PT_DK_CON_C_Y IN VIDEO_PT_DK_CON_Y_PR 40 28 IN ACC_PT_DK_CON_ID 28 OUT (DP_HPD) 28 OUT FW_PT_DK_CON_PWR ACC_PT_DK_CON_PP3V3 28 IN 40 28 40 28 (JTAG_TCK) (JTAG_TMS) 28 28 39 28 39 28 IN IN OUT IN PT_DK_CON_P14 PT_DK_CON_P17 ACC_PT_DK_CON_RX ACC_PT_DK_CON_TX 2 1 4 3 6 5 8 7 10 9 12 11 14 13 16 15 18 17 20 19 22 21 24 23 26 25 28 27 30 29 32 31 34 33 36 35 38 37 40 39 42 41 44 43 C USB_PT_DK_CON_D_P USB_PT_DK_CON_D_N BI 28 39 BI 28 39 DP_PT_DK_CON_TX_P<0> DP_PT_DK_CON_TX_N<0> IN 28 40 IN 28 40 DP_PT_DK_CON_TX_P<1> DP_PT_DK_CON_TX_N<1> IN 28 40 IN 28 40 TP195 AV_PT_DK_CON_DIFF_SENSE AUDIO_PT_DK_CON_LO_L AUDIO_PT_DK_CON_LO_R AV_PT_DK_CON_RET ACC_PT_DK_CON_DET_L DP_PT_DK_CON_AUX_P DP_PT_DK_CON_AUX_N HOME_L OUT 28 IN 28 IN 28 OUT 28 OUT 28 BI 28 40 BI 28 40 OUT 5 29 35 TP417 B B 35 29 5 OUT HOME_L 2 DZ5750 6.8V-100PF 0201 1 A SYNC_MASTER=JAMES SYNC_DATE=N/A PAGE TITLE IO FELX: B2B Connector DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 051-8962 SIZE D REVISION A.0.0 BRANCH PAGE 59 OF 106 SHEET 29 OF 42 1 A 8 7 6 5 4 2 3 1 X23 WIFI/BT CONNECTOR D D L6000 TP303 PPVCC_MAIN_WL_CONN VOLTAGE=4.7V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM NET_SPACING_TYPE=PWR 22-OHM-25%-0.5A-0.20DCR 1 2 =PPVCC_MAIN_WL MAX_NECK_LENGTH=3 MM 1 68PF 5% 25V CERM 201 2 516S0884 C J6000 35 IN 35 OUT 35 IN 35 OUT 5 IN RST_WLAN_L PM_WLAN_HOST_WAKE RST_BT_L PM_BT_HOST_WAKE PM_BT_WAKE TP373 10 10 OUT IN 10 OUT 10 IN ? TP422 39 19 5 IN 39 19 5 IN 39 19 5 OUT 39 19 5 IN UART_AP_3_RXD UART_AP_3_TXD UART_AP_3_CTS_L UART_AP_3_RTS_L TP421 I2S_AP_2_BCLK I2S_AP_2_DOUT I2S_AP_2_DIN I2S_AP_2_LRCK TP320 TP322 TP337 TP336 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 22-OHM-25%-0.4A-0.35DCR 1 2 =PP1V8_S2R_WL PP1V8_S2R_WL_CONN F-ST-SM 1 L6001 TP302 AXT530224 TP321 32 0603 C6000 VOLTAGE=1.8V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM NET_SPACING_TYPE=PWR C6001 5% 25V CERM 201 2 TP301 SDIO_WL_CLK IN SDIO_WL_CMD SDIO_WL_DATA<3> SDIO_WL_DATA<2> SDIO_WL_DATA<1> SDIO_WL_DATA<0> CLK_32K_WLAN 1 68PF MAX_NECK_LENGTH=3 MM TP319 C 32 0402 5 40 TP318 BI 5 40 BI 5 40 BI 5 40 BI 5 40 BI 5 40 IN 35 39 TP305 TP300 TP335 TP96 TP304 TP338 TP339 TP340 TP341 B B A SYNC_MASTER=MIKE SYNC_DATE=N/A PAGE TITLE CONNECTOR: X23 WIFI/BT DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 051-8962 SIZE D REVISION A.0.0 BRANCH PAGE 60 OF 106 SHEET 30 OF 42 1 A 8 7 6 5 4 3 2 1 X24 CELLULAR/GPS CONNECTOR D D 998-3141 J6100 CELL-MODULE-X24 HB-SM SNSV_BATT_POS_ACF =BATT_POS_F_3G 32 TP9 1 1 R6100 3 255K TP359 35 OUT 4 1% 1/32W MF 2 01005 5 6 7 ADC_IN7 35 28 4 1 NOSTUFF C6100 0.01UF 1 10% 6.3V 2 X5R 01005 R6101 255K 1% 1/32W MF 2 01005 TP10 TP633 TP626 TP15 OUT 5 IN 35 IN 5 OUT 5 IN 5 OUT TP632 TP458 C 40 5 TP627 IN OUT 5 TP5 IN 40 5 IN 40 5 OUT 5 OUT 35 OUT TP625 TP12 TP4 TP624 RST_AP_L PM_RADIO_ON RST_BB_PMU_L GSM_TXBURST_IND RST_BB_L RST_DET_L 9 10 11 12 13 35 IN 39 11 BI 39 11 BI SPI_IPC_MRDY SPI_IPC_SRDY SPI_IPC_SCLK SPI_IPC_MOSI SPI_IPC_MISO IPC_GPIO PM_BB_HOST_WAKE 15 16 18 19 20 21 TP11 TP621 TP3 TP466 TP617 10 IN 10 OUT 10 OUT 10 IN 10 OUT 10 IN TP16 TP2 32 5 5 TP465 10 TP19 10 TP455 10 TP18 10 5 TP17 5 39 35 24 25 26 UART_AP_1_RXD UART_AP_1_TXD UART_AP_1_CTS_L UART_AP_1_RTS_L UART_AP_2_RXD UART_AP_2_TXD 27 28 29 30 31 32 TP353 =PP1V8_S2R_GPS RST_GPS_L IN PM_GPS_STANDBY_L IN UART_AP_4_RXD OUT UART_AP_4_TXD IN UART_AP_4_CTS_L OUT UART_AP_4_RTS_L IN GPS_SYNC IN IRQ_GPS_INT_L OUT CLK_32K_GPS IN MIN_NECK_MIDTH SHOULD BE 0.2MM 26 25 25 IN 25 OUT 26 OUT 25 BI NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM PPVSIM SIM_DET SIM_RST SIM_CLK SIM_IO 22 23 TP14 TP468 C 17 BB_VBUS_DET USB_BB_D_P USB_BB_D_N TP622 TP351 8 14 40 5 B OMIT 2 33 34 35 36 37 38 39 40 41 42 B 43 VOLTAGE=1.2V MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.1 MM 44 45 46 47 48 49 TP350 50 TP1 TP6 TP7 TP13 A SYNC_MASTER=MIKE SYNC_DATE=N/A PAGE TITLE CONNECTOR: X24 CELLULAR/GPS DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 051-8962 SIZE D REVISION A.0.0 BRANCH PAGE 61 OF 106 SHEET 31 OF 42 1 A 8 7 6 5 4 2 3 1 POWER CONN / ALIAS LDO RAILS BUCK RAILS CHARGER MAIN PROGRAMMABLE ON/OFF 34 D 34 PP3V0_S2R_HALL =PP3V0_S2R_HALL =PP3V0_S2R_HALL_CHSW MAKE_BASE=TRUE VOLTAGE=3.0V MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 mm NET_SPACING_TYPE=PWR 27 23 PP1V2_SOC MAKE_BASE=TRUE VOLTAGE=1.2V MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.1 MM NET_SPACING_TYPE=PWR =PPVDD_SOC_H4 TP570 9 35 34 PPVCC_MAIN MIN_NECK_MIDTH SHOULD BE 0.2MM MAX_NECK_LENGTH=0.8 MM MAX_NECK_LENGTH=3 MM MAX_NECK_LENGTH=3 MM 34 PP1V7_VA_VCP =PP1V7_VA_VCP MAKE_BASE=TRUE VOLTAGE=1.7V MIN_LINE_WIDTH=0.4MM MIN_NECK_WIDTH=0.2MM NET_SPACING_TYPE=PWR 34 PP3V0_VIDEO MAKE_BASE=TRUE VOLTAGE=3.0V MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM 34 =PP3V0_VIDEO_BUFFER =PP3V0_VIDEO_H4 MAKE_BASE=TRUE VOLTAGE=3.0V MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.2 mm NET_SPACING_TYPE=PWR 7 34 =PP3V0_OPTICAL 5 26 27 BI PP1V2_CPU MAKE_BASE=TRUE VOLTAGE=1.2V MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.1 MM NET_SPACING_TYPE=PWR =PPVDD_CPU_H4 9 MIN_NECK_MIDTH SHOULD BE 0.2MM =PP1V2_S2R_H4 PP1V2_S2R MAKE_BASE=TRUE VOLTAGE=1.2V MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.1 MM NET_SPACING_TYPE=PWR 8 BATTERY MIN_NECK_MIDTH SHOULD BE 0.2MM MAX_NECK_LENGTH=0.8 MM TP634 TP600 37 34 MAX_NECK_LENGTH=3 MM 34 28 35 MAX_NECK_LENGTH=0.8 MM 11 TP578 PP3V0_OPTICAL D 19 20 30 19 MAX_NECK_LENGTH=3 MM 34 =PPVCC_MAIN_AUDIO =PPVCC_MAIN_WL =PPVCC_MAIN_DOCK =PPVCC_MAIN_LED MAKE_BASE=TRUE VOLTAGE=4.7V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM NET_SPACING_TYPE=PWR 34 PP3V2_SD MAKE_BASE=TRUE VOLTAGE=3.2V MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.2 mm NET_SPACING_TYPE=PWR PP1V8_S2R =PP1V8_S2R_H4 =PP1V8_S2R_WL =PP1V8_S2R_GPS =PP1V8_S2R_MISC MAKE_BASE=TRUE VOLTAGE=1.8V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM 8 30 PPBATT_VCC MAKE_BASE=TRUE VOLTAGE=4.2V MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.15 MM NET_SPACING_TYPE=PWR =BATT_POS_F_3G =BATT_POS_CONN 31 33 MAX_NECK_LENGTH=1.7 MM 31 5 28 MAX_NECK_LENGTH=3 MM 34 PP3V3_ACC 34 PP3V0_VIDEO_BUF MAKE_BASE=TRUE VOLTAGE=3.3V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM NET_SPACING_TYPE=PWR =PP3V3_PORT_ACC 28 =PP3V0_VIDEO_BUF 11 MAX_NECK_LENGTH=3 MM C MAKE_BASE=TRUE VOLTAGE=3.0V MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 mm NET_SPACING_TYPE=PWR 34 MAX_NECK_LENGTH=3 MM 34 PP3V2_S2R_USBMUX MAKE_BASE=TRUE VOLTAGE=3.2V MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 mm NET_SPACING_TYPE=PWR =PP3V2_S2R_USBMUX PP1V8 =PP1V8_CAM =PP1V8_SENSOR =PP1V8_AUDIO =PP1V8_H4 =PP1V8_VDDIO18_H4 =PP1V8_MIPI_H4 =PP1V8_DPORT_H4 MAKE_BASE=TRUE VOLTAGE=1.8V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=0.8 MM MIN_NECK_MIDTH SHOULD BE 0.2MM 11 C 26 27 19 USB POWER INPUT 4 5 7 10 13 8 9 7 7 MAX_NECK_LENGTH=3 MM 34 PP3V0_IO MAKE_BASE=TRUE VOLTAGE=3.0V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM NET_SPACING_TYPE=PWR 28 =PP3V0_IO_H4 =PP3V0_IO_MISC 13 =PP2V85_CAM 26 27 MAX_NECK_LENGTH=3 MM 34 PP2V85_CAM MAKE_BASE=TRUE VOLTAGE=2.85V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM NET_SPACING_TYPE=PWR 34 PP3V3_OUT =PP3V3_NAND =PP3V3_USB_H4 =PP3V3_MLC_HI =PP3V3_LCD =PP3V3_NAND_H4 MAKE_BASE=TRUE VOLTAGE=3.3V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=0.8 MM MIN_NECK_MIDTH SHOULD BE 0.2MM MAX_NECK_LENGTH=3 MM 34 PP3V0_GRAPE MAKE_BASE=TRUE VOLTAGE=3.0V MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM 34 B PP1V1 MAKE_BASE=TRUE VOLTAGE=1.1V MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.1 MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=0.8 MM MIN_NECK_MIDTH SHOULD BE 0.2MM 34 PP1V8_ALWAYS MAKE_BASE=TRUE VOLTAGE=1.8V MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM NET_SPACING_TYPE=PWR =PP3V0_GRAPE =PP3V0_GRAPE_Z1 =PP3V0_GRAPE_Z2 =PP3V0_GRAPE_MARIO1 =PP1V1_PLL_H4 =PP1V1_MIPI_H4 =PP1V1_DPORT_H4 =PP1V1_USB_H4 =PP1V1_MIPI_PLL_H4 =PP1V8_ALWAYS PPVBUS_USB_EMI PPVBUS_USB_DCIN 34 MAKE_BASE=TRUE 7 9 12 4 36 16 10 17 18 18 18 35 17 PPLED_OUT MAKE_BASE=TRUE VOLTAGE=20.4V MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.2 MM 4 7 =PPLED_REG 16 NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM 7 B 4 4 5 36 MAX_NECK_LENGTH=3 MM PP3V3_MLC_OUT =PP3V3_MLC MAKE_BASE=TRUE VOLTAGE=3.3V MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.2 MM NET_SPACING_TYPE=PWR 14 16 MAX_NECK_LENGTH=3 MM TP419 34 PP1V2 MAKE_BASE=TRUE VOLTAGE=1.2V MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.1 MM NET_SPACING_TYPE=PWR TP427 =PP1V2_VDDQ_H4 =PP1V2_VDDIOD_H4 =PP1V2_HSIC_H4 8 8 4 MAX_NECK_LENGTH=0.8 MM MIN_NECK_MIDTH SHOULD BE 0.2MM GND MAKE_BASE=TRUE VOLTAGE=0V MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.10MM NET_SPACING_TYPE=GND MAX_NECK_LENGTH=5 MM A SYNC_MASTER=YOSH PAGE TITLE SYNC_DATE=N/A POWER: ALIASES DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 051-8962 SIZE D REVISION A.0.0 BRANCH PAGE 73 OF 106 SHEET 32 OF 42 1 A 8 7 6 5 4 3 2 1 D D TP388 MIN_NECK_MIDTH SHOULD BE 0.2MM 34 XW7520 SM BATT_SNS 1 2 NET_SPACING_TYPE=ANLG MIN_LINE_WIDTH=0.25 MM MIN_NECK_WIDTH=0.15 MM 32 =BATT_POS_CONN TP7500 1 CRITICAL A J7500 TP-P55 C FL7500 TP34 35 5 1 F-ST-SM 2 7 5 BATT_SWI_CONN BATT_NTC_CONN 0201-1 NET_SPACING_TYPE=ANLG 1 2 3 4 R7541 35 BATTERY_NTC BI NET_SPACING_TYPE=ANLG TP35 1 0 5% 1/20W C7522 2 MF 201 NOTE: GET RID OF THE RES AFTER BRINGUP 33PF C BATT-K93 240-OHM-0.2A-0.8-OHM BATTERY_SWI BI NOSTUFF 1 5% 25V NP0-C0G 2 201 C7523 1 33PF 5% 25V NP0-C0G 2 201 C7524 1000PF 1 10% 16V X7R 2 201 C7525 1 82PF 5% 25V CERM 2 0201 TP32 6 8 TP7501 POS HDQ THERM GND NOTE: VERIFY PINOUT OF BATTERY CONNECTOR VERIFY MOUNTING CONN TO GND APN:516-0240 1 TP-P55 A NOSTUFF TP7502 1 TP-P55 A NOSTUFF TP7503 1 TP-P55 A NOSTUFF B B A SYNC_MASTER=YOSH SYNC_DATE=N/A PAGE TITLE POWER: BATTERY CONNECTOR DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 051-8962 SIZE D REVISION A.0.0 BRANCH PAGE 75 OF 106 SHEET 33 OF 42 1 A 8 7 6 5 4 2 3 1 CRITICAL L8100 TP367 2.2UH-20%-1.85A-80MOHM 1 BUCK0_LXL QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION CRITICAL 343S0542 1 IC,PMU,ALISON,D1946A2,OTPXX,UFBGA292 U8100 CRITICAL L8101 TABLE_5_ITEM CRITICAL 1 CRITICAL C8102 1 2.2UH-20%-1.85A-80MOHM BUCK0_LXM TP370 PP1V2_CPU MIN_LINE_WIDTH=0.6 MM PST25201B-SM MIN_NECK_WIDTH=0.25 MM NET_SPACING_TYPE=SWITCHNODE DIDT=TRUE TABLE_5_HEAD PART# TP369 2 1 22UF MIN_LINE_WIDTH=0.6 MM PST25201B-SM MIN_NECK_WIDTH=0.25 MM NET_SPACING_TYPE=SWITCHNODE DIDT=TRUE C8103 22UF 20% 2 6.3V X5R-CERM 603 2 32 ADDITIONAL DISTRIBUTED 25UF (NO DE-RATING) 20% 2 6.3V X5R-CERM 603 XW8103 BUCK0_FB D ALTERNATE FOR PART NUMBER 197S0392 197S0299 BOM OPTION REF DES COMMENTS: Y8138 ALT FOUNDRY 1 NET_SPACING_TYPE=ANLG MIN_LINE_WIDTH=0.25 MM MIN_NECK_WIDTH=0.20 MM TABLE_ALT_HEAD PART NUMBER 2 SM D NOSTUFF CRITICAL L8105 TABLE_ALT_ITEM TP371 2.2UH-20%-1.85A-80MOHM 1 BUCK2_LXL 2 PP1V2_SOC MIN_LINE_WIDTH=0.6 MM PST25201B-SM MIN_NECK_WIDTH=0.25 MM NET_SPACING_TYPE=SWITCHNODE DIDT=TRUE CRITICAL L8112 2.2UH-3.5A-54M-OHM SOD-123W PMEG4030ER S CRITICAL G 4 Q8104 USB REVERSE VOLTAGE PROTECTION MLP3.3X3.3 D 5 RDS(ON) 27 MOHM @-4.5V IMAX 6.9 A VGS MAX +/- 25V PPBATT_VCC 37 34 32 ACT_DIO TP88 MIN_LINE_WIDTH=0.2 MM MIN_NECK_WIDTH=0.1 MM NET_SPACING_TYPE=ANLG TP362 TP343 TP344 TP345 TP346 PPVBUS_PROT 2 CRITICAL R8116 Q8123 470K 1% 1/20W MF 2 201 DZ8120 S FDMC6676BZ MIN_LINE_WIDTH=0.60MM MIN_NECK_WIDTH=0.25MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM VOLTAGE=6V BZT52C10LP G 4 XW8114 CRITICAL LLP MLP3.3X3.3 C8124 CRITICAL 1 1 NOSTUFF 3 2 1 C SHORT-0201 1 PPVBUS_USB 2 4 1 NOSTUFF 2.2UF NOTE: 10V ZENER 10% 25V X5R-CERM 2 805 TP352 LAYOUT NOTE: PLACE RIGHT AT THE PIN 1 5 VBUS_PROT_G PPVBUS_USB_DCIN NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM VOLTAGE=6V R8130 1 TP89 CRITICAL LAYOUT NOTE: PLACE RIGHT AT THE PIN 220K TP86 B MIN_LINE_WIDTH=0.20MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=ANLG NC_VBUS_B_OV_N 10% 25V 2 X5R 805 1% 1/20W MF 201 2 NOTE: FOR NO BATTERY SITUATION TP87 TP349 37 34 32 PPBATT_VCC 34 32 NOSTUFF CRITICAL CRITICAL 1 1 C8100 C8101 22UF 1 C8135 1UF 10% 6.3V 2 CERM 402 20% 6.3V X5R-CERM 2 603 BATT_POS_RC TP90 MIN_LINE_WIDTH=0.30MM TP430 35 34 32 MIN_NECK_WIDTH=0.20MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM VOLTAGE=4.6V R8100 1 0.5 1% 1/16W MF 402 2 VBAT IBAT_S IBAT ACT_DIO 34 32 PPVCC_MAIN PP1V2_S2R 1 C8136 1UF VCENTER_B VBUS_B VBUS_B_OV_N VDD_LDO1_6 VDD_LDO2 VDD_LDO3_5_8 VDD_LDO4_7 VDD_LDO9 VDD_LDO10 VDD_LDO11 VDD_LDO12 VLDO1 VLDO2 VLDO3 VLDO4 VLDO5 VLDO6 VLDO7 VLDO8 VLDO9 VLDO10 VLDO11 VLDO12 ON_BUF L1 P3 P9 N5 P10 K1 P4 P8 P11 P5 M1 P6 M2 PMU_XTAL 1 2 18PF A TP265 TP266 PP3V0_GRAPE (100MA; 1.65-1.805V; BUCK3) PP1V7_VA_VCP (50MA; 2.5-3.3V) PP3V0_VIDEO (100MA; 1.8-3.3V) PP3V0_OPTICAL (300MA; 2.5-3.6V) PP3V2_SD (150MA; 2.5-3.6V) PP3V3_ACC (50MA; 1.5-3.3V) PP3V0_VIDEO_BUF (10MA; 2.0-3.55V) PP3V2_S2R_USBMUX (300MA; 1.2-3.0V) PP3V0_IO (200MA; 2.5-3.55V) PP3V0_S2R_HALL (200MA; 1.7-3.0V) PP2V85_CAM (150MA; 0.6-1.3V) PP1V1 PP1V8_ALWAYS CRITICAL C8166 CRITICAL VPUMP B18 PMU_VPUMP C8137 1 150UF-0.035OHM 20% 6.3V 2 POLY-TANT CASE-B15G-SM C8165 1 150UF-0.035OHM 20% 6.3V 2 POLY-TANT CASE-B15G-SM CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL 1 1 1 1 1 1 1 1 1 1 C8154 10UF 20% 2 6.3V X5R 603 C8155 10UF 1 C8156 4.7UF C8157 4.7UF C8158 4.7UF C8159 4.7UF C8160 4.7UF C8161 4.7UF C8162 4.7UF C8130 4.7UF C8131 1.0UF 20% 20% 20% 20% 20% 20% 20% 20% 20% 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 2 6.3V X5R-CERM1 2 X5R-CERM1 2 X5R-CERM1 2 X5R-CERM1 2 X5R-CERM1 2 X5R-CERM1 2 X5R-CERM1 2 X5R-CERM1 2 X5R 402 402 402 402 402 402 402 402 0201-MUR 20% 2 6.3V X5R 603 34 32 34 32 34 32 34 32 34 32 1 8 82PF 5% 2 25V CERM 0201 1 TP259 7 TP260 TP261 TP262 TP363 TP368 TP383 TP387 TP397 6 TP399 TP400 TP452 TP457 5 TP511 TP514 DCR=64MOHM MAX PIME051E-SM 1 32 34 1 20% 6.3V 2 X5R-CERM 603 2 SM NOSTUFF 32 34 C8119 22UF XW8132 32 34 CRITICAL 1 32 ADDITIONAL DISTRIBUTED 47UF (NO DE-RATING) C8120 22UF 20% 6.3V 2 X5R-CERM 603 CRITICAL 32 34 TP610 32 34 32 34 DSP_SW PP1V8_S2R PP1V8 32 34 32 TP8133 1 TP TP-P55 32 34 NOSTUFF 32 1 C8138 1UF 1 C8140 1UF 10% 2 6.3V CERM 402 20% 2 6.3V X5R 0201 1 C8139 1UF 10% 2 6.3V CERM 402 1 C8141 TP561 TP TP-P55 TP592 1UF B TP8101 1 PP1V8_GRAPE NOSTUFF ADDITIONAL DISTRIBUTED: PP1V2: 30UF (NO DE-RATING) PP1V8: 6UF (NO DE-RATING) 10% 2 6.3V CERM 402 34 32 34 32 32 34 35 C8164 34 32 18PF 5% 2 25V NP0-C0G 201 34 32 34 32 TP404 TP402 TP429 TP505 TP82 TP167 CRITICAL CRITICAL 2.2UF 2.2UF 1 C8149 1 10% 6.3V X5R 2 402 PP3V2_S2R_USBMUX PP3V0_IO PP3V0_S2R_HALL PP2V85_CAM PP1V1 PP1V8_ALWAYS C8169 1 4 C8168 2.2UF CRITICAL C8148 1 4.7UF 20% 6.3V X5R-CERM1 2 402 CRITICAL C8146 1 2.2UF 10% 6.3V X5R 2 402 CRITICAL C8145 1 2.2UF 10% 6.3V X5R 2 402 CRITICAL C8144 1 10UF 20% 6.3V CERM-X5R 2 0402 CRITICAL C8147 1 2.2UF 10% 6.3V X5R 2 402 TP81 SYNC_MASTER=YOSH PAGE TITLE TP434 TP585 1 10% 6.3V X5R 2 402 CRITICAL C8167 2.2UF 1 DRAWING NUMBER 10% 6.3V X5R 2 402 CRITICAL C8153 2.2UF SYNC_DATE=N/A POWER: PMU TP591 TP451 CRITICAL 20% 6.3V X5R 2 0201 TP464 TP463 2 PP1V2_S2R PP1V2 PP3V0_GRAPE PP1V7_VA_VCP PP3V0_VIDEO PP3V0_OPTICAL PP3V2_SD PP3V3_ACC PP3V0_VIDEO_BUF 0.22UF NOTE: CONCERNED ABOUT ESR > 20MOHM TP85 C8163 MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.25 MM NET_SPACING_TYPE=SWITCHNODE DIDT=TRUE MIN_LINE_WIDTH=0.30MM MIN_NECK_WIDTH=0.20MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM VOLTAGE=4.6V 10% 6.3V X5R 2 402 34 32 1 32 34 32 34 CRITICAL PP3V3_OUT BUCK5_LX NET_SPACING_TYPE=ANLG MIN_LINE_WIDTH=0.25 MM MIN_NECK_WIDTH=0.20 MM C SM L8128 BUCK5_FB 10UF NOSTUFF CRITICAL 1 32 34 C8122 20% 6.3V 2 X5R 603 LDO BYPASS (DISTRIBUTED AND NO DE-RATING) CRITICAL CRITICAL 1 32 34 ADDITIONAL DISTRIBUTED 20UF (NO DE-RATING) 2 2.2UH-20%-3.3A-0.064OHM 32 34 CRITICAL 10% 6.3V 2 X5R 01005 C8143 CRITICAL CRITICAL 20% 2 6.3V X5R-CERM 603 XW8126 1 C8121 22UF PST25201B-SM 32 34 VBUCK0_SW0_G B21 NC_PMU_VBUCK0_SW0_G VBUCK0_SW0_S A21 NC_PMU_VBUCK0_SW0_S 5% 25V 2 NP0-C0G 201 CRITICAL 1 2 32 34 32 34 22UF PP1V2_S2R L8121 NET_SPACING_TYPE=ANLG MIN_LINE_WIDTH=0.25 MM MIN_NECK_WIDTH=0.20 MM C8118 20% 6.3V 2 X5R-CERM 603 2 1 32 34 ADDITIONAL DISTRIBUTED 14UF (NO DE-RATING) TP439 CRITICAL BUCK4_FB (150MA; 2.5-3.55V) 1 PST25201B-SM MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.25 MM NET_SPACING_TYPE=SWITCHNODE DIDT=TRUE (BYPASS RON=0.14 OHM MAX) 0.01UF PPVCC_MAIN 1 BUCK4_LXM TOTAL CAPS = ~400UF (PLACE ONE 1UF CAP AT EACH VDD INPUT) PLACEMENT_NOTE=PLACE NEAR L8225.1 CRITICAL L8119 2.2UH-20%-1.85A-80MOHM VCC_MAIN BYPASS TP264 20% 6.3V 2 X5R-CERM 603 2.2UH-20%-1.85A-80MOHM MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.25 MM NET_SPACING_TYPE=SWITCHNODE DIDT=TRUE C8117 22UF NOSTUFF CRITICAL BUCK4_LXL C8150 TP263 1 2 SM VBUCK3 A19 CPU1V8_SW A20 (RON=0.2 OHM MAX) WDIG_SW B19 (RON=0.5 OHM MAX) 18PF 5% 25V NP0-C0G 2 201 1 NET_SPACING_TYPE=ANLG MIN_LINE_WIDTH=0.25 MM MIN_NECK_WIDTH=0.20 MM 34 32 C8142 XW8117 VBUCK4 B17 CPU1V2_SW A18 (RON=0.1 OHM MAX) DSP_SW B20 (RON=1 OHM MAX) NET_SPACING_TYPE=CRYSTAL 1 PP1V8_S2R PST25201B-SM BUCK3_FB 34 32 PMU_EXTAL 2012 TP418 2 MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.25 MM NET_SPACING_TYPE=SWITCHNODE DIDT=TRUE BUCK5_LX Y8138 32.768K-20PPM-12.5PF 2 SM NOSTUFF BUCK4_FB D14 F1 F2 H1 J1 BUCK5_BYP J2 BUCK5_FB G4 1 BUCK3_LX CRITICAL 1 1 NET_SPACING_TYPE=ANLG MIN_LINE_WIDTH=0.25 MM MIN_NECK_WIDTH=0.20 MM BUCK3_FB D16 VBUS_A L8115 2.2UH-20%-1.85A-80MOHM XW8113 BUCK2_FB BUCK3_LX A16 VBUS_A_OV_N 20% 2 6.3V X5R-CERM 603 CRITICAL 2 MIN_LINE_WIDTH=0.6 MM PST25201B-SM MIN_NECK_WIDTH=0.25 MM NET_SPACING_TYPE=SWITCHNODE DIDT=TRUE BUCK4_LXL A14 BUCK4_LXM B11 P1 XTAL1 P2 XTAL2 NET_SPACING_TYPE=CRYSTAL 10% 6.3V 2 CERM 402 1 BUCK2_LXR A7 B8 BUCK2_LXM A6 BUCK2_LXR A4 BUCK2_FB D7 VCENTER_A 32 ADDITIONAL DISTRIBUTED 30UF (NO DE-RATING) L8110 2.2UH-20%-1.85A-80MOHM BUCK0_LXL A11 BUCK0_LXM A9 BUCK0_FB D9 BUCK2_LXL A10 VDD_BUCK0 B10 A3 B3 VDD_BUCK2 B7 B6 A17 VDD_BUCK3 A13 VDD_BUCK4 B13 E1 VDD_BUCK5 E2 G1 G2 VDD_BUCK5_BYP H2 G22 VCC_MAIN_S N19 P19 VCC_MAIN N20 P20 K2 L4 N9 N4 N10 N6 L2 N7 PP1V8_S2R 22UF 20% 6.3V X5R-CERM 2 603 CHG_B_LX VCC-MAIN 32 C8125 10UF D CHG_A_LX LDO INPUT P-TYPE RDSON=0.0136@VGS=-2.5V ID=12.0A UFBGA (SYM 2 OF 3) C8108 22UF 20% 2 6.3V X5R-CERM 603 CRITICAL XTAL CHANNEL CRITICAL 1 FDMC6683 FDMC6676BZ MOSFET G24 MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.25 MM G25 NET_SPACING_TYPE=SWITCHNODE DIDT=TRUE H24 NC_CHGB H25 L25 BATT_SNS 33 P25 N17 P17 N18 P18 P24 F24 F25 A22 A23 B24 NC_VBUS_A_OV_N J24 J25 PMU_VCENTER MIN_LINE_WIDTH=0.60MM P22 MIN_NECK_WIDTH=0.25MM NET_SPACING_TYPE=PWR P23 MAX_NECK_LENGTH=3 MM VOLTAGE=6V N22 BUCK D8100 3 USB/BAT 1 2 MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.25 MM NET_SPACING_TYPE=SWITCHNODE DIDT=TRUE 1 22UF 2 MIN_LINE_WIDTH=0.6 MM PST25201B-SM MIN_NECK_WIDTH=0.25 MM NET_SPACING_TYPE=SWITCHNODE DIDT=TRUE ALISON-A0-OTPXX D1946A0-110-00 SW_CHGA 2 BUCK2_LXM LDO 2 PIME061E-SM DCR=54MOHM MAX 1 CRITICAL C8107 1 2.2UH-20%-1.85A-80MOHM U8100 SWITCH POWER 1 PPVCC_MAIN 35 34 32 CRITICAL L8107 This bull shits from APPLE have OMIT manufacturer of the PMIC and not only! CRITICAL SHIT TP372 1 10% 6.3V X5R 2 402 CRITICAL C8152 4.7UF 1 20% 6.3V X5R-CERM1 2 402 3 Apple Inc. CRITICAL C8151 1UF R 1 10% 6.3V CERM 2 402 NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 2 051-8962 SIZE D REVISION A.0.0 BRANCH PAGE 81 OF 106 SHEET 34 OF 42 1 A 8 7 6 5 4 2 3 TP364 1 1 D OMIT 28 IN TP172 4 IN 31 IN TP347 TP358 (DOCK CONN) (BETWEEN WLED AND CHARGER) (H4P) (PANEL) 16 1 1 CRITICAL R8216 C8215 100PF C 1 2 5% 6.3V 2 CERM 01005 1 CRITICAL 10KOHM-1% R8222 0201 10KOHM-1% C8221 1 100PF TP294 CRITICAL 2 2 100PF C8223 100PF 5% 6.3V CERM 2 01005 100PF 5% 6.3V CERM 2 01005 XW8200 1 BOARD_TEMP2_N SM XW8203 BOARD_TEMP4_N 1 402 1/16W 1 MF L8225 32 1 D8228 1 39 19 10 5 IN 39 19 10 5 BI 39 5 IN 10UF 1 DCR=106MOHM MAX 22UF 16 2 20% 25V X5R-CERM 0805 16 1 C8234 1UF 10% 25V 2 X5R 402 1 C8235 1UF 10% 25V 2 X5R 402 NET_SPACING_TYPE=ANLG (INTERNAL PULL-DOWN) NET_SPACING_TYPE=ANLG OUT OUT LED_IO_1 MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM LED_IO_2 1 1 C8232 OUT 1UF 1 MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM 1% 1/20W MF 201 10% 25V 2 X5R 402 16 16 16 OUT OUT OUT LED_IO_3 MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM LED_IO_4 1 MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM 1.00 1% 1/20W MF 201 LED_IO_5 LED_IO_6 2 (INTERNAL PULL-DOWN) F21 DWI_CK (INTERNAL PULL-DOWN) D22 DWI_DI E21 DWI_DO DWI_AP_CLK DWI_AP_DO DWI_AP_DI N15 P15 N23 L11 L12 N13 P13 L13 L14 LED_IO1_R LED_IO2_R LED_IO3_R LED_IO4_R LED_IO5_R LED_IO6_R 1 1.00 1% 1/20W MF 201 1.00 1% 1/20W MF 201 2 MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM TP331 C8201 2 1UF MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM 1 2 1.00 1% 1/20W MF 201 VOUT_LED WLED1 WLED2 WLED3 WLED4 WLED5 WLED6 1 10% 25V X5R 2 402 TP365 R8239 WLED_LX PLACEMENT_NOTE=PLACE NEAR U8100.N23 TP332 MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM R8240 1 2 MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM C24 KEEPACT B1 SHDN A25 SCL A24 SDA I2C0_SCL_1V8 I2C0_SDA_1V8 TP376 TP377 R8232 R8235 MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM 1% 1/20W MF 201 R8231 1.00 1.00 TDEV1 TDEV2 TDEV3 TDEV4 TBAT TCAL (INTERNAL PULL-DOWN) F20 RESET_IN D24 RESET* (PULLUP INSIDE H4P) B25 IRQ* RST_PMU_IN RST_AP_L IRQ_PMU_L R8227 PPLED_OUT C8233 NET_SPACING_TYPE=ANLG NET_SPACING_TYPE=SWITCHNODE DIDT=TRUE SOD-323 TP357 1 NET_SPACING_TYPE=ANLG WLED_LX 16 CRITICAL IN OUT NET_SPACING_TYPE=ANLG PM_KEEPACT PMU_SHDWN MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.25 MM 20% 10V X5R 2 603 32 39 5 39 5 M25 M24 L22 L24 N24 N25 NET_SPACING_TYPE=ANLG 2 PIME051E-SM C8226 B OUT OUT BOARD_TEMP1 BOARD_TEMP2 BOARD_TEMP3 BOARD_TEMP4 BATTERY_NTC PMU_TCAL TP378 PMEG4010BEA 2 IN 5 DWI NAMING RELATIVE TO AP CRITICAL 4.7UH-3.2A IN 31 28 4 PLACE CLOSE TO PMU =PPVCC_MAIN_LED IN TP360 PLACE CLOSE TO PMU CRITICAL 5 37 4 PLACE CLOSE TO PMU PLACE CLOSE TO PMU TP355 3.92K 0.1% RESISTOR FOR TEMP CALIBRATION NOSTUFF 2 R8219 PLACE CLOSE TO PMU 2 SM SM TP342 SM 1 TP354 NOSTUFF 2 NOSTUFF 2 NOSTUFF TP227 XW8201 BOARD_TEMP3_N XW8202 1 5% 6.3V CERM 2 01005 1 16 1 C8220 0201 1 IN 2 CRITICAL 10KOHM-1% C8217 33 NOTE: TDEV4 NTC ON PANEL R8218 0201 5% 6.3V CERM 2 01005 BOARD_TEMP1_N K24 ACC_ID K22 BRICK_ID K25 ADC_IN7 PORT_DOCK_ACCID USB_BRICKID ADC_IN7 REFERENCES IN DIGITAL INPUT 28 TP348 IREF VREF VDD_REF VDD_REF_A VDD_RTC ADC_REF GPIO IN FW_DET BUTTON1 BUTTON2 BUTTON3 ACC_DET_A ACC_DET_B N2 N1 H22 K4 P7 N8 NET_SPACING_TYPE=ANLG C8209 1UF 10% 6.3V 2 CERM 402 1 U8100 ALISON-A0-OTPXX D1946A0-110-00 C8210 0.22UF 20% 6.3V 2 X5R 0201 PLACEMENT NOTE: PLACE NEAR PIN H22 B2 B4 NET_SPACING_TYPE=ANLG PMU_ADC_REF NET_SPACING_TYPE=ANLG MIN_LINE_WIDTH=0.1MM MIN_NECK_WIDTH=0.1MM E24 E25 G21 D25 G20 H21 H20 J20 J21 K19 NC_PMU_AMUX_A0 NC_PMU_AMUX_A1 NC_PMU_AMUX_A2 NC_PMU_AMUX_A3 NC_PMU_AMUX_AY NC_PMU_AMUX_B0 NC_PMU_AMUX_B1 NC_PMU_AMUX_B2 NC_PMU_AMUX_B3 NC_PMU_AMUX_BY VLCM1 P12 VLCM3 L10 0.1UF 1 UFBGA (SYM 3 OF 3) VSS_BUCK02 A8 B9 PMU_VDD_RTC AMUX_A0 AMUX_A1 AMUX_A2 AMUX_A3 AMUX_AY AMUX_B0 AMUX_B1 AMUX_B2 AMUX_B3 AMUX_BY LCM2_EN C25 VLCM2 N11 C8212 10% 6.3V 2 X5R 201 CLK_32K_PMU CLK_32K_WLAN RST_BT_L RST_WLAN_L RST_BB_PMU_L BATTERY_SWI PM_BT_HOST_WAKE PM_WLAN_HOST_WAKE PM_BB_HOST_WAKE AUD_MIK_HS1_INT_L DOCK_BB_EN CLK_32K_GPS NC_PMU_GPIO13 RST_L63_L IRQ_HALL NC_PMU_GPIO16 NC_PMU_GPIO17 NC_PMU_GPIO18 VBOOST_LCM N12 MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM PMU_IREF NET_SPACING_TYPE=ANLG PMU_VREF NET_SPACING_TYPE=ANLG PMU_VDD_REF D11 D12 D13 D18 D19 D20 D15 D17 E20 D21 B22 B23 L18 L19 L20 K20 K21 L21 VDD_LCM N21 VDD_LCM_SW P21 LCM_LX P16 2 1 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 I2C ADDRESS: 0111100X (0X78) TP327 D 1% 1/20W MF 2 201 PLACEMENT NOTE: PLACE NEAR PIN K4 ANALOG MUX 25 5 FW_ZENER_PWR HOME_L ONOFF_L SRL_L PORT_DOCK_ACC_DET_L LCM/GRAPE IN (INTERNAL PULL-DOWN) F22 L15 L16 L17 A2 A1 PMU_ACC_DET_B R8203 200K OMIT UFBGA (SYM 1 OF 3) 1% 1/20W MF 2 201 ANALOG INPUT IN 25 5 220K TEMPERATURE IN 29 5 ALISON-A0-OTPXX D1946A0-110-00 R8202 WDOG 28 13 1 10% 6.3V X5R 01005 2 RESET 0.01UF 10% 6.3V 2 X5R 01005 10% 6.3V 2 X5R 201 U8100 32 34 35 I2C & DWI 0.01UF PPVCC_MAIN C8207 1 LED BACKLIGHT C8206 0.1UF VIB 1 C8204 1 PPVCC_MAIN 32 34 35 PP6V0_LCM_HI LCM_LX PP6V0_LCM_VBOOST NC_LCM2_EN NC_VLCM2 NC_VLCM1 OUT 18 39 OUT 30 39 OUT 30 OUT 30 OUT 31 IN 5 33 IN 30 IN 30 IN 31 IN 19 OUT 11 OUT 31 39 OUT 19 IN 25 1 (1.8 PUSH-PULL) (1.8_S2R PUSH-PULL) (1.8_S2R;NO PD REQ’D PER BB TEAM) 2 (1.8_S2R;NO PD REQ’D PER BB TEAM) (PU TO BATTERY IN BB) (2.5V ALWAYS ON PU IN BMU) (INTERNAL PD) (INTERNAL PD) (INTERNAL PD; CAN’T BE USED FOR 32K (INTERNAL PU TO PP1V8_S2R) (1.8_S2R;EXT PD BY BB MUXES) (1.8 PUSH-PULL) 2.2UF 1 20% 10V X5R-CERM 2 402 1 1000PF 10% 6.3V X5R 01005 D4 VSS_BUCK2 D5 D6 VSS_BUCK04 VSS_BUCK34 E4 E5 VSS_BUCK5 E6 E7 VSSA_BUCK0 VSSA_BUCK2 VSSA_BUCK3 VSSA_BUCK4 VSSA_BUCK5 PVSS_CHG_A PVSS_CHG_B E8 E9 CLK OUTPUT) E10 E11 E12 E13 E14 E15 (EXTERNAL PU) VSS_WLED VSS_LCM E16 TP29 E17 E18 E19 F4 F5 (WHAT SIGNALS DO YOU WANT MEASURED DICK,COCK?) F6 F7 F8 F9 F10 CRITICAL SHIT! (NOTE: 2MHZ) L8229 F11 VSS F12 F13 2.2UH-1.05A-0.195OHM TP356 1 CRITICAL 2 MAKE_BASE=TRUE VLS201612E-SM VOLTAGE=5V MIN_LINE_WIDTH=0.4MM MIN_NECK_WIDTH=0.2MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM NET_SPACING_TYPE=SWITCHNODE DIDT=TRUE D8230 F14 F15 PMEG2005AEL 1 2 F16 SOD882 (INTERNAL PULLDOWN; TE ENABLE) C8237 1 10UF TP83 20% 10V 2 X5R 603 F17 F18 MAKE_BASE=TRUE VOLTAGE=6V MIN_LINE_WIDTH=0.4MM MIN_NECK_WIDTH=0.2MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM BB_VBUS_DET OUT C8236 C2 28 C8214 F19 VSS G5 G6 31 G7 C8238 G8 G9 1UF 10% 6.3V 2 CERM 402 G10 G11 TP366 G12 G13 G14 MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM TP324 G15 G16 G17 G18 G19 H4 H5 H6 TP408 H7 H8 H9 TP413 H10 TP375 H11 H12 TP84 A A5 B5 A12 B12 A15 B15 D1 D2 D10 D8 B16 B14 C1 E22 J22 N14 P14 N16 N3 L8 L6 K18 K16 K14 K12 K10 K8 K6 J19 J17 J15 J13 J11 J9 J7 J5 H19 H13 H14 H15 H16 H17 H18 J4 J6 J8 J10 J12 J14 J16 J18 K5 K7 K9 K11 K13 K15 K17 L5 L7 L9 SYNC_MASTER=YOSH PAGE TITLE C B SYNC_DATE=N/A POWER: PMU DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 051-8962 SIZE D REVISION A.0.0 BRANCH PAGE 82 OF 106 SHEET 35 OF 42 1 A 8 7 6 5 4 3 2 1 D D C C K48 POWER BUDGET CRITICAL PEAK=0.12A AVG=0.12A Q8350 CSD68803W15 BGA TP379 D C3 C2 B3 A3 C1 B2 B1 A2 1 NOSTUFF 1 R8351 39K 10K 1% 1/20W MF 2 201 TP76 PM_P3V3MLC_EN D 3 R8352 1 47K 1% 1/20W MF 201 2 2 1% 1/20W MF 201 0 R8354_SS TP77 1 TP79 Q8351 6 IN 1 G S 2 PM_MLC_PWR_EN 1 1000PF CSD68803 10% 6.3V X5R 0201 SOD-VESM-HF TP72 C8353 10% 16V 2 X7R 201 2 PM_P3V3MLCWR_SS SSM3K15FV B 1 0.015UF 2 5% 1/20W MF 201 C8352 32 C8351 R8354 1 1 10% 6.3V 2 X5R-CERM 603 A1 R8353 PP3V3_MLC_OUT 4.7UF G =PP3V3_MLC_HI S 32 R8350 MOSFET CSD68803W15 CHANNEL P-TYPE RDS(ON) 52MOHM @-1.8V IMAX 4 A VGS MAX +/- 6V B 100K 1% 1/20W MF 2 201 TP66 TP78 TP80 TABLE_ALT_HEAD PART NUMBER ALTERNATE FOR PART NUMBER 376S0972 376S0612 BOM OPTION REF DES COMMENTS: Q8351 RADAR:8537160 TABLE_ALT_ITEM A SYNC_MASTER=YOSH SYNC_DATE=N/A PAGE TITLE POWER: 3.3V MLC & 1.2V VR DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 051-8962 SIZE D REVISION A.0.0 BRANCH PAGE 83 OF 106 SHEET 36 OF 42 1 A 8 7 6 5 4 3 2 1 DEBUG RESET ACCESS D D PLACE OUTSIDE OF CAN? 34 32 PPBATT_VCC NOSTUFF 1 5 OUT PWR_ON_LED NOSTUFF 1 R9000 300 A 5% 1/20W MF 2 201 B TP374 1% 1/20W MF 2 201 FORCE_DFU C R9002 1.5K TP38 35 TP33 OUT PMU_SHDWN 1 NOSTUFF R9001 300 NOSTUFF 5% 1/20W MF 2 201 LED9000 RED-50MCD-20MA 0603 C K B LEFT AND RIGHT MOUNTING TABS MT1 BRKT-MTG-TAB-MLB-K93K94 SM 1 2 A SYNC_MASTER=MIKE PAGE TITLE SYNC_DATE=N/A DEBUG AND MISC DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 051-8962 SIZE D REVISION A.0.0 BRANCH PAGE 90 OF 106 SHEET 37 OF 42 1 A 8 7 6 5 4 3 2 1 D D PLATED THROUGH HOLES C C DRILL SIZE: 1.1MM X 0.4MM PLATING SIZE: 1.4MM X 0.7MM SL9300 1 TH-NSP SL-1.1X0.4-1.4X0.7 SL9302 1 TH-NSP SL-1.1X0.4-1.4X0.7 SL9303 1 TH-NSP SL-1.1X0.4-1.4X0.7 SL9304 B 1 TH-NSP B SL-1.1X0.4-1.4X0.7 SL9305 1 TH-NSP SL-1.1X0.4-1.4X0.7 SL9306 1 TH-NSP SL-1.1X0.4-1.4X0.7 A SYNC_MASTER=MIKE SYNC_DATE=N/A PAGE TITLE FCT/ICT TEST/BRACKETS DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 051-8962 SIZE D REVISION A.0.0 BRANCH PAGE 93 OF 106 SHEET 38 OF 42 1 A 8 7 6 5 4 2 3 1 Clock Signal Constraints USB TABLE_PHYSICAL_ASSIGNMENT_HEAD NET_PHYSICAL_TYPE AREA_TYPE PHYSICAL_RULE_SET CLK_50S * 50_OHM_SE TABLE_PHYSICAL_ASSIGNMENT_ITEM JTAG TABLE_PHYSICAL_ASSIGNMENT_HEAD NET_PHYSICAL_TYPE AREA_TYPE PHYSICAL_RULE_SET USB_90D * 90_OHM_DIFF TABLE_SPACING_ASSIGNMENT_HEAD NET_SPACING_TYPE1 D NET_SPACING_TYPE2 AREA_TYPE TABLE_PHYSICAL_ASSIGNMENT_ITEM SPACING_RULE_SET TABLE_SPACING_ASSIGNMENT_HEAD NET_SPACING_TYPE1 NET_SPACING_TYPE2 AREA_TYPE SPACING_RULE_SET JTAG * * 2:1_SPACING D TABLE_SPACING_ASSIGNMENT_ITEM * CLK * 5:1_SPACING TABLE_SPACING_ASSIGNMENT_ITEM TABLE_SPACING_ASSIGNMENT_HEAD NET_SPACING_TYPE1 NET_SPACING_TYPE2 AREA_TYPE SPACING_RULE_SET TABLE_SPACING_ASSIGNMENT_ITEM NET_TYPE ELECTRICAL_CONSTRAINT_SET CLK_50S CLK_50S CLK_50S CLK_50S CLK_50S CLK_50S CLK_50S CLK_50S I63 I162 I81 I88 I89 I95 I96 I94 I131 I157 I158 CLK_32K_PMU CLK_32K_WLAN CLK_32K_GPS CLK_CAM_FF CLK_CAM_FF_FILT CLK_CAM_FF_CONN CLK_CAM_RF CLK_CAM_RF_FILT CLK CLK CLK CLK CLK CLK CLK CLK CLK_50S CLK_50S CLK_50S CLK_50S I130 USB NET_TYPE SPACING PHYSICAL I2S_AP_0_MCK I2S_AP_0_MCK_R CLK_CAM_FF_R CLK_CAM_RF_R CLK CLK CLK CLK ELECTRICAL_CONSTRAINT_SET 18 35 JTAG JTAG JTAG JTAG JTAG I16 30 35 I15 31 35 I14 7 26 I13 I20 25 26 JTAG_AP_TCK JTAG_AP_TMS JTAG_AP_TDI JTAG_AP_TDO JTAG_AP_TRST_L 4 10 4 10 4 10 50_OHM_SE I6 I7 I82 I83 5 I84 5 19 I85 7 I128 7 I129 I171 AREA_TYPE USB_90D USB_90D USB_90D USB_90D USB USB USB USB USB_D_P USB_D_N USB_PT_DK_CON_D_P USB_PT_DK_CON_D_N USB_90D USB_90D USB_90D USB_90D USB USB USB USB USB_BB_D_P USB_BB_D_N USB_FS_D_P USB_FS_D_N USB_90D USB_90D USB_90D USB_90D USB USB USB USB USB_FS_N_ACC_TX USB_FS_P_ACC_RX ACC_PT_DK_CON_TX ACC_PT_DK_CON_RX I172 4 28 4 28 28 29 28 29 11 31 11 31 4 11 4 11 11 28 11 28 28 29 28 29 PHYSICAL_RULE_SET TABLE_PHYSICAL_ASSIGNMENT_HEAD PHYSICAL_RULE_SET I5 7 27 TABLE_PHYSICAL_ASSIGNMENT_HEAD * SPACING PHYSICAL I8 NET_PHYSICAL_TYPE AREA_TYPE ELECTRICAL_CONSTRAINT_SET 4 28 25 27 NAND NAND_50S 5:1_SPACING NET_TYPE 4 28 I2C NET_PHYSICAL_TYPE * * SPACING PHYSICAL TABLE_PHYSICAL_ASSIGNMENT_ITEM I2C_50S * 50_OHM_SE TABLE_PHYSICAL_ASSIGNMENT_ITEM TABLE_SPACING_ASSIGNMENT_HEAD NET_SPACING_TYPE1 NET_SPACING_TYPE2 AREA_TYPE SPACING_RULE_SET I2C * * 1.5:1_SPACING TABLE_SPACING_ASSIGNMENT_HEAD C NET_SPACING_TYPE1 NET_SPACING_TYPE2 AREA_TYPE SPACING_RULE_SET NAND * * 2:1_SPACING C TABLE_PHYSICAL_ASSIGNMENT_HEAD PHYSICAL ELECTRICAL_CONSTRAINT_SET SPACING I45 I48 I47 I46 I163 I164 I166 I165 I41 I42 I43 I44 I37 I49 I51 I52 I53 I54 I167 I168 I169 I170 I55 I56 I57 I58 I59 F0AD<7..0> F0CE0_L F0CE1_L F0CE2_L F0CE3_L F0CE4_L F0CE5_L F0CE6_L F0CE7_L F0CLE F0ALE F0RE_L F0WE_L F0WP_L F1AD<7..0> F1CE0_L F1CE1_L F1CE2_L F1CE3_L F1CE4_L F1CE5_L F1CE6_L F1CE7_L F1CLE F1ALE F1RE_L F1WE_L F1WP_L NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND I3 6 12 I4 6 12 I61 6 12 I62 6 12 I98 6 12 I99 6 12 I100 6 12 I101 6 12 I102 6 12 I103 6 12 SPACING PHYSICAL I2C_50S I2C_50S I2C_50S I2C_50S I2C_50S I2C_50S I2C_50S I2C_50S I2C_50S I2C_50S I2C_50S I2C_50S I1 I2 NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S I50 NET_PHYSICAL_TYPE NET_TYPE NET_TYPE ELECTRICAL_CONSTRAINT_SET B I2S TABLE_SPACING_ASSIGNMENT_ITEM TABLE_SPACING_ASSIGNMENT_ITEM AREA_TYPE TABLE_PHYSICAL_ASSIGNMENT_ITEM I2S_90S I2C1_SDA_1V8 I2C1_SCL_1V8 I2C0_SDA_1V8 I2C0_SCL_1V8 I2C2_SDA_3V0 I2C2_SCL_3V0 ISP_AP_0_SCL ISP_AP_0_SDA ISP_AP_1_SCL ISP_AP_1_SDA I2C2_SCL_3V0_ALS I2C2_SDA_3V0_ALS I2C I2C I2C I2C I2C I2C I2C I2C I2C I2C I2C I2C * 45_OHM_SE 5 25 5 25 5 10 19 35 TABLE_SPACING_ASSIGNMENT_HEAD NET_SPACING_TYPE1 NET_SPACING_TYPE2 AREA_TYPE SPACING_RULE_SET I2S * * 3:1_SPACING I2S I2S * 2:1_SPACING TABLE_SPACING_ASSIGNMENT_ITEM 5 10 19 35 5 25 26 TABLE_SPACING_ASSIGNMENT_ITEM 5 25 26 7 25 7 25 NET_TYPE 7 26 7 26 ELECTRICAL_CONSTRAINT_SET 25 26 I140 25 26 I143 6 12 I2C_50S I2C_50S I124 6 12 I125 I141 ISP_CAM_1_SCL ISP_CAM_1_SDA I2C I2C 25 26 I159 25 26 I144 I148 6 12 I147 6 12 I146 6 12 I160 6 12 XTAL 6 12 I145 I149 6 12 TABLE_SPACING_ASSIGNMENT_HEAD NET_SPACING_TYPE1 6 12 6 12 NET_SPACING_TYPE2 AREA_TYPE I150 SPACING_RULE_SET I151 TABLE_SPACING_ASSIGNMENT_ITEM CRYSTAL 6 12 * * 6 12 5:1_SPACING SPACING PHYSICAL I2S_50S I2S_50S I2S_50S I2S_50S I2S_50S I2S_50S I2S_50S I2S_50S I2S_50S I2S_50S I2S_50S I2S_50S I2S_50S I2S_50S I2S_50S I142 6 12 PHYSICAL_RULE_SET I161 I2S_AP_0_BCLK I2S_AP_0_LRCK I2S_AP_0_DIN I2S_AP_0_DOUT L63_ASP_SDOUT I2S_AP_2_BCLK I2S_AP_2_LRCK I2S_AP_2_DIN I2S_AP_2_DOUT L63_VSP_SDOUT I2S_AP_3_BCLK I2S_AP_3_LRCK I2S_AP_3_DIN I2S_AP_3_DOUT L63_XSP_SDOUT I2S I2S I2S I2S I2S I2S I2S I2S I2S I2S I2S I2S I2S I2S I2S 5 19 5 19 5 19 5 19 19 5 19 30 5 19 30 5 19 30 5 19 30 19 5 19 5 19 B 5 19 5 19 19 NET_TYPE 6 12 ELECTRICAL_CONSTRAINT_SET 6 12 6 12 SPACING PHYSICAL XTAL_24M_I XTAL_24M_O 24M_O CRYSTAL CRYSTAL CRYSTAL I92 I90 I93 4 DWI 4 TABLE_SPACING_ASSIGNMENT_HEAD 4 NET_SPACING_TYPE1 NET_SPACING_TYPE2 AREA_TYPE SPACING_RULE_SET DWI * * 2:1_SPACING TABLE_SPACING_ASSIGNMENT_ITEM NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S NAND_50S I105 I104 I106 I108 I107 I109 I110 I111 I113 I112 I114 I115 I116 I117 A I118 I119 I120 I121 I122 I123 F2AD<7..0> F2CE0_L F2CE1_L F2CE2_L F2CE3_L F2CLE F2ALE F2RE_L F2WE_L F2WP_L F3AD<7..0> F3CE0_L F3CE1_L F3CE2_L F3CE3_L F3CLE F3ALE F3RE_L F3WE_L F3WP_L NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NET_TYPE ELECTRICAL_CONSTRAINT_SET VREF NET_SPACING_TYPE1 NET_SPACING_TYPE2 AREA_TYPE SPACING_RULE_SET VREF * * 5:1_SPACING I153 I156 TABLE_SPACING_ASSIGNMENT_ITEM SPACING DWI_AP_CLK DWI_AP_DI DWI_AP_DO DWI DWI DWI I152 TABLE_SPACING_ASSIGNMENT_HEAD PHYSICAL 5 35 5 35 5 35 NET_TYPE ELECTRICAL_CONSTRAINT_SET I136 I137 I139 I138 SPACING PHYSICAL VREF VREF VREF VREF PPVREF_DDR0_CA PPVREF_DDR0_DQ PPVREF_DDR1_CA PPVREF_DDR1_DQ 8 8 8 8 SYNC_MASTER=MIKE CONSTRAINTS: ASSIGNMENTS DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 SYNC_DATE=N/A PAGE TITLE 6 5 4 3 2 051-8962 SIZE D REVISION A.0.0 BRANCH PAGE 100 OF 106 SHEET 39 OF 42 1 A 8 7 6 5 4 2 3 1 AUDIO/SPEAKER ANALOG VIDEO CONSTRAINTS TABLE_PHYSICAL_ASSIGNMENT_HEAD TABLE_PHYSICAL_RULE_HEAD PHYSICAL_RULE_SET LAYER ALLOW ROUTE ON LAYER? MINIMUM LINE WIDTH MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAP VID_50S * Y =50_OHM_SE =50_OHM_SE =50_OHM_SE =STANDARD =STANDARD NET_PHYSICAL_TYPE AREA_TYPE PHYSICAL_RULE_SET AUDIO * 1:1_DIFFPAIR SPEAKER * SPEAKER TABLE_PHYSICAL_ASSIGNMENT_ITEM TABLE_PHYSICAL_RULE_ITEM TABLE_PHYSICAL_ASSIGNMENT_ITEM TABLE_SPACING_ASSIGNMENT_HEAD NET_SPACING_TYPE1 NET_SPACING_TYPE2 AREA_TYPE SPACING_RULE_SET ANALOG_VIDEO * * 5:1_SPACING TABLE_SPACING_ASSIGNMENT_HEAD TABLE_SPACING_ASSIGNMENT_ITEM LVDS TABLE_SPACING_ASSIGNMENT_ITEM ANALOG_VIDEO * ANALOG_VIDEO D 3:1_SPACING NET_SPACING_TYPE1 NET_SPACING_TYPE2 AREA_TYPE SPACING_RULE_SET AUDIO * * 3:1_SPACING TABLE_SPACING_ASSIGNMENT_ITEM TABLE_PHYSICAL_ASSIGNMENT_HEAD NET_PHYSICAL_TYPE AREA_TYPE PHYSICAL_RULE_SET LVDS_100D * 90_OHM_DIFF ELECTRICAL_CONSTRAINT_SET I213 I214 I215 I232 I231 I233 I219 I220 I221 I222 I224 I223 PHYSICAL SPACING ELECTRICAL_CONSTRAINT_SET SPACING PHYSICAL TABLE_SPACING_ASSIGNMENT_HEAD NET_SPACING_TYPE1 VID_50S VID_50S VID_50S ANALOG_VIDEO ANALOG_VIDEO ANALOG_VIDEO DAC_AP_OUT1 DAC_AP_OUT2 DAC_AP_OUT3 VID_50S VID_50S VID_50S ANALOG_VIDEO ANALOG_VIDEO ANALOG_VIDEO BUF_C_Y BUF_CVBS_PB BUF_Y_PR NET_SPACING_TYPE2 AREA_TYPE SPACING_RULE_SET * * 4:1_SPACING I287 TABLE_SPACING_ASSIGNMENT_ITEM LVDS 7 11 I288 I289 7 11 I290 NET_TYPE 7 11 ELECTRICAL_CONSTRAINT_SET 11 I359 SPACING PHYSICAL I291 11 LVDS_100D LVDS_100D LVDS_100D LVDS_100D I175 11 I174 VID_50S VID_50S VID_50S ANALOG_VIDEO ANALOG_VIDEO ANALOG_VIDEO VIDEO_EMI_CVBS_PB 10 VIDEO_EMI_C_Y 10 11 28 VIDEO_EMI_Y_PR 10 11 28 VID_50S VID_50S VID_50S ANALOG_VIDEO ANALOG_VIDEO ANALOG_VIDEO VIDEO_PT_DK_CON_CVBS_PB VIDEO_PT_DK_CON_C_Y 28 29 VIDEO_PT_DK_CON_Y_PR 28 29 11 28 I245 I244 28 29 I178 I234 I235 LVDS_DATA_P<2..0> 14 16 LVDS_DATA_N<2..0> 14 16 LVDS_DATA_CONN_P<2..0> LVDS_DATA_CONN_N<2..0> LVDS LVDS LVDS LVDS LVDS_100D LVDS_100D LVDS_100D LVDS_100D I176 D NET_TYPE TABLE_PHYSICAL_ASSIGNMENT_ITEM NET_TYPE I292 I293 I294 16 I357 16 I371 LVDS_CLK_P 14 16 LVDS_CLK_N 14 16 LVDS_CLK_CONN_P 16 LVDS_CLK_CONN_N 16 LVDS LVDS LVDS LVDS I372 AUDIO AUDIO AUDIO AUDIO AUDIO AUDIO AUDIO AUDIO AUDIO AUDIO AUDIO AUDIO AUDIO AUDIO AUDIO AUDIO AUDIO AUDIO AUDIO AUDIO AUDIO AUDIO AUDIO AUDIO LEFT_CH_OUT_P LEFT_CH_OUT_REF LEFT_CH_P SSM2375_L_IN_P SSM2375_L_IN_N RIGHT_CH_OUT_P RIGHT_CH_OUT_REF RIGHT_CH_P SSM2375_R_IN_P SSM2375_R_IN_N 19 20 19 20 20 20 20 19 20 19 20 20 20 20 EXT_MIC_P EXT_MIC_REF 19 23 19 23 DISPLAYPORT TABLE_PHYSICAL_ASSIGNMENT_HEAD C MIPI NET_PHYSICAL_TYPE AREA_TYPE PHYSICAL_RULE_SET DP_100D * 90_OHM_DIFF C TABLE_PHYSICAL_ASSIGNMENT_ITEM TABLE_PHYSICAL_ASSIGNMENT_HEAD NET_PHYSICAL_TYPE AREA_TYPE PHYSICAL_RULE_SET MIPI_100D * 90_OHM_DIFF SDIO TABLE_SPACING_ASSIGNMENT_HEAD NET_SPACING_TYPE1 TABLE_PHYSICAL_ASSIGNMENT_ITEM NET_SPACING_TYPE2 AREA_TYPE SPACING_RULE_SET TABLE_SPACING_ASSIGNMENT_ITEM DP * TABLE_PHYSICAL_ASSIGNMENT_HEAD 5:1_SPACING * NET_PHYSICAL_TYPE AREA_TYPE PHYSICAL_RULE_SET SDIO_50S * 50_OHM_SE TABLE_SPACING_ASSIGNMENT_HEAD NET_SPACING_TYPE1 NET_SPACING_TYPE2 AREA_TYPE SPACING_RULE_SET TABLE_PHYSICAL_ASSIGNMENT_ITEM NET_TYPE TABLE_SPACING_ASSIGNMENT_ITEM MIPI * 4:1_SPACING * ELECTRICAL_CONSTRAINT_SET MIPI_100D MIPI_100D MIPI_100D MIPI_100D MIPI_100D MIPI_100D MIPI_100D MIPI_100D MIPI_100D MIPI_100D I91 I92 I93 I94 I95 I96 I271 I270 I97 I98 MIPI_100D MIPI_100D MIPI_100D MIPI_100D MIPI_100D MIPI_100D MIPI_100D MIPI_100D I311 I312 I315 I316 B PHYSICAL I341 I344 I343 I342 I249 SPACING MIPI MIPI MIPI MIPI MIPI MIPI MIPI MIPI MIPI MIPI MIPI MIPI MIPI MIPI MIPI MIPI MIPI MIPI MIPID_AP_DATA_P<0> MIPID_AP_DATA_N<0> MIPID_AP_DATA_P<1> MIPID_AP_DATA_N<1> MIPID_AP_DATA_P<2> MIPID_AP_DATA_N<2> MIPID_AP_DATA_P<3> MIPID_AP_DATA_N<3> MIPID_AP_CLK_P 7 14 MIPID_AP_CLK_N 7 14 SPACING TABLE_SPACING_ASSIGNMENT_HEAD DP_100D DP_100D DP_100D DP_100D DP_100D DP_100D DP_100D DP_100D DP_100D DP_100D DP_100D DP_100D DP_100D DP_100D DP_100D DP_100D DP_100D DP_100D I247 NET_TYPE ELECTRICAL_CONSTRAINT_SET PHYSICAL I248 7 14 I250 7 14 I251 7 14 I252 7 14 I273 7 14 I274 7 14 I275 7 14 I276 7 14 MIPI0C_AP_DATA_P<0> 7 MIPI0C_AP_DATA_N<0> 7 MIPI0C_AP_CLK_P 7 27 MIPI0C_AP_CLK_N 7 27 MIPI0C_CAM_DATA_P<0> MIPI0C_CAM_DATA_N<0> MIPI0C_CAM_CLK_P 25 27 MIPI0C_CAM_CLK_N 25 27 I277 I272 I327 I329 27 27 I328 I331 I330 I332 DP_AP_TX_P<0> 7 10 13 DP_AP_TX_N<0> 7 10 13 DP_AP_TX_P<1> 7 10 13 DP_AP_TX_N<1> 7 10 13 DP_AP_AUX_P 7 13 DP_AP_AUX_N 7 13 DP_EMI_TX_P<0> 13 28 DP_EMI_TX_N<0> 13 28 DP_EMI_TX_P<1> 13 28 DP_EMI_TX_N<1> 13 28 DP_EMI_AUX_P 13 28 DP_EMI_AUX_N 13 28 DP_PT_DK_CON_TX_P<0> 28 DP_PT_DK_CON_TX_N<0> 28 DP_PT_DK_CON_TX_P<1> 28 DP_PT_DK_CON_TX_N<1> 28 DP_PT_DK_CON_AUX_P 28 29 DP_PT_DK_CON_AUX_N 28 29 DP DP DP DP DP DP DP DP DP DP DP DP DP DP DP DP DP DP NET_SPACING_TYPE1 NET_SPACING_TYPE2 AREA_TYPE SPACING_RULE_SET SDIO * * 2:1_SPACING SDIO_CLK * * 4:1_SPACING TABLE_SPACING_ASSIGNMENT_ITEM TABLE_SPACING_ASSIGNMENT_ITEM NET_TYPE ELECTRICAL_CONSTRAINT_SET I200 I280 I201 I202 29 SPACING PHYSICAL SDIO_50S SDIO_50S SDIO_CLK SDIO_CLK SDIO_WL_CLK SDIO_WL_CLK_R SDIO_50S SDIO_50S SDIO SDIO SDIO_WL_CMD 5 30 SDIO_WL_DATA<3..0> 5 5 30 30 29 29 29 SPI 25 27 B TABLE_PHYSICAL_ASSIGNMENT_HEAD 25 27 NET_PHYSICAL_TYPE AREA_TYPE PHYSICAL_RULE_SET SPI_50S * 45_OHM_SE TABLE_PHYSICAL_ASSIGNMENT_ITEM TABLE_SPACING_ASSIGNMENT_HEAD NET_SPACING_TYPE1 NET_SPACING_TYPE2 AREA_TYPE SPACING_RULE_SET SPI * * 2:1_SPACING TABLE_SPACING_ASSIGNMENT_ITEM MIPI_100D MIPI_100D MIPI_100D MIPI_100D MIPI_100D MIPI_100D MIPI_100D MIPI_100D I345 I346 I347 I348 I353 I355 I354 I356 MIPI MIPI MIPI MIPI MIPI MIPI MIPI MIPI MIPI1C_AP_DATA_P<0> 7 MIPI1C_AP_DATA_N<0> 7 MIPI1C_AP_CLK_P 7 26 MIPI1C_AP_CLK_N 7 26 MIPI1C_CAM_DATA_P<0> MIPI1C_CAM_DATA_N<0> MIPI1C_CAM_CLK_P 25 26 MIPI1C_CAM_CLK_N 25 26 NET_TYPE 26 ELECTRICAL_CONSTRAINT_SET PHYSICAL SPACING 26 I360 I363 25 26 I361 25 26 I362 I364 I365 I366 I367 A SPI_50S SPI_50S SPI_50S SPI_50S SPI SPI SPI SPI SPI_GRAPE_MISO SPI_GRAPE_MOSI SPI_GRAPE_SCLK SPI_GRAPE_CS_L SPI_50S SPI_50S SPI_50S SPI_50S SPI SPI SPI SPI SPI_IPC_MISO SPI_IPC_MOSI SPI_IPC_SCLK SPI_IPC_MRDY 5 17 5 17 5 17 5 17 5 31 5 31 5 31 5 31 SYNC_MASTER=MIKE SYNC_DATE=N/A PAGE TITLE CONSTRAINTS: ASSIGNMENTS DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 051-8962 SIZE D REVISION A.0.0 BRANCH PAGE 101 OF 106 SHEET 40 OF 42 1 A 8 7 6 5 4 2 3 1 MLB CONSTRAINTS D BOARD LAYERS BOARD AREAS BOARD UNITS (MIL or MM) ALLEGRO VERSION TOP,ISL2,ISL3,ISL4,ISL5,ISL6,ISL7,ISL8,ISL9,BOTTOM NO_TYPE,BGA,BGA06-06 MM 15.2 TABLE_BOARD_INFO D PHYSICAL CONSTRAINTS SPACING CONSTRAINTS DEFAULT/BGA SPACING RULES TABLE_PHYSICAL_RULE_HEAD PHYSICAL_RULE_SET LAYER ALLOW ROUTE ON LAYER? MINIMUM LINE WIDTH MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAP DEFAULT * Y =45_OHM_SE =45_OHM_SE 30 MM 0 MM 0 MM STANDARD * Y =DEFAULT =DEFAULT 12.7 MM =DEFAULT =DEFAULT TABLE_SPACING_ASSIGNMENT_HEAD NET_SPACING_TYPE1 NET_SPACING_TYPE2 AREA_TYPE SPACING_RULE_SET * * BGA BGA_SPA CLK * BGA BGA_SPA PWR * * PWR_P1SPACING GND * * GND_P1SPACING SWITCHNODE * * SWITCHNODE ANLG * * 3:1_SPACING TABLE_SPACING_ASSIGNMENT_ITEM TABLE_SPACING_RULE_HEAD SPACING_RULE_SET LAYER LINE-TO-LINE SPACING WEIGHT TABLE_PHYSICAL_RULE_ITEM TABLE_SPACING_RULE_ITEM DEFAULT TABLE_PHYSICAL_RULE_ITEM * 0.08 MM ? TABLE_SPACING_ASSIGNMENT_ITEM TABLE_SPACING_ASSIGNMENT_ITEM TABLE_SPACING_RULE_ITEM STANDARD * =DEFAULT ? TABLE_SPACING_ASSIGNMENT_ITEM TABLE_SPACING_RULE_ITEM BGA_SPA * =DEFAULT ? TABLE_SPACING_ASSIGNMENT_ITEM TABLE_SPACING_ASSIGNMENT_ITEM REGULAR SPACING RULES SINGLE-ENDED PHYSICAL RULES 45 OHMS PHYSICAL_RULE_SET LAYER ALLOW ROUTE ON LAYER? TABLE_SPACING_RULE_HEAD SPACING_RULE_SET MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAP ISL2,ISL3,ISL8,ISL9 45_OHM_SE ISL4,ISL5,ISL6,ISL7 Y 0.055 MM 0.055 MM 3.0 MM Y 0.060 MM 0.060 MM 3.0 MM 0.060 MM ? 0P08_SPACING * 0.080 MM ? N 0.060 MM 0.060 MM 1.5:1_SPACING * 0.090 MM ? 2:1_SPACING * 0.120 MM ? 2.5:1_SPACING * 0.150 MM ? 3.0 MM TABLE_SPACING_RULE_ITEM TABLE_SPACING_RULE_ITEM C NOTES: 0.075 MM ~ 3 MIL TABLE_SPACING_RULE_ITEM TABLE_PHYSICAL_RULE_ITEM * WEIGHT * TABLE_SPACING_RULE_ITEM TABLE_PHYSICAL_RULE_ITEM 45_OHM_SE LAYER TABLE_SPACING_RULE_ITEM TABLE_PHYSICAL_RULE_ITEM 45_OHM_SE LINE-TO-LINE SPACING 1:1_SPACING TABLE_SPACING_RULE_ITEM TABLE_PHYSICAL_RULE_HEAD MINIMUM LINE WIDTH 3:1_SPACING * 0.180 MM ? 4:1_SPACING * 0.240 MM ? 5:1_SPACING * 0.300 MM ? TABLE_SPACING_RULE_ITEM 50 OHMS 0.089 MM ~ 3.5 MIL 0.102 MM ~ 4 MIL 0.114 MM ~ 4.5 MIL 0.125 MM ~ 5 MIL 0.140 MM ~ 5.5 MIL C TABLE_SPACING_RULE_ITEM PHYSICAL_RULE_SET LAYER ALLOW ROUTE ON LAYER? 50_OHM_SE TOP,BOTTOM Y TABLE_PHYSICAL_RULE_HEAD MINIMUM LINE WIDTH MINIMUM NECK WIDTH MAXIMUM NECK LENGTH 0.085 MM 0.085 MM 3.0 MM DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAP TABLE_SPACING_RULE_ITEM 0P5MM_SPACING * 0.5 MM ? 0P64MM_SPACING * 0.64 MM ? TABLE_PHYSICAL_RULE_ITEM TABLE_SPACING_RULE_ITEM TABLE_PHYSICAL_RULE_ITEM 50_OHM_SE * N 0.050 MM 0.050 MM 3.0 MM *NOTE: ASSUMING 0.060MM DIELECTRIC THICKNESS 50 OHMS - CLEAR ON LAYER 2 AND 5 LAYER ALLOW ROUTE ON LAYER? MINIMUM LINE WIDTH MINIMUM NECK WIDTH MAXIMUM NECK LENGTH 50_OHM_SE_RF TOP Y 0.240 MM 0.240 MM 3.0 MM DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAP TABLE_PHYSICAL_RULE_ITEM TABLE_PHYSICAL_RULE_ITEM ISL4 Y 0.060 MM 0.060 MM 3.0 MM MINIMUM NECK WIDTH MAXIMUM NECK LENGTH POWER/GND SPACING RULES 50 OHMS - CLEAR ON TOP AND BOTTOM PHYSICAL_RULE_SET LAYER ALLOW ROUTE ON LAYER? TABLE_SPACING_RULE_HEAD SPACING_RULE_SET TABLE_PHYSICAL_RULE_HEAD MINIMUM LINE WIDTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAP ISL2,ISL9 LAYER LINE-TO-LINE SPACING WEIGHT TABLE_SPACING_RULE_ITEM TABLE_PHYSICAL_RULE_ITEM 50_OHM_SE ~ 6 MIL 0.18 MM ~ 7 MIL 0.2 ~ 8 MIL TABLE_PHYSICAL_RULE_HEAD PHYSICAL_RULE_SET 50_OHM_SE 0.15 MM Y 0.090 MM 0.090 MM 3.0 MM PWR_P1SPACING * 0.1 MM 900 GND_P1SPACING * 0.1 MM 950 SWITCHNODE * 0.5 MM 1000 SWITCHNODE TOP,BOTTOM 0.2 MM 1000 TABLE_SPACING_RULE_ITEM MM 0.25 MM ~ 10 MIL 0.3 MM ~ 12 MIL 0.33 MM ~ 13 MIL 0.4 MM ~ 16 MIL 1.0 MM = 39.37 MIL TABLE_SPACING_RULE_ITEM TABLE_SPACING_RULE_ITEM DIFFERENTIAL PAIR PHYSICAL RULES 100 OHMS B TABLE_PHYSICAL_RULE_HEAD PHYSICAL_RULE_SET LAYER ALLOW ROUTE ON LAYER? MINIMUM LINE WIDTH MINIMUM NECK WIDTH 100_OHM_DIFF TOP,BOTTOM Y 0.076 MM 0.076 MM 100_OHM_DIFF N Y 0.057 MM 0.057 MM PHYSICAL_RULE_SET LAYER ALLOW ROUTE ON LAYER? MINIMUM LINE WIDTH MINIMUM NECK WIDTH 90_OHM_DIFF TOP,BOTTOM Y 0.095 MM 0.095 MM 90_OHM_DIFF ISL2,ISL3,ISL8,ISL9 Y 0.054 MM 0.054 MM 90_OHM_DIFF ISL4,ISL5,ISL6,ISL7 Y 0.060 MM MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAP 0.210 MM 0.210 MM =STANDARD 0.300 MM 0.300 MM MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAP 0.200 MM 0.200 MM =STANDARD 0.200 MM 0.100 MM 0.060 MM =STANDARD 0.200 MM 0.100 MM B TABLE_PHYSICAL_RULE_ITEM TABLE_PHYSICAL_RULE_ITEM 90 OHMS TABLE_PHYSICAL_RULE_HEAD TABLE_PHYSICAL_RULE_ITEM TABLE_PHYSICAL_RULE_ITEM TABLE_PHYSICAL_RULE_ITEM AUDIO PHYSICAL RULES TABLE_PHYSICAL_RULE_HEAD PHYSICAL_RULE_SET LAYER ALLOW ROUTE ON LAYER? MINIMUM LINE WIDTH MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAP 1:1_DIFFPAIR * Y =STANDARD =STANDARD =STANDARD 0.08 MM 0.08 MM SPEAKER * Y 0.3 MM 0.19MM 10 MM 0.08 MM 0.08 MM TABLE_PHYSICAL_RULE_ITEM TABLE_PHYSICAL_RULE_ITEM BGA AREA PHYSICAL RULES TABLE_PHYSICAL_ASSIGNMENT_HEAD A NET_PHYSICAL_TYPE AREA_TYPE PHYSICAL_RULE_SET * BGA BGA_PHY TABLE_PHYSICAL_ASSIGNMENT_ITEM SYNC_MASTER=MIKE LAYER ALLOW ROUTE ON LAYER? MINIMUM LINE WIDTH MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAP BGA_PHY * Y 0.060 MM 0.060 MM =STANDARD 0.076 MM 0.075 MM CONSTRAINTS: MLB RULES TABLE_PHYSICAL_RULE_ITEM DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 SYNC_DATE=N/A PAGE TITLE TABLE_PHYSICAL_RULE_HEAD PHYSICAL_RULE_SET 5 4 3 2 051-8962 SIZE D REVISION A.0.0 BRANCH PAGE 102 OF 106 SHEET 41 OF 42 1 A 8 7 6 5 4 3 2 1 D D C C B B A SYNC_MASTER=MIKE SYNC_DATE=N/A PAGE TITLE CONSTRAINTS: RF RULES DRAWING NUMBER Apple Inc. R NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED 8 7 6 5 4 3 2 051-8962 SIZE D REVISION A.0.0 BRANCH PAGE 106 OF 106 SHEET 42 OF 42 1 A

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