Lab Practical Exam
DC Power Supply
Worst-Case Design for Full-Wave Rectifier Circuit
James J. Whalen
Fall 2000
Important Design Rules
1. Avoid destroying the Zener diode.
2. The design must work for any Zener Diode with
VZ = 12 V " 10%.
3. The design must work with the load resistor
connected or disconnected.
4. The design must work for an isolation transformer
rms ac output voltage = 18 VAC " 10%.
5. The design must work for resistors with a " 10%
tolerances except for 100 Ω which has a " 5%
tolerance.
6. The best design would have the best combination of
the following factors:
A.
The highest allowable value of dc load current
at 100% ac voltage.
B.
Low peak-to-peak ripple voltage under all
conditions of load variation and ac voltage
variation.
C.
Small change in dc load voltage under all
conditions of load variation and ac voltage
variation.
Procedure
1. Design the dc power supply and enter your design
in your lab notebook. Be as complete as possible.
Include the circuit schematic, design equations, and
design values.
2. In your lab notebook create a table of design values
that includes values for the following components:
RL, RF, RS, CI, & CF.
3. Assemble the entire dc power supply and test it as
an assembly.
4. Test the entire dc power supply at 100% ac voltage
(18 VAC) with the load resistor connected. Measure
the dc voltages and ac peak-to-peak ripple voltages
at the nodes 1, 2 & 3 in Figure 1. Demonstrate to
Staff your results. Staff must witness all six values
of voltages and sign off on each in a space below
the entry. Staff must also check and initial
calculations for IZ + IL, IZ, & + IL.
5. Repeat Step 4 with load resistor removed. No
demonstration required.
6. Repeat Step 4 at 90% ac voltage (16.2 VAC) with
the load resistor connected. Staff must witness dc
voltage and ac peak-to-peak ripple voltage at the
node 3 and sign off on each in a space below the
entry. Staff must also check and initial calculations
for IZ + IL, IZ, & + IL. Is the Zener Diode cutoff?
7. Repeat Step 4 at 90% ac voltage with the load
resistor removed. No demonstration required.
8. Repeat Step 4 at 110% ac voltage (19.8 VAC) with
the load resistor connected. No demonstration
required.
9. Repeat Step 4 at 110% ac voltage with the load
resistor removed. Staff must witness dc voltage and
ac peak-to-peak ripple voltage at the node 3 and
sign off on each in a space below the entry. Staff
must also check and initial calculations for IZ + IL, IZ,
& + IL. Is the Zener Diode maximum current rating
exceeded?
10. Enter your result from Steps 4-9 in a TABLE: DC
& AC RIPPLE VOLTAGES
11. Also enter in the table the percent dc load voltage
regulation. The percent dc load voltage regulation is
calculated using the dc load voltage obtained in
Step 4 as the standard and using the following
equation:
Load Regulation = {VL (Step N)) - VL (Step 4)} )
VL (Step 4) X 100% where N = 5 to 9.
12. Write report in examination booklet.
13. Submit examination booklet and your lab
notebook.
1N4742 Zener Diode Information
Maximum Ratings
DC Power Dissipation
Derating Factor
1 Watt
6.67 mW per degree C
Junction Temperature
200 degree C
Electrical Characteristics at 25 C
Max DC Zener Current IZM
76 mA
Nominal Zener Voltage VZ @ IZT 12 V
Test Current IZT
21 mA
Max Zener Impedance ZZT @ IZT
9 ohms
Measured Zener Impedance ZZT @ 20 mA 4 ohms
Test Current IZK
0.25 mA
Max Zener Impedance ZZT @ IZK
Max Rev. Leakage Current IR
700 ohms
5 uA @ VR = 9.1 V
Additional Design Information
TABLE 1 VALUES OF DC VOLTAGES AT
NODES 1-3 AS A FUNCTION OF VAC FOR 10%
VOLTAGE DROOP AT NODE 1
%
VAC
Peak
(rms)
Rectifier
V1(dc) V3(dc) V1(dc)
Diode
0.95 X " 10% -
Voltage
2
100
90
110
(Peak
Diodes
- 1.4)
V3(dc)
V
V
V
V
V
V
18
25.5
1.4
22.9
12.0
10.9
"1.2
"1.2
12.0
8.4
"1.2
"1.2
12.0
13.3
16.2
19.8
22.9
28.0
1.4
1.4
20.4
25.3
"1.2
"1.2
Important Design Considerations
1. If the load resistor is removed, all the dc current
must flow through the Zener Diode. That current must
not exceed IZM = 76 mA. The worst case is at 110%
ac voltage. The dc voltage drop across the resistors
RF + RS is then given by V1(dc) - V3(dc) = (RF + RS) X
IZ. The worst case occurs at 110% ac voltage where
V1 (dc) - V3 (dc) has a maximum value given by max
{V1 (dc)- V3 (dc)} = 13.3 + 1.2 = 14.5 V. To limit the
dc current that flows through the Zener Diode to a
value less than IZM = 76 mA, the value for (RF + RS)
must exceed a minimum value for RF + RS given by
Min {RF + RS} = max {V1 (dc)- V3 (dc)} ) IZM
= 14.5 V/76mA = 0.191 kohm
Min {RF + RS} = 191 ohm
If we allow for a 10% tolerance on the resistors, then
Min {RF + RS} = 191 ohm ÷ 0.9
= 212 ohm
Min {RF + RS} = 212 ohm
The nominal values available include 150 & 68 ohms.
Among the available choices are
RF = 150 Ω & RS = 68 Ω
RF = 68 Ω & RS = 150 Ω
2. Another important consideration is that the dc
current through the Zener Diode must not fall below
some minimum value IZmin. The worst case occurs at
90% ac voltage with the load resistor connected. The
voltage V1(dc)- V3(dc) has a minimum value
min{V1(dc)- V3(dc)} = 8.4 - 1.2 = 7.2 V. The current
through RF + RS is a minimum and is given by
Min {IZ + ILOAD} = min {V1 (dc)- V3 (dc)} ) (RF + RS)
Min {IZ + ILOAD} = 7.2V ) 0.218k = 33 mA
3. A value for IZ = 0.25 mA where the Max Zener
Impedance ZZT = 700 ohms is obviously too low. The
dc voltage regulation will be poor, and the ac peak-topeak ripple voltage will be high. As an initial design
decision a value for IZmin = 0.5 X IZT = 0.5 X 21 mA =
10.5 mA is selected.
IZmin = 10.5 mA
It should be noted that no design decision is final. The
value selected for IZmin can be changed in a
subsequent design.
4. The value for the load current ILOAD can be
determined from
ILOAD = min {IZ + ILOAD} - IZmin
ILOAD = 33 mA - 10.5 mA = 22.5 mA
ILOAD = 22.5 mA
5. The value for the load resistor RL can be
determined from
RL = VZ ) ILOAD
RL = 12V ) 22.5mA = 0.533 kohm
RL = 533 ohm
The variable resistor available for RL should be set at
533 ohms. Use the DMM.
6. The resistors available have nominal values as
given the Appendix.
7. The capacitors available have values 100 :F and
50 :F.
8. Initially the 100 :F capacitor is selected for the
capacitor CI in Figure 1,
CI = 100 :F = 0.100 mF
9. The maximum droop )V across the capacitor
across CI in Figure 1 can be estimated. See figure ? in
Lecture Slides. Using the expression Q = CV where
Q is the charge on a capacitor C and V the across the
capacitor, the droop )V can be calculated from
)V = )Q/C = I)t/C
where I = IZ + ILOAD is the discharge current for the
capacitor. The worst case droop would be obtained
where I = IZ + ILOAD has a maximum value max{IZ +
ILOAD} . Since the value for the sum of the resistors (RF
+ RS) was chosen to limit the value of the current
through them to a value IZ + ILOAD # IZM = 76 mA, the
maximum value for I is IZM = 76 mA. The maximum
droop max{)V} is given by
Max {)V} = IZM/120C
Max {)V} = 76mA /(120 X 0.100mF) = 6.3 V
where )t has been set equal to 1/2f where 2f = 120
Hz. Actually, as shown in the Lecture slides, the value
for )t will be less than 1/f. Thus the maximum droop
calculated with the equations above would be overestimated.
The filter capacitor also contributes charge to the
current that flows through the Zener diode and the RL.
If the value of the filter capacitor CF = 50 :F = 0.05
mF is added to the value of CF = 100 :F = 0.100 mF,
the value obtained is
CF + CI = 100 :F + 50 :F = 150 :F = 0.15 mF
If the value CF + CI = 0.15 mF is used to calculate the
droop, the droop value is given by
Max {)V} = 76mA /(120 X 0.150mF) = 4.2 V
Which value is the better choice: 6/3 V or 4.2 V? That
is a question best answered using PSPICE (or
Electronic Workbench).
Since the capacitors have 20% tolerance, the
droop calculated or predicted using PSPICE could
differ from that measured by 20%.
10. The final design decision that must be made is
how to divide the sum of the resistors (RF + RS). The
filter capacitor CF and the filter resistor RF form a low
pass RC filter and cause a reduction in the ac voltage
between the input at node 1 and the output at node 2.
The reduction in the ratio V2/V1 for a sinusoidal signal
at frequency f is given by
V2/V1 = 1/{1 + (RF 2AfCF)2}0.5
One of the value used for f can be f = 120 Hz.
Harmonics at 240 Hz and higher are also present.
They harmonics will be attenuated more. An initial
assignment RF = 150 ohms is made. Using RF = 150
ohms, CF = 100 :F, & f = 120 Hz, the value for V2/V1
is given by
V2/V1 = 1/{1 + (150X2AX120X100:)2}0.5 = 0.088
Since the harmonics are attenuated even more, the
variation in voltage across CF will be even less then
0.088 times the variation in voltage across CI. Again
this is a question best answered using PSPICE.
11. The Zener diode also causes a reduction in the ac
voltage between the input at node 2 and the output at
node 3. . The reduction in the ratio V3/V2 is given by
V3/V2 = {RL*rd} ) {RS + RL*rd}
where rd is the dynamic resistance of the Zener Diode.
In E6 Dynamic Impedance a value rd = 4 ohms at IZ =
20 mA was measured. Using RS = 68 ohms and RL*rd
= 533*4 ≈ 4, the value for V3/V2 is given by
V3/V2 = 4 ) {68 + 4} = 0.055
Thus the ac voltage at V3 should be more than an
order of magnitude less than that at V2. Usually,
voltage at V3 is a few mV. Averaging and manual
adjustments of the cursors are the best experimental
techniques to use to measure voltage at V3.
12. The ac voltage at V3 can be now be estimated.
Multiple the results obtained for the droop in V1 and
the voltage ratios V3/V2 & V2/V1. The results are
V3pp = 6.3V X 0.088 X 0.055 = 0.030 V = 30 mV
V3pp = 4.2V X 0.088 X 0.055 = 0.020 V = 20 mV
These results are much larger than that observed. .
Again this is a question best answered using PSPICE.
13. The division of the sum of the resistors (RF + RS)
should have as its goal making the overall reduction
in the ac voltage large by making the product of the
two voltage expressions small. That is make V3/V1
small where V3/V1 is given by
V3/V1 = 1/{1 + (RF 2AfCF)2}0.5 X {RL*rd} ) {RS + RL*rd}
The values for RF & RS are limited to what is available
on the Heathkit Resistance Substitution Boxes. There
are not too many combinations to test. It is
recommended that neither RF nor RS be set equal to
zero. Remember that RF + RS must exceed the
minimum value calculated previously to prevent
zapping the Zener Diode.
The first set of values recommended may be
summarized as follows:
RF = 150 ohm
RS = 68 ohm
RL = 533 ohm
CI = 100 :F
CF = 50 :F
TABLE 2 DATA FOR DC POWER SUPPLY WITH
FULL-WAVE RECTIFIER
The Fluke 8000A DMM was used to measure VT.
The HP54600B CRO was used to measure V1(avg),
V1(pp), V2(avg), V2(pp), and V3(pp). The Fluke
8010A DMM was used to measure the dc load
voltage V3(avg). The load current IL was calculated
using IL = V3(avg)/RL. The current IL + IZ was
calculated using IL + IZ = {V3(avg) - V1(avg)} ÷ {RF +
RS}. The Zener Diode current was calculated using IZ
= IL + IZ – IL.
TABLE 2 DATA FOR DC POWER SUPPLY WITH
FULL-WAVE RECTIFIER
C = RL CONNECTED & NC = RL NOT CONNECTED
X DENOTES INITIALS REQUIRED
%
VT
RL
V1
V1
V2
V2
V3
V3
IL
IL+
IZ
IZ
VAC rms
V
Ω
100 18
533
Staff Must
Initial
100 18
NC
90
90
16.2
avg pp
avg pp
avg pp
V
V
V
V
V
V
mA
mA
mA
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
533
16.2
110 19.8 533
110 19.8 NC
References:
1. Sedra/Smith, “Microelectronics Circuits,” 4th ed.
New York: Oxford University Press, 1998, Section
3.7 Rectifier Circuits, pp. 179-191. See Fig. 3.39
on p. 184 for bridge rectifier circuit & waveforms.
2. Horenstein M., “Microelectronic Circuits & Devices,”
2nd ed., pp. 188 – 206. See Fig. 4.30.
3. EE 312 Fall 2000 Lecture Slides on Experiment
No. 7 DC Power Supply. Note that the bridge
rectifier replaces the single rectifier used in the
half-wave rectifier circuit. The bridge rectifier
contains four diodes in a bridge arrangement.
Appendix: Resistance Values Available
There are 29 Heathkit boxes that are available. The
Heathkit resistance substitution box resister choices
are:
Low value:
15, 22, 33, 47, 68, 100, 150, 220, 330, 470, 680, 1k,
1.5k, 2.2k, 3.3k, 4.7k 6.8k 10k
A different resistance box is used to augment the 29
Heathkit boxes (20 boxes are available).
Low Values:
10, 47, 100, 220, 470, 1k, 2.2, 3.3k, 4.7k 6.8k 10k