Low Resistive Ultra Shallow Junction for Sub 0.1µm MOSFETs

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Technical Digest of 1996 IEEE International Electron Devices Meeting
Low Resistive Ultra Shallow Junction for Sub 0.1µm MOSFETs
Formed by Sb Implantation
K. Shibahara, M. Mifuji*, K. Kawabata*, T. Kugimiya**, H. Furumoto, M. Tsuno, S. Yokoyama,
M. Nagata*, S. Miyazaki*, and M. Hirose*
Research Center for Nanodevices and Systems/*Faculty of Engineering, Hiroshima University,
**Electronics Research Laboratories, Kobe Steel Corporation
1-4-2, Kagamiyama, Higashi-Hiroshima, 739 Japan
TEL: +81-824-24-6267, FAX: +81-824-22-7185
Abstract
Nineteen-nm depth ultra shallow and 1.7 kΩ/sq. low resistive junctions were fabricated by Sb implantation. The shallowness of the junction is attributed to the low diffusive nature
of Sb. The junction was applied to 0.15 µm MOSFETs, and
excellent suppression of short channel effect and Gm improvement were confirmed.
Introduction
Shallow junction formation is one of the most important
issues in MOSFET scaling. Junction depth (Xj) of source and
drain (S/D) extensions should be reduced as gate length becomes
shorter to suppress short channel effects. 40 nm gate length nMOSFETs [1] featured 10 nm depth ultra shallow junction
formed by solid phase diffusion (SPD) of P from PSG. However,
from the view points of CMOS integration, conventional ion
implantation is more attractive than SPD because of its adaptable
nature for fabrication processes [2]. Especially in the case of nMOSFETs, dopants with low diffusivity and heavy mass which
are necessary features for ultra shallow junction formation are
applicable. sub 0.1 µm gate length n-MOSFETs were
successfully fabricated with low energy As ion implantation
[2, 3]. However, fundamental characteristics of As implanted
layers, such as Xj and sheet resistance (Rs), were not evaluated
sufficiently in these cases.
Since Sb is heavier and less diffusive than As, Sb
implantation has been focused on recently p-MOSFET channel
doping [4, 5] instead of As implantation. It has not been
sufficiently investigated in terms of the S/D extensions except
for a few reports on 40 nm depth junction and application for
MOSFETs [6]. For sub 0.1 µm era, the potentialities of Sb
implantation for shallower junctions should be investigated.
Well Formation and Isolation
5 nm Cap Oxide Formation
Sb+ or As+ Implantation
5~20keV, 1x1014~1x1015cm-2
Cap oxide Removal
Profile Evaluation by SIMS
Horizontal Furnace Annealing in N2
850°C, 30 min
(Typically ~2 nm Oxide is Formed)
Xj Evaluation by
Selective Wet Etching or SIMS
Contact Formation and Metallization
Fig. 1 Flow chart of junction formation and evaluation.
Under the background described above, ultra shallow
junction formation by Sb implantation was investigated with
the aim of usage for S/D extensions of sub 0.1 µm MOSFETs
and comparison with As implantation. Sheet resistance is
discussed in conjunction with Xj in this paper because the
shallow extension with high Rs is an obstacle to current drive
performance improvement by device scaling. Effectiveness of
the Sb S/D extensions is demonstrated by 0.15 µm gate length
MOSFET fabrication.
Fabrication and Evaluation
Fig. 1 shows a fabrication process sequence of junction
formation. Sb or As were implanted into Si through oxide 5 nm
thick. After the oxide was removed, annealing was carried out
at 850 °C for 30 min in nitrogen ambient with a horizontal furnace. During the annealing, oxide 2 nm thick grew typically.
Junction depth was evaluated with selective wet etching of n+
portion by mixed solution of HF, HNO3, and CH3COOH. As
shown in Fig.2, the etching rate decreases as carrier concentra-
21.7.1
IEDM 96-579
Etched Depth ( nm )
Sb+ 10keV 1x1014cm-2
40
Xj
20
0
0
100
200
Time ( s )
300
Fig.2 Variation of etched n+-layer depth against etching time. The n+-layer is
selectively etched by mixed acid solution. Etching stops at the junction
because of carrier reduction.
10
P-SPD(Ref. 1 and 7)
1x101 4 cm - 2
1
S b+ 10 keV
A s + 10 keV
0
0
10
1x101 5 cm - 2
20
30
40
Junction Depth, Xj ( nm )
Fig.3 Relationship between junction depth and sheet resistance. The
combination of ultra shallow junction and low sheet resistance can be
achieved by Sb implantation.
14
12
10
8
6
A s + 10keV
4
S b+ 10keV
2
0
1 01 4
Implantation Dose (
1 01 5
cm- 2 )
Fig.4 Dif ference of junction depth (∆Xj) between before and after annealing
is plotted against implantation dose. Sb shows smaller ∆Xj due to lower
diffusivity. ∆Xj for a square plot was obtained from SIMS different from
others.
21.7.2
580-IEDM 96
HF : HNO3 : CH3COOH = 1: 3: 8
Sb+ 20keV 1x1014cm-2
Sheet Resistance, Rs ( kΩ/sq. )
Characteristics of Sb and As Implanted Layers
Fig. 3 shows relationship between Xj and Rs. Sb leads to
shallower junction than As dose as expected. When Sb implantation dose is 1x1014 cm-2 and energy is 10 keV, Xj is 19 nm
and Rs is 1.7 kΩ/sq. Although P SPD from PSG can achieve
shallower junction [1, 7], it resulted in much higher Rs close to
10 kΩ/sq., as plotted in Fig. 3. Thus Sb is the most suitable to
achieve the combination of ultra shallow junction and low sheet
resistance when Xj is around 20 nm.
The difference of junction depth (∆Xj) between before and
after annealing is compared in Fig. 4. Xj for before and after
annealing was obtained using process simulator and the selective wet etching method, respectively. The result obtained by
this method agrees with a square plot in Fig. 4 which was obtained from SIMS. ∆Xj for Sb is much smaller than that for As.
This is a clear evidence for smaller diffusivity of Sb.
When implanted dose is 1x1014 cm-2, Rs for Sb is smaller
than that for As, as shown in Fig. 3. This result is attributed to
the difference of diffusivity and a segregation problem. The segregation is observed in SIMS depth profile (Fig. 5) as a pile up
peak. The peak disappears after HF treatment (Fig. 6), which is
an evidence that the Sb pileup does not exist in Si. The similar
segregation was observed by RBS for both Sb and As [8]. In
the report it was concluded that Sb and As piled up not in Si or
SiO2 but at the Si-SiO2 interface. Since As has larger diffusivity,
much more As atoms can arrive at the interface and segregate
during annealing. Since the segregated atoms are electrically
inactive, Rs for the As case is higher.
The dose of 1x1015 cm-2 results in higher Rs for Sb, on the
contrary to the lower dose case. This result is considered to be
due to bulk precipitation caused by small solid solubility of Sb.
The thermal equilibrium solid solubility at 850 °C was reported
to be 3.0x1019 cm- 3 [9]. Activation rate of As decreases to
about 50% by clustering [10] when total As concentration is
2x1020 cm- 3 and heat treatment temperature is 850 °C. Though
the activation rate for Sb is not evaluated, it seems to be smaller
than the As case.
60
∆ Xj ( nm )
tion reduces, and the etching nearly stops at the junction. The
junction depth was defined against the bulk acceptor concentration of 5x1017 cm-3. The junction depth was measured with
SIMS as well. Sheet resistance was extracted with the two terminal type test structures with various length implanted layers.
Sheet Resistance, R ( kΩ /sq. )
as Implanted
Annealed 850°C, 30min
Before HF Treatment
10 20
10 19
Sb + 10keV
1x10 14 cm -2
10 18
10 17
0
5
10
15
20
25
30
+
Sb
+
As
8
6
14
S b cm
Dose 1x10
-2
5nm Oxide Through
4
850°C 30min
2
0
0
5
10
15
20
25
Energy ( keV )
Fig.7 Dependence of sheet resistance on implantation ener gy.
Depth ( nm )
Fig.5 SIMS depth profile of implanted Sb. The surface of an annealed specimen
is covered by 2 nm oxide (cf. Fig.1). Surface peak in the annealed specimen
is due to segregation of Sb at the interface between the oxide and Si.
1 02 1
Simulated
S i O2 S i
Concentration ( cm- 3 )
Ion Count ( Arb. Unit )
10
s
Concentration ( cm -3 )
10 21
100
Annealed 850°C, 30 min
After HF Treatment
10
Sb+ 10keV
1x1014cm-2
S b+ 1x101 4 cm- 2
1 02 0
1 01 9
5keV 10keV
25%
75%
1 01 8
1 01 7
-5
1
0
5
10
15
20
25
Depth ( nm )
0
2
4
6
Fig.8 Simulated as-implanted depth profile of Sb. In the case of 5 keV , a quarter
of implanted Sb cannot arrive in Si.
Depth ( Arb. Unit )
Fig.6 SIMS depth profile, taken after HF treatment, for the annealed specimen
in Fig.5. The segregated Sb disappears as a result of the treatment.
Fig. 7 shows the dependence of Rs on implantation energy.
Shallower Xj is obtained in general by reducing the energy.
However, when the energy is reduced down to 5 keV, Rs rapidly increases. There are two considerable reasons for the increase. One is that the energy is too small for the dopant atoms
to penetrate into Si through 5 nm oxide. A quarter of implanted
atoms cannot reach to Si as shown in the depth profile of asimplanted Sb calculated with Montecarlo model process simulator [11] (Fig. 8). The other is the segregation. The peak of the
implanted atoms is so close to the interface that major part of
dopant is considered to be lost as segregation.
MOSFETs with Sb Doped S/D Extensions
MOSFETs with Sb or As doped extensions were fabricated
for the comparison of these two dopants. The principal features
of the fabricated MOSFETs are listed in Table 1. Implantation
Table1 Features of fabricated MOSFET s.
Channel Doping
B: 7x1017 cm-3 Uniformly Doped
Gate Oxide
3.5 nm
Side Wall
150 nm
S/D Extenstion
Sb+ or As+ 10 keV, 1x1014 cm-2
5 nm Oxide Through
S/D
As+ 80 keV, 5x1015 cm-2
Annealing
850 °C, 30 min
(b)
poly-Si
AA
AAA
AAAAA
SiN
n+
n+
Extensions
Fig.9 (a) Cross-sectional FIB microscope photograph and (b) schematic crosssection of a fabricated 0.15 µm gate length MOSFET.
21.7.3
IEDM 96-581
dose and energy were 1x1014 cm-2 and 10 keV, respectively.
Under this doping condition, Sb leads to shallower Xj and lower
Rs than As dose, as described before. Fig. 9 shows a crosssectional focused ion beam (FIB) microscope photograph of
the 0.15 µm gate length MOSFET with the Sb doped extensions. Its ID-VD characteristics are shown in Fig. 10. As shown
in Fig. 11, short channel effect is well suppressed by the ultra
shallow junction with Sb. Fig.12 shows relationship between
effective gate length (Leff) and Gm. Gm is improved compared
with the As case by the low resistive extensions with Sb.
Sb+ 10 keV 1x1014 cm-2
4.0
ID ( mA )
1.6 V
2.4
582-IEDM 96
1.2 V
1.6
0.8
0.8 V
0.4
0.8
1.2
1.6
2.0
VD ( V )
Fig.10 I D-VD characteristics of the fabricated MOSFET with Sb doped S/D
extensions.
0.8
Vt h ( V )
0.6
Sb Xj = 19 nm
0.4
As Xj = 26 nm
0.2
0
0.0
Acknowledgments
The authors would like to thank Prof. K. Terada, Hiroshima
City University for his useful discussion.
0.2
0.4
0.6
0.8
1.0
L g ( µm )
Fig.1 1 Vth dependence on Lg. Short channel effect is well suppressed by the
ultra shallow junction fabricated by Sb implantation.
1000
Sb 10keV 1x101 4 cm- 2
Rs 1.7 kΩ/sq.
G m ( mS/mm )
References
[1] M. Ono et al., Tech. Dig. IEDM 1993, pp. 119-122.
[2] K. Takeuchi et al., VLSI. Tech. Symp. Dig. 1995, pp. 9-10.
[3] A. Hori et al., Tech. Dig. IEDM 1994, pp. 485-488.
[4] G. G. Shahidi et al., VLSI. Tech. Symp. Dig. 1993, pp. 9394.
[5] L. Su et al., VLSI Tech. Symp. Dig. 1996, pp. 12-13.
[6] Y. Taur et al., Tech. Dig. IEDM 1993, pp. 127-130.
[7] H. S. Momose et al., Tech. Dig. IEDM 1994, pp. 593-596.
[8] G. A. Sai-Halasz et al., IEEE EDL Vol. EDL-6 (1985), pp.
285-287.
[9] F. A. Trumbore, Bell System Tech. J. (1960) pp. 205-233.
[10] R. O. Schwenker, J. Appl. Phys. Vol. 42 (1971), pp.31953200.
[11] “ATHENA User’s Manual”, SILVACO International, 1995.
VG = 2.0 V
3.2
0.0
0.0
Conclusion
Shallow junction formation was investigated with Sb ion
implantation. Nineteen-nm depth ultra shallow and 1.7 kΩ/sq.
low resistive junctions were fabricated by Sb implantation. Junction depth for Sb was shallower than that for As because of low
diffusivity of Sb. The junctions were applied to S/D extensions
for 0.15 µm MOSFETs, and improvements in short channel
effect and Gm were achieved in consequence of shallow and
low resistive Sb doped junctions. Thus Sb implantation is concluded to be promising for S/D extensions of sub 0.1 µm MOSFETs.
Lg = 0.15 µm
100
10
0.1
As 10keV 1x101 4 cm- 2
Rs 2.2 kΩ/sq.
1.0
L eff ( µm )
Fig.12 Relationship between Lef f and Gm. Sheet resistance of S/D extensions
must be low to improve Gm by scaling.
21.7.4
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