2010/9/3 Chapter 2: Diode Applications 1 Load--Line Analysis Load The load line plots all possible current (ID) conditions for all voltages g applied pp to the diode ((VD) in a given circuit. E / R is the maximum ID and E is the maximum VD. Where the load line and the characteristic curve intersect is the Q-point, which specifies a particular ID and VD for a given circuit. E = VD + I D R When VD = 0 When ID = 0 ID = VD = E E R 2 1 2010/9/3 Fig. 2.2 Drawing the load line and finding the point of operation. Ex. 2.1 Employing the diode characteristics, determine: (a) VDQ and IDQ (b) VR E − VD 10 − 1 When VD = 1 V I D = = = 18mA R 0.5k E = VD + I D R 10 = VD + I D × 0.5k When VD = 0 When ID = 0 E 10 = = 20mA R 0.5k VD = E = 10 ID = 2 2010/9/3 Fig. 2.4 Solution to Example 2.1. E = VD + I D R 10 = VD + I D × 0.5k When VD = 0 When ID = 0 10 E = = 20mA R 0.5k VD = E = 10 ID = Table 2.1 3 2010/9/3 Series Diode Configurations Forward Bias Constants • Silicon Diode: VD = 0 .7V • Germanium Diode: VD = 0 .3V Analysis • VD = 0.7V (or VD = E if E < 0 .7V) • VR = E – VD = E – 0.7 • ID = IR = IT = VR / R = (E-0.7)/R (E-0 7)/R 7 Series Diode Configurations Reverse Bias Diodes ideally behave as open circuits Analysis • VD = E • VR = 0 V • ID = 0 A 8 4 2010/9/3 Example 2.4. Find VD, VR and ID VD = 0.7V VR = E − VD = 8 − 0.7 = 7.3V ID = IR = VR 7.3 = = 3.32mA R 2.2k Example 2.5. Find VD, VR and ID with the diode reversed ID = 0A = IR VR = I R × R = 0 × 2.2k = 0V E − VD − VR = 0 E = VD = 8V 5 2010/9/3 Fig. 2.15 Source notation. Example 2.6. Find VD, VR and ID Q 0.5 < VD = 0.7 ∴ OFF ID = 0A VR = I R × R = 0 × 1.2k = 0V E − VD − VR = 0 E = VD = 0.5V 6 2010/9/3 Fig. 2.17 Operating point with E = 0.5 V. Example 2.7. Determine VO and ID Si VON = 0.7 V,Red LED VON = 1.8 V 7 2010/9/3 V O = E − V K 1 − V K 2 = 12 − 0 . 7 − 1 . 8 = 9 . 5V ID = IR = VO 9 .5 = = 13 . 97 mA R 680 Example 2.8. Determine ID, VD2, and V0 8 2010/9/3 Fig. 2.23 Substituting the equivalent state for the open diode. 9 2010/9/3 Fig. 2.24 Determining the unknown quantities for the circuit of Example 2.8. ID = 0A V 0 = 0V V D 2 = E = 20 V Example 2.9. Determine I, V1, V2 and V0 10 2010/9/3 Fig. 2.26 Determining the state of the diode for the network of Fig. 2.25. + - ON Fig. 2.27 Determining the unknown quantities for the network of Fig. 2.25. KVL, Kirchhoff voltage loop. KVL − E1 + V1 + 0 .7 + V 2 − E 2 = 0 − 10 + I × 4 .7 k + 0 .7 + I × 2 .2 k − 5 = 0 I = 10 + 5 − 0 .7 14 . 3 = = 2 .07 mA 4 .7 k + 2 .2 k 6 .9 k V1 = I × 4 .7 k = 2 . 07 m × 4 .7 k = 9 .73V V 2 = 2 . 07 m × 2 .2 k = 4 . 55V Vo = V 2 − E 2 = 4 .55 − 5 = − 0 . 45V 11 2010/9/3 Parallel Configurations 23 Parallel Configurations V = 0.7 V D V =V = V = 0.7 V D1 D2 O V = 10 − 0.7 = 9.3 V R I I R = D1 E−V D = 10 V − 0.7 V = 28.18 mA R 0.33kΩ =I D2 = 28.18 mA 2 = 14.09 mA 24 12 2010/9/3 Example 2.11. Find the R to ensure a current of 20mA through the “on” diode Reverse breakdown voltage g =3V Turn on voltage = 2 V Fig. 2.31 Operating conditions for the network of Fig. 2.30. I = 20mA = R= E − VLED 8 − 2 = R R 6 = 0.3kΩ = 300Ω 20m For Red LED, VR = 2V < 3V Red LED is ok 13 2010/9/3 Example 2.12. Determine the voltage V0 Fig. 2.36 Determining Vo for the network of Fig. 2.35. Si diode turn on first. VD = 0.7 V But, green LED doesn’t work. 0.7 < 2.2 V V0 = 12 − 0.7 = 11.3V 14 2010/9/3 Example 2.13. Determine I1, I2 and ID ON 20 V 19.3 V ON Fig. 2.38 Determining the unknown quantities for Example 2.13. 0.7 = 0.212mA A 3.3k Va = E − 0.7 − 0.7 = 18.6V = V2 I1 = V2 18.6 = = 3.32mA 5.6k 5.6k KCL I D 2 = I 2 − I1 = 3.32 − 0.212 ≈ 3.11mA I2 = 15 2010/9/3 Positive logic OR gate. Determine V0. HI (1) Fig. 2.40 Redrawn network of Fig. 2.39. ON OFF 16 2010/9/3 Fig. 2.41 Assumed diode states for Fig. 2.40. HI V0 = E − VD = 10 − 0.7 = 9.3V I= Fig. 2.42 V0 9.3 = = 9.3mA R 1k Positive logic AND gate. OFF 8V 8V LO (0) ON 17 2010/9/3 Fig. 2.43 Substituting the assumed states for the diodes of Fig. 2.42. E − V0 10 − 0.7 = = 9.3mA 1k 1k Vo = 0.7V I= Half--Wave Rectification Half The diode only conducts when it is in forward bias, therefore only half of the AC cycle passes through the diode. The DC output voltage is 0.318Vm, where Vm = the peak AC voltage. Vdc = 1 π Vm = 0.318Vm 36 18 2010/9/3 Fig. 2.44 Half-wave rectifier. Fig. 2.45 Conduction region (0 → T/2). 19 2010/9/3 Fig. 2.46 Nonconduction region (T/2 → T). Fig. 2.47 Half-wave rectified signal. Vdc = 1 π Vm = 0.318Vm 20 2010/9/3 Fig. 2.48 Effect of VK on half-wave rectified signal. Vdc = 0.318(Vm − Vk ) Ex. 2.16 (a) Sketch the output Vo and determine the dc level of Vo. (b) Repeat (a) if the ideal diode is replaced by a silicon diode. (c) Repeat (a) and (b) if Vm is increased to 200V. 21 2010/9/3 (a) V = −0.318V = −0.318 × (20V ) = −6.36V dc m (b) V = −0.318(V − 0.7) = −0.318 × (20 − 0.7V ) = −6.14V dc m (c) Vdc = −0.318Vm = −0.318 × (200V ) = −63.6V Vdc = −0.318(Vm − 0.7) = −0.318 × (200 − 0.7V ) = −63.28V PIV (PRV) Because the diode is only forward biased for one-half of the AC cycle, it is also reverse biased for one-half one half cycle. It is important that the reverse breakdown voltage rating of the diode be high enough to withstand the peak, reverse-biasing AC voltage. PIV (or PRV) > Vm • • • PIV ≥ Vm PIV = Peak inverse voltage PRV = Peak reverse voltage Vm = Peak AC voltage 44 22 2010/9/3 Fig. 2.52 Determining the required PIV rating for the half-wave rectifier. Full--Wave Rectification Full Th rectification The tifi ti process can b be iimproved db by using more diodes in a full-wave rectifier circuit. Full-wave rectification produces a greater DC output: • • Half-wave: Vdc = 0.318Vm Full-wave: Vdc = 0.636Vm 46 23 2010/9/3 Full--Wave Rectification Full Bridge Rectifier • • Four diodes are required VDC = 0.636 Vm 47 Fig. 2.53 Full-wave bridge rectifier. 24 2010/9/3 Fig. 2.54 Network of Fig. 2.53 for the period 0 → T/2 of the input voltage vi. Fig. 2.55 Conduction path for the positive region of vi. 25 2010/9/3 Fig. 2.56 Conduction path for the negative region of vi. Fig. 2.57 Input and output waveforms for a full-wave rectifier. Vdc = 0.636Vm 26 2010/9/3 Fig. 2.58 Determining VOmax for silicon diodes in the bridge configuration. Vdc = 0.636(Vm − 2Vk ) Fig. 2.59 Determining the required PIV for the bridge configuration. PIV ≥ Vm 27 2010/9/3 Full--Wave Rectification Full Center--Tapped Transformer Rectifier Center q Requires • Two diodes • Center-tapped transformer VDC = 0.636(Vm) 55 Fig. 2.60 Center-tapped transformer full-wave rectifier. 28 2010/9/3 Fig. 2.61 Network conditions for the positive region of vi. Fig. 2.62 Network conditions for the negative region of vi. 29 2010/9/3 Fig. 2.63 Determining the PIV level for the diodes of the CT transformer full-wave rectifier. PIV = Vsec ondary + VR = Vm + Vm = 2Vm PIV ≥ 2Vm Example 2.17. Determine the output waveform and calculate the output dc level and the required PIV of each diode. 30 2010/9/3 Fig. 2.66 Redrawn network of Fig. 2.65. 31 2010/9/3 Fig. 2.67 Resulting output for Example 2.17. Summary of Rectifier Circuits Rectifier Ideal VDC Realistic VDC Half Wave Rectifier VDC = 0.318(Vm VDC = 0.318Vm – 0.7 Bridge Rectifier VDC = 0.636(Vm) VDC = 0.636(Vm) – 2(0.7) Center-Tapped Transformer Rectifier VDC = 0.636(Vm) VDC = 0.636(Vm) – 0.7 Vm = peak of the AC voltage. In the center tapped transformer rectifier circuit, the peak AC voltage is the transformer secondary voltage to the tap. 64 32 2010/9/3 Diode Clippers The diode in a series clipper circuit “clips” any voltage that does not forward bias it: • • A reverse-biasing polarity A forward-biasing polarity less than 0.7V for a silicon diode 65 Fig. 2.68 Series clipper. 33 2010/9/3 Biased Clippers Adding a DC source in series with the clipping diode changes the effective forward bias of the diode. 67 Fig. 2.69 Series clipper with a dc supply. 34 2010/9/3 Fig. 2.70 Determining the transition level for the circuit of Fig. 2.69. Fig. 2.71 Using the transition voltage to define the “on” and “off” regions. 35 2010/9/3 Fig. 2.72 Determining vo for the diode in the “on” state. Fig. 2.73 level. Sketching the waveform of vo using the results obtained for vo above and below the transition 36 2010/9/3 Example 2.18 Determine the output waveform for the sinusoidal input. Fig. 2.75 Determining the transition level for the clipper of Fig. 2.74. 37 2010/9/3 Fig. 2.76 Sketching vo for Example 2.18. Example 2.19 Find the output voltage if the applied signal is the square wave. 38 2010/9/3 Fig. 2.78 vo at vi = +20 V. Vo = Vi + 5 = 25V Fig. 2.79 vo at vi = -10 V. Vo = 0V 39 2010/9/3 Fig. 2.80 Sketching vo for Example 2.19. Parallel Clippers The diode in a parallel clipper circuit “clips” any voltage that forward bias it. DC biasing can be added in series with the diode to change the clipping level. 80 40 2010/9/3 Fig. 2.81 Response to a parallel clipper. Example 2.20 Determine Vo. (1) 當0 < Vi < 4V 時,Diode is “on” ,Vo = 4V 。 (2) 當 Vi > 4V 時,Diode is “off” ,Vo = Vi 。 (3) 當 Vi < 0V 時, Diode is “on” ,Vo = 4V。 41 2010/9/3 Fig. 2.83 Determining the transition level for Example 2.20. Fig. 2.84 Sketching vo for Example 2.20. ((1)) 當0 < Vi < 4V 時,Diode is “on” ,Vo = 4V 。 (2) 當 Vi > 4V 時,Diode is “off” , Vo = Vi 。 (3) 當 Vi < 0V 時, Diode is “on” , Vo = 4V。 42 2010/9/3 Repeat Example 2.20 using Vk = 0.7V (1) 當0 < Vi < 4V 時,Diode is “on” ,Vo = 4 - 0.7 = 3.3 V 。 Fig. 2.86 Determining vo for the diode of Fig. 2.82 in the “on” state. (2) 當 Vi > 4V 時,Diode is “off” ,Vo = Vi 。 43 2010/9/3 Fig. 2.87 Sketching vo for Example 2.21. Summary of Clipper Circuits 88 44 2010/9/3 Clampers A diode and capacitor p can be combined to “clamp” an AC signal to a specific DC level. 89 Biased Clamper Circuits The input signal can be any type of waveform such as sine, square, and triangle waves. The DC source lets you adjust the DC camping level. 90 45 2010/9/3 Fig. 2.89 Clamper. Fig. 2.90 Diode “on” and the capacitor charging to V volts. Vo = 0V 46 2010/9/3 Fig. 2.91 Determining vo with the diode “off.” Vo = −2V Fig. 2.92 Sketching vo for the network of Fig. 2.91. 47 2010/9/3 Example 2.22 Determine Vo. Vi = 10V Vi = −20V Fig. 2.94 Determining vo and VC with the diode in the “on” state. Vi = −20V Diode is “on” ,Vo = 5V 。 48 2010/9/3 Fig. 2.95 Determining vo with the diode in the “off” state. Vi = 10V Fig. 2.96 Diode is “off” ,Vo = 25 + 10 = 35 V 。 vi and vo for the clamper of Fig. 2.93. Vi = −20V Diode is “on” ,Vo = 5V 。 Vi = 10V Diode is “off” ,Vo = 25 + 10 = 35 V 。 49 2010/9/3 Summary of Clamper Circuits 99 Zener Diodes The Zener is a diode operated in reverse bias at the Zener Voltage ((Vz)). • • When Vi ≥ Vz – The Zener is on – Voltage across the Zener is Vz – Zener current: IZ = IR – IRL – Thee Zener e e Power: owe : PZ = VZIZ When Vi < Vz – The Zener is off – The Zener acts as an open circuit 100 50 2010/9/3 Zener Resistor Values If R is too large, the Zener diode cannot conduct because the available amount of current is less than the minimum current rating, IZK. The minimum current is given by: ILmin = I R - I ZM The maximum value of resistance is: VZ R Lmax = I Lmin If R is too small, the Zener current exceeds the maximum current rating, IZM. The maximum current for the circuit is given by: VL VZ = RL R Lmin The minimum value of resistance is: RVZ R Lmin = Vi − VZ I Lmax = 101 Fig. 2.102 Approximate equivalent circuits for the Zener diode in the three possible regions of application. 51 2010/9/3 Example 2.24. Determine the reference voltage Vo1 and Vo2. What is the current through the LED and the power delivered by the supply? How does the power absorbed by the LED compare to that of the 6-V Zener diode? Vo1 = VZ 2 + VK = 3.3 + 0.7 = 4V Vo 2 = Vo1 + VZ 1 = 4 + 6 = 10V The 4-V across the white LED I R = I LED = 40 − Vo 2 − VLED 40 − 10 − 4 26 = = = 20mA 1.3k 1.3k 1.3k the power delivered by the supply PS = E × I S = E × I R = (40V ) × (20mA) = 800mW the power absorbed by the LED PLED = VLED × I LED = (4V ) × (20mA) = 80mW the power absorbed by 6-V Zener diode PZ = VZ × I Z = (6V ) × (20mA) = 120mW Example 2.25. Check its operation and plot the waveform of voltage across the system for the applied signal. 52 2010/9/3 Fig. 2.105 Response of the network of Fig. 2.104 to the application of a 60-V sinusoidal signal. Fig. 2.106 Basic Zener regulator. 53 2010/9/3 Fig. 2.107 Determining the state of the Zener diode. V = VL = Vi × Fig. 2.108 RL R + RL Substituting the Zener equivalent for the “on” situation. VL = VZ IR = IZ + IL IZ = IR − IL VL PZ = VZ × I Z RL V − VL V IR = R = i R R IL = 54 2010/9/3 Fig. 2.109 Zener diode regulator for Example 2.26. Determine VL、VR、IZ and PZ Fig. 2.110 Determining V for the regulator of Fig. 2.109. V = VL = 1.2 1.2 × Vi = ×16 = 8.73V 1 + 1.2 1 + 1.2 55 2010/9/3 Fig. 2.111 Resulting operating point for the network of Fig. 2.109. Zener diode is “off” VZ = VL = 8.73V VR = Vi − VL = 16 − 8.73 = 7.27V Fig. 2.112 Network of Fig. 2.109 in the “on” state. IZ = 0 PZ = I z × Vz = (0) × 8.73 = 0 I Z = I R − I L = 6 − 3 . 33 = 2 . 67 mA PZ = I z × Vz = (2.67mA) ×10V = 26.7mW 3 3 × Vi = ×16 = 12V > VZ 1+ 3 1+ 3 VZ = VL = 10V VR = Vi − VL = 16 − 10 = 6V V = VL = Zener diode is “on” IR = 6 10 = 6 mA I Z = = 3 . 33 mA 1k 3k 56 2010/9/3 Example 2.27. Determine the range of RL and IL that will result in VRL being maintained at 10V. VZ = RL Vi R + RL R L min = ( R + R L )V Z = R L Vi 1 k × 10 RV Z = = 250 Ω 50 − 10 Vi − VZ RV Z = R L V i − R L V Z = R L (V i − V Z ) Fig. 2.114 VL versus RL and IL for the regulator of Fig. 2.113. V R = V i − V Z = 50 − 10 = 40 V V 40 IR = R = = 40 mA R 1k if I ZM = 32 mA I L min = I R − I ZM = 40 − 32 = 8 mA VR 10 R L max = = = 1250 = 1 . 25 k Ω I L min 8m 57 2010/9/3 Example 2.28. Determine the range of values of Vi that will maintain the Zener diode in the “on” state. Fig. 2.116 VZ = RL Vi R + RL Vi = 220 + 1200 R + RL VZ = × 20 = 23 . 67 V R 220 VL versus Vi for the regulator of Fig. 2.115. V i max − V Z R = I R max × R + V Z = 76 . 67 m × 220 + 20 = 36 . 87 V I R max = V i max IL = VL 20 = = 16 . 67 mA RL 1 .2 k I ZM = 60 mA I R max = I L + I ZM = 60 + 16 . 67 = 76 . 67 mA 58 2010/9/3 Voltage--Multiplier Circuits Voltage Voltage multiplier circuits use a combination of diodes and capacitors to step up the output voltage of rectifier circuits. • • • Voltage Doubler Voltage Tripler Voltage Quadrupler 117 Voltage Doubler This half-wave voltage doubler’s output can be calculated by: Vout = VC2 = 2Vm where Vm = peak secondary voltage of the transformer 118 59 2010/9/3 Voltage Doubler • Positive Half-Cycle o D1 conducts o D2 is switched off o Capacitor C1 charges to Vm • Negative Half-Cycle o D1 is switched off o D2 conducts o Capacitor C2 charges to Vm Vout = VC2 = 2Vm 119 Fig. 2.119 cycle. • Double operation, showing each half-cycle of operation: (a) positive half-cycle; (b) negative half- Positive Half-Cycle o D1 conducts o D2 is switched off o Capacitor C1 charges to Vm Vout = VC2 = 2Vm 60 2010/9/3 Fig. 2.119 cycle. • Double operation, showing each half-cycle of operation: (a) positive half-cycle; (b) negative half- Negative Half-Cycle Half Cycle o D1 is switched off o D2 conducts o Capacitor C2 charges to Vm Vout = VC2 = 2Vm Fig. 2.120 Full-wave voltage doubler. 61 2010/9/3 Fig. 2.121 Alternate half-cycles of operation for full-wave voltage doubler. Voltage Tripler and Quadrupler 124 62 2010/9/3 Fig. 2.122 Voltage tripler and quadrupler. Practical Applications • Rectifier Circuits – Conversions of AC to DC for DC operated circuits – Battery Charging Circuits • Simple Diode Circuits – Protective Circuits against – Overcurrent – Polarity Reversal – Currents caused by an inductive kick in a relay circuit • Zener Circuits – Overvoltage Protection – Setting Reference Voltages 126 63 2010/9/3 Fig. 2.123 Battery charger: (a) external appearance; (b) internal construction. Fig. 2.124 Electrical schematic for the battery charger of Fig. 2.123. 64 2010/9/3 Fig. 2.132 (a) Polarity protection for an expensive, sensitive piece of equipment; (b) correctly applied polarity; (c) application of the wrong polarity. Fig. 2.132 (continued) (a) Polarity protection for an expensive, sensitive piece of equipment; (b) correctly applied polarity; (c) application of the wrong polarity. 65 2010/9/3 Fig. 2.132 (continued) (a) Polarity protection for an expensive, sensitive piece of equipment; (b) correctly applied polarity; (c) application of the wrong polarity. Fig. 2.133 Protection for a sensitive meter movement. 66 2010/9/3 Fig. 2.134 Backup system designed to prevent the loss of memory in a car radio when the radio is removed from the car. Fig. 2.135 Polarity dector using diodes and LEDs. 67 2010/9/3 Fig. 2.136 EXIT sign using LEDs. Fig. 2.137 Providing different reference levels using diodes. 68 2010/9/3 Fig. 2.138 (a) How to drive a 6-V load with a 9-V supply (b) using a fixed resistor value. (c) Using a series combination of diodes. Fig. 2.138 (continued) (a) How to drive a 6-V load with a 9-V supply (b) using a fixed resistor value. (c) Using a series combination of diodes. 69 2010/9/3 Fig. 2.138 (continued) (a) How to drive a 6-V load with a 9-V supply (b) using a fixed resistor value. (c) Using a series combination of diodes. 70