CHA6252-QFG
13-15.5GHz Power Amplifier
GaAs Monolithic Microwave IC in SMD leadless package
Description
The CHA6252-QFG is a four stages
monolithic GaAs high power circuit that
produces more than 2 Watt output power.
It is designed for commercial communication
systems.
The circuit is manufactured with a pHEMT
process, 0.5µm gate length.
Output power at 1dB comp.
Main Features
36
■ Broadband performances: 13-15.5GHz
■ 22dB Linear Gain
■ 32.5dBm output power @1dB comp.
■ 41dBm output TOI
■ 22% PAE@1dB compression
■ DC bias: Vd=7Volt @ Id=1.1A
■ 32L-QFN5x5
OP1dB (dB) @3 Temperatures
35
34
33
32
31
Temp=25°C
30
Temp=-40°C
Temp=+85°C
29
28
27
26
12
12.5
13
13.5
14
14.5
15
15.5
16
Frequency (GHz)
Main Electrical Characteristics
Tamb.= +25°C
Symbol
Parameter
Freq
Frequency range
Gain
Linear Gain
OTOI
Output TOI
Pout
Output Power @1dB comp.
Ref. : DSCHA6252-QFG2355 - 20 Dec 12
Min
13
Typ
Max
15.5
22
41.0
32.5
1/12
Unit
GHz
dB
dBm
dBm
Specifications subject to change without notice
United Monolithic Semiconductors S.A.S.
Bat. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
CHA6252-QFG
13-15.5GHz Power Amplifier
Electrical Characteristics
Tamb.= +25°C, Vd = +7.0V
Symbol
Parameter
Min
Typ
Max
Unit
Freq
Frequency range
13
15.5
GHz
Gain
Linear Gain
22
dB
G_T
Linear gain variation versus Temp
-0.05
dB/°C
RL_in
Input Return Loss
-18
dB
RL_out
Output Return Loss
-11
dB
OP1dB
Output power @1dB compression point
32.5
dBm
Psat
Saturated output power
35
dBm
TOI
Output TOI @10 dB back off of OP1dB
41
dBm
PAE
Power added efficiency @1dB compression
22
%
Idq
Quiescent Drain current
1.1
A
Vg
Gate voltage
-0.45
V
These values are representative of onboard measurements as defined on the drawing in
paragraph "Evaluation mother board".
Absolute Maximum Ratings (1)
Tamb.= +25°C
Symbol
Parameter
Values
Unit
Vd
Drain bias voltage
7.5V
V
Id
Drain bias current
2
A
Vg
Gate bias voltage
-2 to +0
V
Pin
Input continuous power
15
dBm
(2)
Tj
Junction temperature
175
°C
Ta
Operating temperature range
-40 to +85
°C
Tstg
Storage temperature range
-55 to +150
°C
(1)
Operation of this device above anyone of these parameters may cause permanent
damage.
Typical Bias Conditions
Tamb.= +25°C
Symbol
Pad No
15, 26, 28, 30,
VDx
32
VGx
9, 10, 12, 14
Ref. : DSCHA6252-QFG2355 - 20 Dec 12
Parameter
DC Drain voltage
DC Gate voltage tuned for Idq= 1.1A
2/12
Values
7
Unit
V
-0.45
V
Specifications subject to change without notice
Bat. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
CHA6252-QFG
13-15.5GHz Power Amplifier
Device thermal performances
All the figures given in this section are obtained assuming that the QFN device is cooled
down only by conduction through the package thermal pad (no convection mode considered).
The temperature is monitored at the package back-side interface (Tcase) as shown below.
The system maximum temperature must be adjusted in order to guarantee that Tcase
remains below the maximum value specified in the next table. So, the system PCB must be
designed to comply with this requirement.
A derating must be applied on the dissipated power if the Tcase temperature cannot be
maintained below the maximum temperature specified (see the curve Pdiss. Max) in order to
guarantee the nominal device life time (MTTF).
DEVICE THERMAL SPECIFICATION : CHA6252-QFG
Recommended max. junction temperature (Tj max)
:
152
Junction temperature absolute maximum rating
:
175
Max. continuous dissipated power (Pdiss. Max.)
:
7.7
=> Pdiss. Max. derating above Tcase(1)= 85
°C :
115
Junction-Case thermal resistance (Rth J-C)(2)
:
<8
Minimum Tcase operating temperature(3)
:
-40
Maximum Tcase operating temperature(3)
:
85
Minimum storage temperature
:
-55
Maximum storage temperature
:
150
°C
°C
W
mW/°C
°C/W
°C
°C
°C
°C
(1) Derating at junctio n temperature co nstant = Tj max.
(2) Rth J-C is calculated fo r a wo rst case co nsidering the ho t t e s t junc t io n o f the M M IC and all the devices biased.
(3) Tcase=P ackage back side temperature measured under the die-attach-pad (see the drawing belo w).
9
7
6
5
4
3
2
Pdiss. Max. @Tj <Tj max (W)
1
0
-50
-25
0
25
50
75
100
125
150
175
Tcase
Pdiss. Max. @Tj <Tj max (W)
8
Example: QFN 16L 3x3
Location of temperature
reference point (Tcase)
on package's bottom side
Tcase (°C)
6.4
Ref. : DSCHA6252-QFG2355 - 20 Dec 12
3/12
Specifications subject to change without notice
Bat. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
CHA6252-QFG
13-15.5GHz Power Amplifier
Typical Board Measurements
Tamb.= +25°C, Vd = +7.0V, Idq = 1.1A
Measurement in the plan of the connectors, using the proposed land pattern & board, as
defined in paragraph “Evaluation mother board”
Linear Gain & Return Loss versus frequency
Linear Gain and Return Loss (dB)
25
20
15
10
Linear Gain
5
RL_in
0
RL_out
-5
-10
-15
-20
-25
12
12.5
13
13.5
14
14.5
15
15.5
16
16.5
16
16.5
Frequency (GHz)
Linear Gain versus frequency & temperature
Linear Gain (dB) @3 Temperatures
30
25
20
15
Temp=25°C
10
Temp=-40°C
Temp=+85°C
5
0
12
12.5
13
13.5
14
14.5
15
15.5
Frequency (GHz)
Ref. : DSCHA6252-QFG2355 - 20 Dec 12
4/12
Specifications subject to change without notice
Bat. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
CHA6252-QFG
13-15.5GHz Power Amplifier
Typical Board Measurements
Tamb.= +25°C, Vd = +7.0V, Idq = 1.1A
Measurement in the QFN access plans, using the proposed land pattern & board, as defined
in paragraph “Evaluation mother board”
Output power at 1 dB compression
36
OP1dB (dB) @3 Temperatures
35
34
33
32
31
Temp=25°C
30
Temp=-40°C
Temp=+85°C
29
28
27
26
12
12.5
13
13.5
14
14.5
15
15.5
16
15.5
16
Frequency (GHz)
Power Added Efficiency at 1 dB compression
40
PAE (%) @3 Temperatures
35
30
25
20
15
Temp=25°C
Temp=-40°C
10
Temp=+85°C
5
0
12
12.5
13
13.5
14
14.5
15
Frequency (GHz)
Ref. : DSCHA6252-QFG2355 - 20 Dec 12
5/12
Specifications subject to change without notice
Bat. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
CHA6252-QFG
13-15.5GHz Power Amplifier
Typical Board Measurements
Tamb.= +25°C, Vd = +7.0V, Idq = 1.1A
Drain current at 1 dB compression
2.5
2.3
Id (A) @3 Temperatures
2.1
1.9
1.7
1.5
1.3
1.1
Temp=25°C
0.9
Temp=-40°C
Temp=+85°C
0.7
0.5
12
12.5
13
13.5
14
14.5
15
15.5
16
15
15.5
16
Frequency (GHz)
Output TOI (dBm) at two Pout/Tone
45
44
Output TOI (dBm)
43
42
41
40
39
Pout/Tone=15dBm
38
Pout/Tone=20 dBm
37
36
12
12.5
13
13.5
14
14.5
Frequency (GHz)
1-
Ref. : DSCHA6252-QFG2355 - 20 Dec 12
6/12
Specifications subject to change without notice
Bat. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
CHA6252-QFG
13-15.5GHz Power Amplifier
Typical Board Measurements
Tamb.= +25°C, Vd = +7.0V, Idq = 1.1A
Output C/I3 (dBc) versus Pout / 2 Tones
80
75
70
C/I3 (dBc)
65
60
55
50
Freq=13 GHz
45
Freq=14GHz
40
Freq=15 GHz
35
30
10
12
14
16
18
20
22
24
Pout/2Tones (dBm)
2-
Ref. : DSCHA6252-QFG2355 - 20 Dec 12
7/12
Specifications subject to change without notice
Bat. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
CHA6252-QFG
13-15.5GHz Power Amplifier
Package outline (1)
Matt tin, Lead Free
Units :
From the standard :
(Green)
mm
JEDEC MO-220
(VHHD)
33- GND
1234567891011-
Nc
Nc
Nc
Gnd(2)
RF IN
Gnd(2)
Nc
Nc
G1
G2
Gnd(2)
1213141516171819202122-
G3
Nc
G4
D4
Gnd(2)
Nc
Nc
Gnd(2)
RF OUT
Gnd(2)
Nc
23242526272829303132-
Nc
Nc
Gnd(2)
D4
Nc
D3
Nc
D2
Gnd(2)
D1
(1)
The package outline drawing included to this data-sheet is given for indication. Refer to the
application note AN0017 (http://www.ums-gaas.com) for exact package dimensions.
(2)
It is strongly recommended to ground all pins marked “Gnd” through the PCB board.
Ensure that the PCB board is designed to provide the best possible ground to the package.
Ref. : DSCHA6252-QFG2355 - 20 Dec 12
8/12
Specifications subject to change without notice
Bat. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
CHA6252-QFG
13-15.5GHz Power Amplifier
Evaluation mother board
■ Compatible with the proposed footprint.
■ Based on typically Ro4003 / 8mils or equivalent.
■ Using a micro-strip to coplanar transition to access the package.
■ Recommended for the implementation of this product on a module board. Module
should be designed to dissipate around 7.7W
■ First decoupling network is done with 100pF capacitors, second decoupling network is
done with 10nF capacitors.
■ See application note AN0017 for details.
Ref. : DSCHA6252-QFG2355 - 20 Dec 12
9/12
Specifications subject to change without notice
Bat. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
CHA6252-QFG
13-15.5GHz Power Amplifier
Notes
Due to ESD protection circuits on RF input, an external capacitance might be requested to
isolate the product from external voltage that could be present on the RF access.
32
30
28
D1
D2
D3
15
26
D4
RF IN
RF OUT
5
20
G1
G2
G3
G4
9
10
12
14
The DC connections do not include any decoupling capacitor in package, therefore it is
mandatory to provide a good external DC decoupling (100pF & 10nF) on the PC board, as
close as possible to the package.
Ref. : DSCHA6252-QFG2355 - 20 Dec 12
10/12
Specifications subject to change without notice
Bat. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
CHA6252-QFG
13-15.5GHz Power Amplifier
DC Schematic
7V, 1.1A
D4
D3
D2
D1
295mA
295mA
70 mA
145mA
10 
RF OUT
150 
10 
20
RF IN
20 
150 
10 
20 
20
295mA
15 
G1
G2
Ref. : DSCHA6252-QFG2355 - 20 Dec 12
G3
11/12
G4
D4
Specifications subject to change without notice
Bat. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
CHA6252-QFG
13-15.5GHz Power Amplifier
Recommended package footprint
Refer to the application note AN0017 available at http://www.ums-gaas.com for package foot
print recommendations.
SMD mounting procedure
For the mounting process standard techniques involving solder paste and a suitable reflow
process can be used. For further details, see application note AN0017.
Recommended environmental management
UMS products are compliant with the regulation in particular with the directives RoHS
N°2011/65 and REACh N°1907/2006. More environmental data are available in the
application note AN0019 also available at http://www.ums-gaas.com.
Recommended ESD management
Refer to the application note AN0020 available at http://www.ums-gaas.com for ESD
sensitivity and handling recommendations for the UMS package products.
Ordering Information
QFN 5x5 RoHS compliant package:
CHA6252-QFG/XY
Stick: XY = 20
Tape & reel: XY = 21
Information furnished is believed to be accurate and reliable. However United Monolithic Semiconductors
S.A.S. assumes no responsibility for the consequences of use of such information nor for any infringement of
patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of United Monolithic Semiconductors S.A.S.. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all
information previously supplied. United Monolithic Semiconductors S.A.S. products are not authorised for use
as critical components in life support devices or systems without express written approval from United
Monolithic Semiconductors S.A.S.
Ref. : DSCHA6252-QFG2355 - 20 Dec 12
12/12
Specifications subject to change without notice
Bat. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34