SATHYABAMA UNIVERSITY
2 Day Workshop
On
Design and Simulation of circuits &
Devices
Using ORCAD
th
th
(5 -6 February, 2015)
CHIEF PATRON
Col.Dr.JEPPIAAR, M.A., B.L., Ph.D.,
Chancellor, Sathyabama University
PATRONS
SATHYABAMA UNIVERSITY
(Established Under Section 3 of the UGC Act, 1956)
Declared category “A” University by Ministry of
Human Resource Development (MHRD),
Government of India
Jeppiaar Nagar, Rajiv Gandhi Road,
Chennai – 600 119.
Dr.Marie Johnson, B.E., MBA., M.Phil., Ph.D
Dr.Mariazeena Johnson,
B.E., MBA., M.Phil., Ph.D
REGISTRATION FORM
Name
(Block Letters)
:
Department
:
Institution /
Organization
:
Address
:
Directors, Sathyabama University
Dr.B.Sheela Rani,
Vice Chancellor, Sathyabama University
Dr.T.Sasipraba,
Dean , Sathyabama University
Dr.S.S.Rau,
Registrar, Sathyabama University
Dr.K.V.Narayanan,
Controller of Examinations, Sathyabama University
2-Day WORKSHOP
on
Design and Simulation of Circuits & Devices
Using ORCAD
th
5 -6th February, 2015
CONVENOR
Dr. E. Logashanmugam, Faculty Head,
Electrical & Electronics, Sathyabama University
E-mail
:
CO-CONVENORS
Phone No
:
Details of Registration Fee :
DD.No & Date
Bank Name :
Amount
Dr. V.Sivachidambaranathan (HOD/E.E.E)
Dr. G.Sundari (HOD/E.C.E)
Dr. V.Vijaya Bhaskar (HOD/ETCE)
Dr. A.Sahaya Ancilin Nisha (HOD/E&CE)
Ms. Sujatha Kumaran (HOD/EIE)
:
:
ORGANIZING COMMITTEE
Dr. K.Vasanth AP/EEE
Mr. S.Nirmal Raj AP/EEE
Organized by
Department of E.E.E
Faculty of Electrical and Electronics
ABOUT THE UNIVERSITY
ABOUT THE WORKSHOP
Sathyabama University which was
formerly known as Sathyabama Engineering
College, established by Jeppiaar Educational
Trust in the year 1987, is a pioneering institute
imparting Engineering Education. We stepped
in 27th year of glorious exemplary education.
Since inception this institute has been
synonymous with academic excellence and
student discipline. This has been made possible
by close supervision, excellent coaching and
honing of talents among students, who are
expected to notch the University’s top honors.
The University has undertaken various
sponsored and collaborative R&D projects
funded by National Organizations such
as ISRO, IGCAR, DST, etc.
This Workshop is organized to show case the Design
of Electrical, Electronic and Power Electronic
Circuits in a virtual environment. This would benefit
the requirements of the research scholar, staff and
students during the research phase. This Technical
program on “Design and Simulation of Circuits &
Devices Using ORCAD” will act as a platform f o r
t h e research community to Design and si mulate
the ci rc uits by thems elv es by getti ng
guidanc e from the experts in this tool.
ABOUT THE DEPARTMENT
ABOUT THE TOOL USED
The Department of Electrical and
Electronics Engineering stands apart as one of
the best departments of the university aimed at
providing its students the state of art
facilities. Faculty are encouraged to take
independent
initiatives
with
collective
responsibility in all the relevant academic and
R&D dimensions like – teaching, curriculum
development, graduate research supervision,
continuing
education
and
organizing
conferences, workshop, symposia, etc.
Key benefits :
Knowledge on importance of Simulation Environment
Circuit Simulation based on Schematic and Programming
Design and Simulation of Electrical, Electronic and Power
Electronic Circuits using both Schematic and Programming
approach.
Hands on Training for 2 days and scheduled to execute
more than 50 circuits ( Including Power Electronic Circuits).
OrCAD is a proprietary software tool suite
used primarily for electronic design automation.
The software is used mainly by electronic design
engineers and electronic technicians to create
electronic schematics and electronic prints for
manufacturing printed circuit boards. PSpice is the
most used circuit simulator. The tool comprises of
the following package.




Capture CIS
OrCAD PCB Editor
PSpice AD
Layout Plus
Registration fee: 1000/The payment of registration fee is to be
made by cash or Demand Draft in favour
of “Sathyabama University” Payable at
Chennai.
PROGRAMME SCHEDULE
DAY1 – Electric and Electronic Circuits
Registration
: 8.30 am – 9.30 am
Session I
: 9.30 am – 10.00 am
High Tea
: 10.00 am – 10.15 am
Session I continues
Session I
: 10.30 am – 11.30 am
Lunch
: 11.30am – 12.30 pm
Session II
: 1.00 pm – 3.00 pm
DAY2- Power Electronic Circuits
Registration
: 8.30 am – 9.30 am
Session III
: 9.30 am – 10.00 am
High Tea
: 10.00 am – 10.15 am
Session III continues
Session III
: 10.30 am – 11.30 am
Lunch
: 11.30am – 12.30 pm
Valedictory
: 1.00 pm – 3.00 pm
Important Date:
Last Date for Registration with DD: 28-01-2015
For further details :
Department of Electrical and Electronics Engineering,
Sathyabama University.
Jeppiaar Nagar, Chennai – 119
Ph : 044-24503163 (Working Hrs. 8.00 – 3.45)
: 9790760740 (After working Hrs)
E-mail
: askvasanth123@gmail.com