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On-Chip Spiral Inductors for
Silicon-Based Radio-Frequency
Integrated Circuits
C. Patrick Yue
Center for Integrated Systems
Stanford University, CA
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Outline
• Overview
• A physical model for on-chip inductors
• Effects of process and layout parameters
• Design methodology
• Inductors with patterned ground shields
• Substrate noise coupling
• Conclusions
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Worldwide Wireless Market
36% Annual Growth
20M
(7%)
(Source: CTIA, 1996.)
Asia Pacific
80M (27%)
5M
(6%)
Asia Pacific
19M (22%)
North America
38M (43%)
Europe
25M (29%)
1996 Total: 87M
North America
125M (41%)
Europe
75M (25%)
2000 Total: 300M
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A Typical Cellular Phone
RF front-end
component count:
Inductor
11
Capacitor
>100
Resistor
>50
IC
Transistor
5
12
Crystal
1
Filter
2
(Source: Bosch, 1997.)
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Advantages of Integration
• Cost: assembly and packaging
• Power: fewer parasitics
• Design Flexibility: signals stay on chip
• Size
• Reliability
• Tolerance
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Discrete Inductors
• L: 2 to 20 nH
(2 to 10%)
• Q: 50 to 200
(1 to 2 GHz)
inch
mm
(Source: Coilcraft, 1997.)
• srf: 4 to 10 GHz
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Active Inductors
i1
iin
+
vin
–
-gm 1
+
C vc
–
gm 2
i2
C
L = ---------------g m1 g m2
• Excess Noise
• Extra Power
• Limited Linearity
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Bond Wire Inductors
• Predictability
• Unwanted Couplings
• Repeatability
• Limited Inductance
(Source: ISSCC’95, pp. 266)
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A Typical Planar Spiral Inductor
Number of Turns
Outer Dimension
Spacing
Width
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Multilevel Interconnects
(Source: Semiconductor International, 1997.)
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A Typical Inductor On Silicon
Al
SiO2
Si
3 µm
3D Perspective View
Top View
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Model Description
C si
Cs
C ox
R si
Ls
Rs
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Model Description
Cs
Ls
Cox
Rsi
Csi
Rs
Cox
Csi
Rsi
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Model Description
Physical Model of Inductor on Silicon
C
R
si
R
ox
C
C
s
s
si
L
s
Effects
L s : Greenhouse Method Mutual
Couplings
Eddy
ρ⋅l
R s = -----------------------------------------– t ⁄ δ - Current
w ⋅ δ ⋅ (1 – e
)
ε ox
Feed-Through
2
C s = n ⋅ w ⋅ ----------------Capacitance
t ox M1-M2
C ox
ε ox
1
= -2- ⋅ l ⋅ w ⋅ -----t ox
Oxide
Capacitance
C si
1
= -2- ⋅ l ⋅ w ⋅ C Sub
Si Substrate
Capacitance
R si
2
= ------------------------l ⋅ w ⋅ G Sub
Si Substrate
Ohmic Loss
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Skin Effect
Co-axial
E Field
Current
Conductor
Microstrip
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Effective Metal Thickness
Current
Density
J0
t
∫0 e
t eff =
-x/δ
⋅ dx
= δ ⋅ (1 – e
0
t
-t/δ
)
Actual
Metal
Thickness
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Measurement Setup
Open Structure
HP 8720B
P
R
O
B
E
G
S
G
G
S
G
Device Under Test
Probe Station
P
R
O
B
E
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Parameter Extraction Procedure
De-embedded
S Parameters
S to Transmission
Matrix Conversion
S 11 S 12
AB
→
S 21 S 22
CD
Solve for Propagation Constant ( Γ )
and Characteristic Impedance ( Z0 )
cosh Γl Z 0 sinh Γl
AB
= –1
CD
Z 0 sinh Γl cosh Γl
2Z 0
--------- = R C
Γ⋅l
p
p
Cs
Rs
= Γ ⋅ l ⋅ Z0
Ls
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Measured and Modeled Values of Ls and Rs
10
25
8
C
15
4
10
(Cs = 28 fF)
1
Frequency (GHz)
5
0
10
Rs (Ω)
Ls (nH)
6
0
0.1
ox
C
20
R
2
R
si
C
s
s
si
L
Copper
Aluminum
Model
s
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Substrate Modeling
C
ox
R
R
si
C
p
C
p
2Z 0
= --------Γ⋅l
si
Physical Model
Extracted Capacitance
and Resistance
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Measured and Modeled Values of Rp and Cp
25
250
200
15
150
10
100
5
0
0.1
50
1
Frequency (GHz)
0
10
R
Cp (fF)
Rp (kΩ)
20
C
R
ox
si
C
C
s
s
si
L
Copper
Aluminum
Model
s
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Definition of Inductor Quality Factor
V cos ωt
0
R
R
p
C
p
C
s
L
s
s
Peak Magnetic Energy – Peak Electric Energy
Q = 2π ------------------------------------------------------------------------------------------------------------Energy Loss in One Oscillation Cycle


Rp
ωL s
R s2 ( C p + C s )
2L ( C + C ) 

--------- × -----------------------------------------------------------------–
-----------------------------–
1
×
ω
s
p
s 
R s R p + [ ( ωL s ⁄ R s ) 2 + 1 ] ⋅ R s 
Ls
Substrate Loss Factor
Self-Resonance Factor
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Measured and Modeled Value of Q
10
8
Q
6
4
Copper
Aluminum
Model
2
0
0.1
1
Frequency (GHz)
10
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1.0
1.0
0.8
0.8
0.6
0.6
0.4
0.4
0.2
0.2
0.0
0.1
1
Frequency (GHz)
0.0
10
Self-Resonance Factor
Substrate Loss Factor
Measured and Modeled Values of
Substrate Factors
Copper
Aluminum
Model
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Comparison to Published Results
Q Predicted by Our Model
20
15
10
5
0
0
5
10
15
20
Measured Qpeak presented by Ashby et al.
Line Width
5 µm
9 µm
14 µm
19 µm
24 µm
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Effect of Metal Scheme on Q
8
C
Q
6
R
R
ox
si
C
C
s
s
si
L
s
4
2
0
0.1
1
Frequency (GHz)
10
3 levels of
1 µm in parallel
3 µm Al
2 µm Al
1 µm Al
Model
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Effect of Oxide Thickness on Q
8
C
Q
6
R
R
ox
si
C
C
s
s
si
L
s
4
2
0
0.1
1
Frequency (GHz)
10
6.5 µm Oxide
4.5 µm Oxide
2.5 µm Oxide
Model
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Effect of Substrate Resistivity on Q
8
C
R
ox
C
6
Q
R
C
si
s
s
si
L
s
4
10 Ω-cm Si:
Csub = 1.6×10-3 fF/µm2
2
Gsub = 4.0×10-8 S/µm2
6 Ω-cm Si:
0
0.1
Csub = 6.0×10-3 fF/µm2
1
Frequency (GHz)
10
Gsub = 1.6×10-7 S/µm2
Model
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Effect of Layout Area on Q
8
C
Q
6
R
R
ox
si
C
C
s
s
si
L
s
4
2
0
0.1
1
Frequency (GHz)
10
Outer Dimension
Line Width
550 µm, 41 µm
400 µm, 24 µm
300 µm, 13 µm
Model
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Application of Model
C
1
f C = ---------------------2π L ⋅ C
L
f C = 1.6 GHz, C = 1.2 pF → L = 8 nH
Circuit
Requirements
fC
L
Area
Technology
Constraints
Substrate
Factors
?
(Design Tool)
Inductor
Design with
Optimal Q
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Contour Plots of Q
Measured Q
2.9
4.6
Measured Q
1.7
3.4
10
Inductance (nH)
0.6 GHz
1.0 GHz
8
1
1
6
3
4
3
5
2
5
7
9
0
0
100 200 300 400 0
Outer Dimension (µm)
100 200 300 400
Outer Dimension (µm)
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Contour Plots of Q
Measured Q
4.0
5.2
10
Measured Q
6.1
4.0
Inductance (nH)
1.6 GHz 1
4
3
8
3.0 GHz 1 4
2
5
4
6
5
4
7
7
9
2
9
0
0
100 200 300 400 0
Outer Dimension (µm)
100 200 300 400
Outer Dimension (µm)
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Outline
• Overview
• A physical model for on-chip inductors
• Effects of process and layout parameters
• Design methodology
• Inductors with patterned ground shields
• Substrate noise coupling
• Conclusions
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Overview
• Challenges
- Q degraded by substrate loss
- Substrate coupling
- Modeling and characterization
- Process constraints
• Approaches
- Etch away Si substrate
- Patterned Ground Shield
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Suspended Inductors
Wafer Backside
Polyimide
Membrane
~550 µm
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Electromagnetic Fields of
Conventional On-Chip Inductors
H
Csi
E
Rsi
Ls
Rs
Cox
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Problems with Solid Ground Shield
Induced Loop Current
and Magnetic Field
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EM Fields of On-Chip Inductors with
Patterned Ground Shield
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Patterned Ground Shield Design
• Pattern
- Orthogonal to spiral
(induced loop current)
• Resistance
- Low for termination of
the electric field
- Avoid attenuation of
the magnetic field
Ground Strips
Slot between Strips
Induced Loop Current
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Effect of Aluminum Ground Shields on L
10
Ls (nH)
8
Patterned
6
Solid
4
None
(19 Ω-cm)
2
0
0.1
None
(11 Ω-cm)
1
Frequency (GHz)
10
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Effect of Aluminum Ground Shields on R
25
Rs (Ω)
20
Patterned
15
Solid
10
None
(19 Ω-cm)
None
(11 Ω-cm)
5
0
0.1
1
Frequency (GHz)
10
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Effect of Aluminum Ground Shields on C
300
250
Patterned
Cp (fF)
200
Solid
150
None
(19 Ω-cm)
100
None
(11 Ω-cm)
50
0
0.1
1
Frequency (GHz)
10
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Effect of Polysilicon Ground Shields on L
10
Ls (nH)
8
Patterned
6
Solid
4
Patterned
Aluminum
2
0
0.1
1
Frequency (GHz)
10
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Effect of Polysilicon Ground Shields on R
25
Rs (Ω)
20
Patterned
15
Solid
10
Patterned
Aluminum
5
0
0.1
1
Frequency (GHz)
10
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Effect of Polysilicon Ground Shields on C
300
Cp (fF)
250
200
Patterned
150
Solid
100
Patterned
Aluminum
50
0
0.1
1
Frequency (GHz)
10
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Circuit Models of On-Chip Inductors
Csi
Rsi
Ls
Cox
Cox
Rs
Conventional Design
Ls
Rs
With
Patterned Ground Shield
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Effect of Aluminum Ground Shields on Q
8
6
Patterned
Q
Solid
4
None
(19 Ω-cm)
2
0
0.1
None
(11 Ω-cm)
1
Frequency (GHz)
10
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Effect of Polysilicon Ground Shields on Q
8
6
Q
Patterned
4
Solid
2
Patterned
Aluminum
0
0.1
1
Frequency (GHz)
10
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Parallel LC Resonator at 2 GHz
Magnitude of Z (kΩ)
1.50
1.25
~30%
Zmax at fc
Q RESONATOR
∆f
1.00
C
fC
= ----∆f
L
0.75
0.50
Patterned
Polysilicon
0.25
0.00
1.0
1.5
2.0
2.5
Frequency (GHz)
3.0
None
(11 Ω-cm)
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Noise Coupling Measurement
HP 8720B
G
S
G
P
R
O
B
E
Probe Station
G
S
G
P
R
O
B
E
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Effect of Polysilicon GS on Isolation
-40
|s21| (dB)
-50
Patterned
None
(19 Ω-cm)
-60
-70
None
(11 Ω-cm)
-80
Probes up
-90
0.1
1
Frequency (GHz)
10
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A Single-Chip CMOS GPS Receiver
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Conclusions
• A compact model for spiral inductors on silicon
has been presented.
• Physical phenomena important to limitation
and prediction of Q were investigated.
• Effects of various structural parameters on Q
have been demonstrated.
• The scalable model can be used as a design
tool for optimizing Q.
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Conclusions on Patterned Ground Shield
• Improves Q by eliminating substrate loss
(up to 33% at 1-2 GHz)
• Improves isolation by preventing substrate
coupling (up to 25 dB at 1 GHz)
• Simplifies modeling
• Eliminates substrate dependency
• Requires no additional process steps
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Acknowledgments
• Center for Integrated Systems Industrial Sponsors
• National Science Fundation (MIP-9313701)
• National Semiconductor FMA Fellowship (Dr. G. Li)
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Acknowledgments
• Prof. Simon Wong
• Prof. Dwight Nishimura, Prof. Krishna Saraswat, and
Prof. Robert Dutton
• Prof. Calvin Quate
• Prof. Tom Lee
• Rosanna Foster and Ann Guerra
• CIS and SNF Staff Members
• Friends
• Family