ANALYTICAL MODEL FOR DYNAMIC AVALANCHE
BREAKDOWN IN POWER DEVICES
L. Gohler, J. Sigg*
Universitat der Bundeswehr Munchen, Germany
*Siemens AG, Corporate Technology, Munich, Germany
Abstract. The behaviour of avalanche breakdown under the inuence of initiating currents
and generated carriers is analysed. It is shown, that these mechanisms cause a breakdown
voltage shift and a self-limitating avalanche current. A GTO circuit model is enhanced
by the ndings and a circuit simulation with SABER demonstrates the gain in model
accuracy.
Keywords. dynamic avalanche breakdown, avalanche breakdown, post-avalanche behaviour, safe operating area, turn-o failure, GTO turn-o
INTRODUCTION
The eect of impact ionization occurs in pn -junctions
at high reverse voltages. In this case, carriers moving under the inuence of the electric eld from one
end of the depletion region to the other get enough
energy to ionize silicon atoms by impact. The generated electrons and holes contribute to the total current and can split other bonds if they get suciently
accelerated, until the next impact happens. Impact
ionization mainly takes place at the location of the
maximum electric eld. Consequently, there are, for
instance, more free electrons than holes in the lightly
doped n -region ( -region) of a p+ -junction and the
net charge is reduced. According to Poisson's equation the electric eld is not only determined by the
ionized doping atoms, but also by the free charge carriers. Hence, the electric eld has no longer a triangular shape, but is signicantly lower over the increased width of the depletion region, just as shown
by Wachutka [1]. This leads to a self-limitation of
avalanche multiplication and therefore to a decrease
of current slope with increasing reverse voltage (assumption of quasi-neutrality outside the depleted zone,
Fig.1). Avalanche current limitation appears either
at high voltages and low initiating currents or at lower
voltages and higher initiating currents (Fig.2). Higher
initiating currents, consisting of particles with the
same charge as the ionized doping atoms in the lightly
doped region, lead to a greater amount of generated
charge carriers and therefore to a lower breakdown
voltage. The shift of breakdown voltage is important when considering dynamic avalanche breakdown
in power semiconductor devices.
Fig.1. Avalanche generation current in power devices with and without consideration of generated
carriers (Vbr : breakdown voltage).
Fig.2. Avalanche current for low and high initiating currents. Note the decrease of breakdown voltage and the dierent waveform at high currents
(Vbr , Vbr : breakdown voltages).
THEORY
In this section approximations for the generated currents in p+ - and p+ n+ - structures under static conditions are derived. The rst part focuses on the p+ structure (Fig.3a; N = Nd Np+ ). To ease calculation the coordinate system is moved, so that E(x)
equals zero at x = 0 (w > 0).
p
p
p
C
1
Jgen = k coth C2 C1 , 21 C1w , kk2 , Jp0 (3)
4
4
with
C1 = (k4Jp0 + k2)2 , 2k5 exp k3;
C2 = p1 arcoth k4Jpp0 + k2
C1
C1
Fig.3. Electric eld in p+ - (a) and p+ n+ -structures (b) at various reverse voltages.
and
qN
J
d
k1 = J0; k2 = m1 " , "v ; k3 = ,m2 ;
s
2m
1
k4 = "v ; k5 = k1 k4:
s
The value of the total current density J at x = w is:
The basic equation describing impact ionization is
Chynoweth's law [2], which can be combined with the
static formulation of the continuity equation. G denotes the generation rate depending on the ionization rates of electrons (n) and holes (p ) per unit
J = J0 + Jgen = Jp0 + Jn0 + Jgen;
length as well as the current density of each carrier
type (Jn;p 0).
where Jp0 and Jn0 stand for the current densities, that
initiate impact ionization, w represents the width of
p +R
G = n Jqn + p Jqp = 1q @J
(1)
the depletion region and Vjr equals the sum of the
@x
reverse voltage and diusion voltage. Neglecting the
generated holes and assuming constant electron and
b
n;p
hole currents over the whole depleted zone provides
n;p = An;p exp , E
for the width w:
s
(An;p , bn;p = const:). At this point some assumptions
jr
w qNd J2V
:
(4)
are necessary to get an integrable form of (1):
n0 ,Jp0 +Jgen
" ,
"vs
recombination can be neglected (G R)
Eqn. (3) can be solved with a circuit simulator (for in the carrier velocity is constant and equal for elec- stance SABER). However, in consequence of the poor
trons and holes:
numerical stability this formula is not recommended
for circuit models. A very brief expression requiring
vn vp vs 107 cms
physical constants only follows from further simpli instead of n;p an eective ionization rate i cation (generated holes neglected):
given by Ghandi [3] describes impact ionization
m
J
and can be approximated according to Paul [4]:
0 0
Jgen =
;
(5)
, b bi exp p bi
n p i = Ai exp , Ei ,
2AiVjr
2Vjr E 0 , 1
i 0 exp (m1 E , m2 )
with [3]
E 0 = qN" d , Jn0"v, Jp0 , mJgen
:
(6)
V,
Ai = 1:07 106cm,1 , bi = 1:65 106 cm
s
0 "vs
The factor m0 was chosen for best agreement between
0 = Ai exp , Ebi0 , m1 = Ebi02 , m2 = Ebi0 ,
(3) and (5):
V.
E0 1:9 105 cm
m0 1:35:
From Poisson's equation one gets (J = Jn + Jp ):
Eqn. (5) approximates (3) for an arbitrary ratio of Jp0
xZ0 =x
2J
qN
J
and Jn0 at low initiating currents and for Jp0 Jn0 at
p+ d,
0:
E(x) =
dx
(2)
"vs
" "vs
high initiating currents. These two cases are typically
x0 =0
found in power semiconductor devices. Eqn.(5) can
Inserting (2) into (1) leads to a second order dieren- be implemented in circuit models easily.
tial equation and after some calculation to the desired Taking into account the temperature dependence of
value of Jgen (implicit function):
avalanche breakdown yields:
Jgen = Jp (w) , Jp (0) = Jp (w) , Jp0 ;
bi (T) = bi0 + bi1T + bi2 T 2;
Ai (T) = Ai0 + Ai1T + Ai2 T 2
rises too fast the middle junction breaks down far below the static breakdown voltage. The resulting high
and
power loss destroys the device. In common applicacm
7
tions the so-called snubber-capacity (CRCD in Fig. 4)
vs (T) = 2:4 10 , s T in parallel to the GTO limits the voltage slope during
1 + 0:8 exp 600K
turn-o. Circuit simulation helps to nd the appropri(bin; Ain = const:).
ate value of CRCD as an optimum between power loss,
Now a p+ n+ -conguration is considered. According switching velocity and even the prevention of turn-o
to Fig.3b this structure behaves equivalent to the p+ - failures at the given voltage, current and temperature
structure at low reverse voltages, i. e. the current slope levels.
is limited. In case of punch through, the width of
the depletion region does not change. Electric eld
weakening has therefore less eect and the current can
rise again rapidly at a certain value of reverse voltage
('second-step breakdown phenomenon', Takata et al.
[5]). If the voltage drop over the n+ - and p+ -region
is suciently small one can derive for Jgen :
m0 J0
Jgen =
(7)
m1 E 0
0 exp (m1 En ,m2 )(exp (m1 E 0 w ),1) , 1
(m0 1:3). En stands for the electric eld at the
border between the - and the n -region. With (4)
(completed by m0 ) the depletion region has a width
of:
wn :
w = ww :: ww >
(8)
wn
n
Denig now a variable En as:
En = Vwjr , 12 E 0 wn
(9)
n
means for the value of En:
n0 :
En = E0 :: E
(10)
En > 0
n
DYNAMIC AVALANCHE BREAKDOWN
The term dynamic avalanche breakdown describes
an avalanche breakdown at high initiating currents
(Jp0 Jn0) lowering breakdown voltage. These conditions exist in power devices only during switch-o,
which explains the denotation 'dynamic'.
In principle, dynamic avalanche generation appears in
various semiconductor power devices, but the amount
of generated charge and consequently the inuence
on the voltage and current waveforms diers substantially. Normally, current densities in IGBTs, SCRs
and diodes, for example, are too low for a signicant
breakdown voltage shift. GTOs, however, need a protection circuit to prevent demage.
When a GTO -thyristor is turned o, a large hole current ows out of the gate. Obviously, one part of the
holes leaving the device moves through the reverse biased middle junction. If the voltage across the device
Fig.4. DC-chopper (V0 = 4kV , VG = ,15V ,
RL = 1:33
, LL = 25H, RRCD = 4
,
CRCD = 6F, RG = 2m
, LG = 0:4H,
L1 = L2 = 0:2H).
The transient behaviour of avalanche generation needs
further consideration. Assuming a constant anodecathode voltage and a slight increase of hole current, for example, one can observe the following effects (Fig.5). During a rst (instable) phase of dynamic avalanche breakdown the additional holes lead
to a higher slope of the electric eld (t = t1 , Fig.5),
because it takes a certain time, until electrons and
holes are generated by impact. After that neglectable
short time span (rst order estimation of duration:
t2 , t1 2vws ) quasi-static conditions predominate and
Fig.5. Dynamic avalanche breakdown in a GTO,
carrier ow and eld distribution (t0: before the
onset of avalanche multiplication, t1 : instable case,
t2 : stable case, ia : anode current, ig : gate current).
Fig.6. Post-avalanche behaviour of p+ -diodes,
simulated with eqn. (7).
Fig.7. Post-avalanche behaviour of p+ -diodes,
measured and numerically calculated with basic
equations, taken from Takata et al. [5].
the ndings outlined above are applicable (t = t2 ,
Fig.5). Each time the voltage drop over the reverse
biased middle junction or the initiating hole current
changes its value the device goes through a similar cycle.
RESULTS
Avalanche generation at low initiating currents can be
investigated by determining the v -i characteristic of
p+ -diodes for Vjr > Vbr (post-avalanche behaviour).
Data published by Takata et al. [5] were used as a comparison. Fig.6 displays the simulation, whereas Fig.7
gives an impression of measurement (w = 130m).
The simulated curves are obtained from (7) and not
from (5), because p+ -diodes normally contain a thin
n+ -layer, that lowers contact resistance. It can be
seen, that both curves show good agreement.
Furthermore, the deviation of breakdown voltage calculated with (5) and (7) at low initiating currents to
experimental results in Ghandi [3] does not exceed 10%
Fig.8. Dynamic avalanche breakdown of a GTOthyristor - circuit simulation with SABER. The
ash symbol marks the point of maximum power
dissipation (va : anode-cathode-voltage, vg : gate
voltage, ia : anode current, ig : gate current).
Fig.9. Dynamic avalanche breakdown of a GTO-thyristor - 1-D device simulation with MEDUSA (taken from
Gerstenmaier [6]). The ash symbol marks the point of
maximum power dissipation (UA : anode-cathode-voltage,
UG : gate voltage, IA : anode current, IG : gate current).
in the interesting range of doping.
The very fast destruction of a GTO-thyristor by dynamic avalanche breakdown makes it dicult to measure the needed current and voltage waveforms, but
device simulation oers an acceptable benchmark substitute.
Fig.8 and Fig.9 show the device simulation by Gerstenmaier [6] and the circuit simulation with the improved GTO model based on Kraus [7] in SABER. In
both cases the circuit equals that in Fig.4.
The advantages of using (5) instead of a simple expression can be seen in an improved accuracy of
the current-breakdown voltage characteristic at various current levels and a more gradual breakdown behaviour of the model, which is closer to reality.
CONCLUSION
An analytic description of dynamic avalanche breakdown phenomenon, suitable for circuit models has
been presented. The solutions were applied to a quasi-
static description of dynamic avalanche breakdown, References
with the GTO-thyristor as an example. Comparisons
with numerical simulations and measurements prove a [1] G. K. Wachutka, Analytical Model for the Destruction Mechanism of GTO - Like Devices
good accuracy.
by Avalanche Injection, IEEE Trans. on El. Dev.,
Acknowledgement
vol. 38, No. 6, 1991, pp 1516-1523.
The authors wish to thank Prof. Homann from De- [2] A. G. Chynoweth, Ionization Rates for Electrons
partment of Electrical Engineering of University of
and Holes in Silicon, Physical Review 109, 1958,
Bundeswehr, Prof. Wachutka from Department of
pp. 1537-1540.
Physics of Munich University of Technology and Dr.
Kogel from Department of Physics of University of [3] S. K. Ghandi, Semiconductor Power Devices,
John Wiley & Sons, New York, 1977.
Bundeswehr for their useful physical and mathematical hints.
[4] R. Paul, Halbleiterelektronik, Dr. Alfred Huthig
Verlag, Heidelberg, 1975.
Address of the Authors
[5] I. Takata, T. Yamada, N. Soejima, Leakage CurUniversitat der Bundeswehr Munchen
rent and Breakdown Characteristics of P-N DiWerner-Heisenberg-Weg 39
odes, Proc. of ISPSD '93, 1993, pp 205-211.
D-85577 Neubiberg
Germany
[6] Y. C. Gerstenmaier, 1-D Simulation and AnaTel.: +49-89-6004-3665
lytic Theory of the Critical Turn-O Behaviour
Fax: +49-89-6004-2223
of High-Power GTO-Thyristors with a Chopper
email: goehler@e4s21.et.unibw-muenchen.de
Circuit, Proc. of ISPS '92, 1992.
[7] M. Bayer, R. Kraus, A new analytical GTO - Model for Circuit Applications, Proc. of PESC '95,
1995.