Lecture 5 ◆ The “WHY” slide Logistics ■ ■ ■ ◆ HW1 due today HW2 available today, due Wed 1/21 Office Hours this week: ■ µ Me: Friday 10:00-11:00 CSE 668 µ TA (Josh): Friday 3:30 CSE 002/3 ◆ ■ ■ ◆ ◆ Last lecture ■ ◆ ■ ■ 1 NAND/NOR more common/efficient ◆ It is always good to remember logical/theoretical concepts visually. This is one way to remember the NAND/NOR conversion and De Morgan’s laws easily. Logic Simplification Converting to use NAND and NOR Minimizing functions using Boolean cubes CSE370, Lecture 5 NAND and NOR are more efficient gates than AND or OR (and therefore more common). Your computer is built almost exclusively on NAND and NOR gates. It is good to knowhow to convert any logic circuits to a NAND/NOR circuit. Pushing bubbles ■ Logic gates and truth tables Implementing logic functions Canonical forms Today’s lecture ■ Converting to use NAND and NOR If you are building a computer or a cool gadget, you want to optimize on size and efficiency. Having extra unnecessary operations/gates is not great. We teach nice techniques to allow logic simplifications. CSE370, Lecture 5 2 CMOS NAND and NOR Gates CMOS logic gates are more common and efficient in the inverted forms ■ ■ NAND, NOR, NOT Even though Canonical forms discussed so far used AND/OR, NAND/NOR preferred for real hardware implementation X Y Z X Y Z X 0 0 1 1 Y 0 1 0 1 NOR Z 1 1 1 0 NAND CSE370, Lecture 5 3 NAND and NOR (truth table) CSE370, Lecture 5 NAND and NOR (logic gates) ◆ (X + Y)' = X' • Y' NOR is equivalent to AND with inputs complemented X 0 0 1 1 Y 0 1 0 1 X' 1 1 0 0 Y' 1 0 1 0 de Morgan's ■ (X + Y)' X' • Y' 1 1 0 0 0 0 0 0 ■ ■ ■ ■ ■ (X • Y)' = X' + Y' NAND is equivalent to OR with inputs complemented CSE370, Lecture 5 X 0 0 1 1 Y 0 1 0 1 X' 1 1 0 0 4 Y' 1 0 1 0 (X • Y)' X' + Y' 1 1 1 1 1 1 0 0 Standard form: Inverted: AND with complemented inputs ≡ NOR OR with complemented inputs ≡ NAND OR ≡ NAND with complemented inputs AND ≡ NOR with complemented inputs NOR OR 5 A'B' = (A + B)' A + B = (A'B')' CSE370, Lecture 5 NOR OR A' + B' = (AB)' (AB) = (A' + B')' pushing the bubble NAND NAND AND AND 6 Converting to use NAND/NOR Converting to use NAND/NOR (con’t) Introduce inversions ("bubbles") ◆ ■ Z = AB+CD µ Conserve inversions µ Do not alter logic function Z = AB + CD Example ◆ ■ Example: AND/OR network to NOR/NOR ◆ Introduce bubbles in pairs AND/OR to NAND/NAND = (A'+B')'+(C'+D')’ = (A'+B')'+(C'+D')' = [(A'+B')'+(C'+D')’]’’ = [(A'+B')(C'+D')]' = {[(A'+B')'+(C'+D')']'}' = [(AB)'(CD)']' A A B NAND B B Z C C D D NAND Z C Z Z NOR C’ D CSE370, Lecture 5 B’ NOR NAND 7 Converting to use NAND/NOR (con’t) D’ CSE370, Lecture 5 8 Converting to use NAND/NOR (con’t) Example: AND/OR network to NOR/NOR ◆ A’ NOR A Example: OR/AND to NAND/NAND ◆ Z = AB+CD = (A'+B')'+(C'+D')’ = [(A'+B')'+(C'+D')’]’’ A = {[(A'+B')'+(C'+D')']'}' B A A B B NAND Z C D D NOR Converting to use NAND/NOR (con’t) B C D D Example: OR/AND to NOR/NOR A NOR NAND Z B Z B C C D D NOR Z NOR NAND CSE370, Lecture 5 10 A NAND C D’ CSE370, Lecture 5 ◆ A Z D Z NAND Converting to use NAND/NOR(con’t) Example: OR/AND to NAND/NAND B C’ Z 9 A C NOR CSE370, Lecture 5 ◆ B’ Z NAND NOR C A’ 11 CSE370, Lecture 5 12 Example of bubble pushing: before pushing Example of bubble pushing: NAND/NAND ‘ CSE370, Lecture 5 13 Example of bubble pushing: NOR/NOR CSE370, Lecture 5 Goal: Minimize two-level logic expression ◆ Algebraic simplification ■ not an systematic procedure ■ hard to know when we reached the minimum ◆ Just program it!! Computer-aided design tools ■ require very long computation times (NP hard) ■ heuristic methods employed – "educated guesses” ◆ Visualization methods are useful ■ our brain is good at figuring simple things out ■ many real-world problems are solvable by hand ‘ CSE370, Lecture 5 15 Key tool: The Uniting Theorem ◆ The uniting theorem → A(B’+B) = A ◆ The approach: ■ ■ 14 CSE370, Lecture 5 16 Boolean cubes ◆ Visualization tool for the uniting theorem ■ Find some variables don’t change (the A’s above) and others do (the B’s above) Eliminate the changing variables (the B’s) n input variables = n-dimensional "cube" 01 0 B 0 1 0 1 F 1 1 0 0 2-cube Y X 00 A 0 0 1 1 11 1 1-cube 10 X 1011 A has the same value in both “on-set” rows ⇒ keep A 111 Y Z 101 0011 1111 0111 4-cube 0010 3-cube B has a different value in the two rows ⇒ eliminate B 011 000 X 100 Y Z 0000 W X 1000 1100 0100 F = A'B'+A'B = A'(B+B') = A' CSE370, Lecture 5 17 CSE370, Lecture 5 18 Mapping truth tables onto Boolean cubes Example using Boolean cube ◆ Binary full-adder carry-out logic ◆ ON set = solid nodes ◆ OFF set = empty nodes ■ Look for on-set adjacent to each other A 0 0 1 1 B 0 1 0 1 F 1 0 1 0 F Sub-cube (a line) comprises two nodes 11 01 B 10 00 A 0 0 0 0 1 1 1 1 A varies within the sub-cube; B does not A On-set is covered by the OR of three 1-subcubes B 0 0 1 1 0 0 1 1 Cin 0 1 0 1 0 1 0 1 Cout 0 0 0 1 0 1 1 1 19 Another example using Boolean cube ◆ Cin 0 1 0 1 0 1 0 1 D 0 0 0 1 01 1 1 1 ■ ■ A A A A A AB(Cin'+Cin) 20 0-cube 1-cube 2-cube 3-cube (a (a (a (a single node) yields a term in 3 literals line of two nodes) yields a term in 2 literals plane of four nodes) yields a term in 1 literal cube of eight nodes) yields a constant term "1" (A'+A)BCin 111 011 B 000 Cin 101 A(B+B')(Cin+Cin‘) 111 110 010 000 F(A,B,C) = ∑m(4,5,6,7) On-set forms a square (a 2-D cube) B C A 101 A 100 A is asserted (true) and unchanging B and C vary This sub-cube represents the literal A D = BCin+A CSE370, Lecture 5 101 In a 3-cube (three variables): ■ On-set is covered by the OR of one 2-D subcubes and one 3-D subcubes B 0 0 1 1 0 0 1 1 000 Cin CSE370, Lecture 5 ■ A 0 0 0 0 1 1 1 1 A(B+B')Cin B M-dimensional cubes in n-dimensional space Changed one bit from the previous function ■ 111 Cout = BCin+AB+ACin This sub-cube represents B' CSE370, Lecture 5 (A'+A)BCin 21 CSE370, Lecture 5 22