EE 536a
Lecture Aid
#8
Academic
Year
2010--2011
Sinusoidal Oscillator
Networks
Dr John Choma,
Dr.
Choma
Professor Of Electrical Engineering
Ming Hsieh Department of Electrical Engineering
Powell Hall Of Engineering (PHE) Room #620
University of Southern California
University Park; Mail Code: 0271
Los Angeles, California 90089-0271
(213) 740-4692 [Office]
johnc@usc.edu [E-Mail]
www.jcatsc.com [Course Notes]
Overview Of Lecture

Sinusoidal Oscillator Architectures
 Wien Bridge
 Colpitts
 Hartley
 Differential Topology With Tank Load
 Negative Resistance

Amplitude
A
lit d Li
Limiting
iti
 Describing Functions
Basic Theory
Limitations
Examples
 Modified Colpitts

Phase Noise
 Basic Theory
 Limitations
 Example
EE 536a Lecture Aid #7
Integrated Circuit Oscillators
421
Wien Bridge Oscillator


Architecture
 Requires Non-Phase Inverting
Amplifier
 Requisite Amplifier Gain Is
Generally Of Order Of 3 -To- 5
 Positive Feedback Achieved With
Highpass
g p
R1–C1 Subcircuit
Analytical Approach
 Determine Loop Gain, T(s), w/r To
Feedback Branch
 Let 1 + T(jo)  0
Characteristic Polynomial Is System
R1
R2
C2
C1

A

Vo

A

Vo
Vx

Ix
R2
C2
Return Difference
Vanishing Characteristic Polynomial
 sC
V
1
 x
Oscillation Frequency Is o
T(s)  
 1  sR C  I
Ideally Desire Only One Frequency Solution To
1 1 x

Preserve Spectral Purity
Set Damping Factor Less Than Zero To Establish
Positive Feedback, Thereby Ensuring Oscillation At Startup
EE 536a Lecture Aid #8
Integrated Circuit Oscillators
422
Wien Bridge Design Constraints
Vx

Ix
R2
C2
Analytical Results
Vo
 sC1  Vx
 sC1  
1  A R2 

T(s)  
R



 o

1

sR
C
I
1

sR
C
1

sR
C
1 1 x
1 1 
2 2


Ro
Vx

1  A R2
Vx
 Ro 
Ix
1  sR2C2


A



Circuit
C
cu t Analysis
a ys s
 Amplifier Voltage Gain Is A
 No I/O Phase Inversion
 Amplifier Output Resistance Is Ro
 Resultant Model
Ix


R2 V

C2
AV


Oscillation Criterion T(jωo )   1
 Oscillation Frequency
1
1
ωo 

R1R2C1C2
 R1  Ro  R2C1C2
R1  Ro C2
 Gain
G i Requirement
R
i
tF
For Z
Zero Or
O
R C
A  1

 1 1  2
Negative Damping Coefficient
R2
C1
R2 C1
EE 536a Lecture Aid #8
Integrated Circuit Oscillators
423
Wien Bridge Observations

Tuning
g
 Often Accomplished By Realizing Capacitors As Back Biased PN
Junctions (Varactors) Or By Exploiting The Voltage Dependence
Of MOS Device Capacitances
p
Enables Voltage-Controlled Oscillation
Linear Frequency Dependence On Control Voltage Is A Daunting


Challenge
Ganged Capacitive Tuning Accomplishes Wider Tuning Range
Overall Performance
 Oscillation Frequencies Can Be Limited Because Of Required
G t Than
Greater
Th Unity
U it Voltage
V lt
Amplifier
A lifi G
Gain
i
Amplifier Bandwidth Must Be At least Three Times That Of ωo
Gain Requirement Is A ≈ 3 For R1 = R2, C1 = C2, And Ro << R1
 Spectral Purity Is Marginal Because Of Lack Of High Q LC Tank
Increased Phase Noise
Somewhat Poor Predictability Of Oscillatory Amplitude (Addressed
Later In These Notes)

Advantage Is Obviation Of Inductance
EE 536a Lecture Aid #8
Integrated Circuit Oscillators
424
Colpitts Oscillator


Architecture
 Requires Phase Inverting Amplifier
 Requisite Amplifier Gain Is Generally
y
Of Order Of Unity
 Positive Frequency-Dependent
Feedback Achieved With Inductance, L
 Resistance Ro Is Output Resistance Of
Amplifier
Analytical Approach
 Determine Loop Gain, T(s), w/r To
Inductive Admittance
 Let 1 + T(jo)  0
Vanishing Characteristic Polynomial
Oscillation Frequency Is o
Desire
D i O
Only
l O
One F
Frequency S
Solution
l ti T
To
Integrated Circuit Oscillators

A

C1
Ro
C2
Vx

Ix
C1
Preserve Spectral Purity
Set Gain To Yield Damping Factor Less Than
Zero To Ensure Oscillatory Startup
EE 536a Lecture Aid #8
Vo
L
Vo

A

Ro
C2
 1  Vx
T(s)   
 sL  I x
425
Colpitts Oscillator Analysis

Loop Gain

A  1  sR C  C
 1  Vx
o 1
2
T(s)   

2
 sL  I x
s LC 1  sR C
1


o 2

Vx


Ix
C1
Return Difference
1  T(jω) 




 2 LC1 1  j RoC2

A 
EE 536a Lecture Aid #8
1
C2
Vx

C1  C2
LC1C2
Gain Requirement (Ensures   0)
(Real Part)
C
Ro

A


Oscillation Frequency (Imaginary Part)
o 


 2 LC1  A  1  j Ro  2 LC1C2  C1  C2
Vo
C1

V

Vo
Ro
Ix

AV
+
C2
C2
Integrated Circuit Oscillators
426
Colpitts Observations

Tuning
u g
 Generally Accomplished By Realizing Capacitors As Back Biased
PN Junctions Or By Exploiting The Voltage Dependence Of
MOSFET Gate Capacitance
p
 Ganged Capacitive Tuning Accomplishes Wider Tuning Range
 Linear Frequency Dependence On Control Voltage Is Marginal

Overall Performance
 Oscillation Frequencies Are Potentially High Because Voltage
Amplifier Gain Requirement Is Small
 Spectral Purity Is Good Because Of LC Tank Tuning
Generally Good Phase Noise
Generally Good Predictability Of Oscillatory Amplitude
Design
g Problems
 Requires Inductance Which Have Relatively Low Q In ICs
 Inductive Feedback Element Renders Awkward The Biasing Of The
q
Voltage
g Amplifier
p
Requisite
Acts As Short Circuit Between I/O Ports At Low Frequencies
May require Capacitive Coupling Or Some Other Isolation Form

427
EE 536a Lecture Aid #8
Integrated Circuit Oscillators
427
Alternative Colpitts Oscillator



Architecture (Without Biasing Details)
 Requires Common Gate (Or Common
Base) Amplifier
 Gain Cell Operates Effectively As A Current
Amplifier
 Positive Feedback Achieved With
Capacitance C1
Capacitance,
 Resistance Ro Includes Generally Large
Shunt Output Resistance Of Amplifier
C1
Vo
C2
Ro
Vx


Ix
Vo
C
R
Analytical Approach
 Determine Loop Gain, T(s), w/r To
Capacitive I/O Feedback Admittance
V
 Let 1 + T(jo)  0
T(s)  sC1 x
Observations
I
x
 Relatively Straight Forward To Bias
 High
Hi h Frequencies
F
i Because
B
Of Common
C
Gate
G t Current
C
t Amplifier
A lifi
 High Spectral Purity Because Of LC Tank
EE 536a Lecture Aid #8
L
2
o
L
 
Integrated Circuit Oscillators
428
Alternative Colpitts Analysis

Loop
oop
Gain
T(s) 
V
 sC1  I x


sL
2
sC  1 
 s LC 
1
2
R
o


1  sL R g  sC
o
m
2


x


Vx


Return Difference
Ix
C2


g L

2L
2
m
g 
C  C   j
 C  C   LC C 
m
1
2
1
2
1 2
 R


R
o

 o

1  T(jω)  
n 
gm  jC2 1  jL Ro



gm
C1  C2

LC1C2
RoC1C2

m o
EE 536a Lecture Aid #8


o2 L C1  C2


1
C C
1
1
Vx

nLC2
Ix
Gain Requirement (Ensures   0)
g R
L
C

Oscillation Frequency
o 
Ro



Vo
1
n 1  n 
Integrated Circuit Oscillators
V

C2 gmV

2
Vo
Ro
L
429
Hartley Oscillator



Architecture
c tectu e
 Requires Phase Inverting
Amplifier
 Requisite
q
Amplifier
p
Gain Is
Generally Of Order Of Unity
L2
 Positive Feedback Achieved With
Capacitance,
p
C
 Resistance Ro Is Generally Small
Output Resistance Of Amplifier
Analytical Approach
 Determine Loop Gain, T(s), w/r
To Inductive Admittance
 Let
et 1 + T(j
(jo)  0
Observations
 Performance Analogous To
Colpitts
 Downside Is Two Inductors
EE 536a Lecture Aid #8
C
Vo
Ro

A

L1
Vx

Vo
Ix
L2
Integrated Circuit Oscillators
Ro

A

T(s) 
 sC 
L1
V
I
x
x
430
Hartley Oscillator Analysis

Loop
oop Gain
Ga
T(s) 

 sC 
Vx
I
x

2

3
s RoC L1  L2  s  A  1 L1L2C

R  sL
o



1  2 L  L C  jL 1  2  A  1 L C
1 2 
1 
2 

1  T(jω)  
1  jL R

1
L2
2
Vx


A 
EE 536a Lecture Aid #8
Vo
Ro
Ix
Gain Requirement (Ensures   0)
L1
L1

L L C
1
Ro

A

Oscillation Frequency
o 

1 o
Vo
Ix
1
Return Difference

Vx

L2
L2
Integrated Circuit Oscillators

V


AV
+
L1
431
Transconductor-Based Hartley
C
CL2
g
m4



gm33
g
ma

g
mo

Ph
Phase-Inverting
I
i A
Amplifier
lifi
g
m1
1

gm2
Inductance L1


Inductance L2
Vo
CL1

Amplifier:
p
Gain Is –A = –g
gma /g
gmo ; Output
p Resistance Is 1/g
gmo

Gyrators: L1 = CL1 /gm1gm2 And L2 = CL2 /gm3gm4

Comments
 No Passive Inductances
 Tunable Active Inductance Through Voltage- Or Current-Controlled
Adjustment In Transconductance
 Frequency Limited Because Of Gyrators
 Power Hungry Because Of Six Transconductors
EE 536a Lecture Aid #8
Integrated Circuit Oscillators
432
Balanced Differential Oscillator Architecture

Architecture
c tectu e
 Tank Load Circuit
 Resistance R Includes:
Load Resistance
Inductor Frequency-Dependent
Vdd
R
Q Effects
Transistor Output Port
Resistance

Balanced Differential Pair
Configured For Negative Output
L
 Vo 
C
L
R
2IQ
Resistance
V
Vss
Even Ordered Harmonics Are Eliminated By Balanced Architecture

Analytical Approach
 Half
H lf Ci
Circuit
it A
Analysis
l i
 Determine Norton Equivalent Output Port Circuit
 Determine Criteria For Sinusoidal Oscillation
Damping
D
i F
Factor
t M
Mustt Be
B Zero
Z
Or
O Slightly
Sli htl N
Negative
ti
Oscillation Frequency Is Undamped Natural Frequency Associated With
Zero Damping Factor
EE 536a Lecture Aid #8
Integrated Circuit Oscillators
433
Differential Oscillator Analysis


Half Circuit
 AC Schematic
 Small Signal Model
 Note Vgs ((Signal)
g ) Is
-Vo /2 (Signal)
Analysis
 KCL At Output Node



Vo /2
R
L
gmVo
2
2C
R
L
2C
Vo /2
V
Vo /2


sL


2



1
1
g
R
2s
LC

V
V
V
V
V
m
o  o  s2C o  g
o  
o  0
R

m 2
2R
2sL
2
sL

 2


1
Non-Positive Damping Factor Requires: g m R  1
o 
Oscillation Frequency:
q
y
2LC
gmR Larger Than Unity Required For Startup
Oscillation Frequency Is Nominally The Self-Resonant Frequency
Technical
ec ca Approach
pp oac Presumes
esu es The
e Existence
ste ce O
On A Nonzero
o e o Output
Signal Voltage, Vo, Whence KCL Mandates Zero Characteristic
Polynomial At The Oscillation Frequency
EE 536a Lecture Aid #8
Integrated Circuit Oscillators
434
Comments On Differential Oscillator

Widely
de y Used
 Simple Circuit Architecture
 Widely Used In RF, PLL, And
Other High
g Applications
pp
 Low Harmonic Content Because
Of Balanced Topology
 Capable Of Very High Oscillation
Frequencies


Vdd
R
L
 Vo 
C
L
R
2IQ
Relatively Good Phase Noise
Characteristics Because Of
V
Vss
Tank Load Circuit, Assuming Reasonable Inductor Quality Factors
Shortfalls
 Requires Two Inductances
 Inductance Q Is Limited In Monolithic Applications
Exacerbates Phase Noise
Increases Circuit Power Dissipation
 Tuning Range Is Limited Because Of Inverse Square Root
Dependence On Tunable (Varactor) Load Capacitance
EE 536a Lecture Aid #8
Integrated Circuit Oscillators
435
Negative Resistance Alternative

Osc at o C
Oscillation
Criterion
te o
 Negative Damping
Determined By Appropriate Circuit Resistances
Requires Negative Resistance To Null Damping Factor
 Several Ways To Establish A Negative Dynamic Resistance

Inductively-Terminated Gate
I  g V  sC V  0 ;
x
1
Z

m

in
gs
I
x 
V
x
g
2
m
x

1 s L C
Model
 Inductor Lg Can
Resonate With
Capacitance Cgs

V
g gs
Lg

  V  sC V
sC
gs
 sL 
g
Zin
gs
2
1 s L C
g gs
gmV
V

Lg
2
1  s Lg C gs
Zin
g
m
Cgs

Vx

Cgs
Ix
Lg
Zin
Shunt Resistance
Negative In Steady
State At High Frequencies
EE 536a Lecture Aid #8
Integrated Circuit Oscillators
436
Negative Resistance Observations

Lg
C cu t And
Circuit
d
Small Signal
Circuit Model
Lg
2
Zin
g
Zin

1  s Lg C gs
Cgs
m
Observations
 Resistance Established At The Source Terminal In the Steady State
Is Negative For Frequencies Satisfying  2LgCgs > 1
 Can Be Exploited To Develop Oscillator Architecture
 On the Other Hand, Note That Parasitic Inductance (Perhaps From
Bond Wire Characteristics) Is To Be Avoided Like The Proverbial
Plague In Conventional Linear Amplifier Design
Especially Germane To Source Followers
Also Relevant To Source-Degenerated Common Source Stage
 Note That For Low Signal
g
Frequencies,
q
, Effective Shunt Resistance
At Source Terminal Is 1/gm, As Expected
EE 536a Lecture Aid #8
Integrated Circuit Oscillators
437
Describing Function—A Crash Course

Amplitude Prediction In Sinusoidal Oscillators
 Linear Circuit Analysis
Can Predict Oscillation Frequency And Startup Criteria
Cannot Predict Oscillatoryy Amplitude
p


 Output Response Is Proportional To Input In Linear Systems
 Oscillator Has No Independent Signal Source Input
Describing Function
Useful For First Order Prediction Of Sinusoidal Oscillation Amplitude
Not Especially Useful For Non-Sinusoidal Oscillators
Describing Function Concept
 Gain In Linear Sense Is Ratio Of Output Small Signal Response -ToTo
Input Small Signal Excitation
 Describing Function Is Ratio Of Amplitude Of Fundamental
Frequency Component Of Output Response -To- Amplitude Of
Applied Single Frequency Input Sinusoid
Gain, Or Transfer Function, Involves Linearization In Time Domain
Describingg Function Embodies Linearization In Steadyy State Frequency
q
y
Domain
EE 536a Lecture Aid #8
Integrated Circuit Oscillators
438
Nonlinearities In Frequency Domain

Nonlinear
o
ea C
Circuit
cu t O
Or Syste
System
 Sinusoid Input
 2
x(t)  X cos t   X cos 
in
in
 T

a
Electronics
o 
2
a
n
 ancos nt   bn sin nt  bn
n 1
1
1
Describing Function
 in 
D X



2
y(t)
OUTPUT
T
y(x)cos  n x  dx

T
2
0
T
y(x)
( )sin
i  n x  ddx

T
0
Fundamental Output Frequency Component
1

INPUT

y (t)  a cos t  b sin t 

Nonlinear
Response Expressible As Fourier Series
y( t ) 


t

x(t)
b 
1 1
a 2  b 2 cos  t      tan  
1
1
a 
 1

2
2   j
a

b
 1
e
1
Phasor of Fundamental Frequency Output

 
Phasor of Input Sinusoid
X
in
In Nonlinear Circuits Describing Function Amplitude Is Not
Independent Of Input Signal Amplitude, Xin
EE 536a Lecture Aid #8
Integrated Circuit Oscillators
439
EXAMPLE 1: Nonlinear Charge

i v
Charge-Voltage Characteristic
Stored Charged
 Prevails In Forward-Biased PN Junction Diodes
= Q(v)
 Small Voltages
 vV

Q(v)  Qo  e T  1 
Charge -Versus- Voltage Is Linear


Capacitance, Css, Is Constant,
Q 
Independent Of Voltage
 v VT

Q(v)  Q  e
 1   o  v
Small Signal Capacitance
o
V 

 T 
Is Independent Of Nature
Q
Q(v)
dQ(v)
Of Voltage (Sinusoidal Or Otherwise)
C 

 o
ss
v small v
dv
V
 Large Signal Voltages
T
2
3
n







1 v
1 v
1 v
 vV

 v
  
   
 
 
Q(v)  Qo  e T  1   Qo 
V 
V 
V  


V
2
6
n!
 T
 T
 T
 T  

2
3
n 1 







dQ( v )
v
1 v
1 v
1
v

 dv
  
  


 Css 1 
 
i 

V 
V 
V 

dt
V
2
6
n
1
!



 dt






T
T
T
T


EE 536a Lecture Aid #8
Integrated Circuit Oscillators
440
EXAMPLE 1: Continued - 1


v  V Cos  t 
Applied
pp ed Sinusoidal
S uso da Voltage
o tage Waveform
a eo
m
Plausible Analytical Approach Is To Truncate Current i -VersusVoltage v At Second Order Term
2

i 
dQ( v )
dt
v
1 v

 Css 1 
 
VT
2  VT


2



V
cos

t
V
cos

t
  1 m   


i  C 1  m
 
V sin t 

ss
m

V
2
V


T
T

 

2



V 
V
V


m
m
 sin t   
 sin  2t    m
   C V  1  

ss m
 2V 
 2V 
 2V


T
T




 T








 dv

 dt


2


 sin  3t  




R t i O
Retain
Only
l Fundamental
F d
t l Frequency
F
Response
R
Component
C
t

V

I    C V 1   m
1
ss m
 2V

 T

EE 536a Lecture Aid #8




2

 sin t 



V

  C V 1   m
ss m
 2V

 T

Integrated Circuit Oscillators




2

 cos t  90 


441
EXAMPLE 1: Continued - 2
2

V  


I   C V 1   m   Cos t  90 
1
ss m
 2V 

 T  

2
2






Vm
Vm
I1

 j90




 
Yc (Vm ) 
j
C
1
  Css 1 


e

ss 
 2V  
 2V  
Vm


 T  
 T  


2

 Effective Capacitance
V  
 Capacitance Dependent On Signal Amplitude Ceff  Css 1   m  
2V

T  

 Validity

Sinusoidal Voltage Input Only
Predicts Only Fundamental (Likely Dominant) Component Of Current
Response
Third And Higher Order
i
|I1|Cos(t + 90 )
Charge Terms Have Been


Neglected

Describing
esc b g Function
u ct o
 In This Case, An Admittance
 Result
o

Result
EE 536a Lecture Aid #8

v
Integrated Circuit Oscillators
VmCos(t)
Ceff

442
EXAMPLE 2: Ideal Comparator
Vout
Vp
Vin
Comparator
Vout
Vin
0
Vp

 E cos t 
Sinusoidal Input Vin
i

Response
V (t) 
o

EE 536a Lecture Aid #8
4V

p


1
sin ( 2n  1 )t
2n  1
4V
p
Describing
D
ibi
Function
F
i
 Voltage Transfer H D (E)   E
 Diminishes With Increasing Input Signal Amplitude
Integrated Circuit Oscillators
443
EXAMPLE 3: Saturating Amplifier
Vout
Vp
Vin
Saturating
Amplifier
Em
Vout
0
Em
Vin
Vp


Sinusoidal Input Vin  ECos  t 
V
Describing
Function
E
H (E) 
D
EE 536a Lecture Aid #8
p
m
,
E E
m

E
p  1  Em 
m
 
 sin 
 Em 
E
 E 

2V
Integrated Circuit Oscillators
2
 Em  
1
,
 E  

 

E E
m
444
Saturating Describing Function Plot
Saturating
Amplifier
Vin
Vout
Note Inherent “Gain” Limiting
For Large Input Signal Amplitudes
Vout
1.2
Em
0
Em
Vp
Vin
Descrribing Functtion, EmHD(E
E)/Vp
Vp
0.8
0.4
0
-5
-4
-2
-1
-0
1
2
3
4
5
-0.4
-0.8
2
2V p  1  Em  Em
 Em  

H D (E)
( ) 
sin 
1

 , E  Em
πEm 
E
 E 
 E  


EE 536a Lecture Aid #7
-3
-1.2
Normalized Signal Amplitude, (E/E m )
Broadband MOS Amplifiers
445
Common Source MOSFET


Input
put Sinusoid
S uso d Vin  E cos t 
id(t) And Bias
 As Vin Increases From Zero, Vc Follows
Vin
Vin By A Factor Approaching One, And
Vc
Transistor Drain Conducts Current
IQ
RQ
C
 C Essentially Charges To E Volts, Ignoring
Threshold Voltage, Vh, Of Transistor
Vss
 As Vin Falls Below E Volts, Vc Sustains
Essentially E Volts, And Transistor Cuts Off, Forcing id(t) = 0
 Capacitor Discharges Via Current Source And Shunt Resistance
 Cycle
y
Repeats
p
When Vin Climbs To Discharged
g Value Of Capacitor
p
Voltage
To Tank Load
Describing Function
 Transistor
a s sto Drain
a Current
Cu e t Is
s Harmonically
a o ca y Rich
c
 High Order Harmonics Attenuated By Presumed Tank Circuit Load
 Describing Function Concept Applies
Determine Forward Transconductance Describingg Function,, GM((E))
Guideline Is That Average Current In Drain Must Be Bias Current, IQ,
Ignoring Resistance RQ Of Indicated Current Sink
EE 536a Lecture Aid #8
Integrated Circuit Oscillators
446
Large Signal Common Source Resposne
12
1.2
Capacitor Voltage
Drain Current
Normalized Voltag
ge, Current
0.8
0.4
0
0.0
4.7
9.4
14.1
18.8
23.6
-0.4
T
T
-0.8
-1.2
ΔT
Input
Voltage
Normalized Time,,  t
EE 536a Lecture Aid #7
Broadband MOS Amplifiers
T = 2π/ω
447
Drain Current Analysis


V
in
 E cos t 
Ip
T
T
T
Ip & T Not Independent
IQ 

Current
Approximations
pp o
at o s
 Small T (Conduction Time)
 Current Pulse Virtually
Constant at Ip Over T Time
Increment
1
T
T

id (x)dx 
0
1
T
T

I p dx 
0
I p T
T
0
T
2T
3T
Time, t
Fourier Series

i (t)  I
d
a
n

EE 536a Lecture Aid #8
2
T
Q

 ancos nt
n 1
T

0
i
I cos nt dt 
p
d1
2I
 2I
Q
 G (E) 
M
2I
Q
E
p
sin nT  2IQ
nT
Integrated Circuit Oscillators
448
Large Signal Model
IQ
RQ
C
id1
Vin
GM(E)Vin
Vc
RQ
id(t)
To Tank Load
A d Bias
And
Bi
gmV
Vc

Vc
Vin =
ECost
To Tank Load
A d Bias
And
Bi

V
Vin
id(t)
To Tank Load
A d Bias
And
Bi
C
RQ
C
Vss
O i i l Circuit
Original
Ci i


L
Large
Signal
Si
l Model
M d l
S ll Signal
Small
Si
l Model
M d l
Large Signal GM (E)Vin  2IQ cos t
 Valid Only For Fundamental Signal Component
 Presumes Only Slight Capacitive Discharge When Transistor Is Not
Conductive
2
K W 
Small
S
ll Signal
Si
l
 Large/Small
V V
G (E)
gs
h
M
Relationship

E
 GM(E) < gm For gm
E > Vgs - Vh
EE 536a Lecture Aid #8
Integrated Circuit Oscillators
Id 
g
m


n
  Vgs  Vh
2 L
I d
Vgs

Q

2IQ
Vgs  Vh
449
Colpitts Oscillator Revisited
Vdd
L
R
Yo
Vo
Vo
C1
VQ
Yo
gmV
L
R
C1
C1
IQ
RQ
C2

V

RQ
C2
1
GM(E)
RQ
C2
Vss
Colpitts Oscillator


Small Signal Model
Large Signal Reduction
Analytical Approach
 Assume Oscillation At Tank Resonance
V   E cos  t
 Voltage V Is A Sinusoid
S
o
 gmV Replaced By GM(E)V =  GM(E) VmCos (ot) = 2IQcos(ot)
Simplify Load Circuit  Reduce Output Port Termination To Simple
Shunt Interconnection Of Elements
EE 536a Lecture Aid #8
Integrated Circuit Oscillators
450
Colpitts Load Circuit
Yo
Yo
Vo
C1

V



gmV
RQ
L
R
C1
1
GM(E)
C2
Admittance,
Yo

Large
Signal
Common
Source
Input
Resistance
RQ


 
Re Yo





'
1   RQ
C1  C2 


2

n2
'
RQ
Q

1  G (E)R
M
Q
1
G (E)
Ro
nC2
n 
C1
M
  
C C
1
2
2


'
'
j C1 1   RQ
C2 C1  C2  j RQ
C1 



 
Im Yo
L
R
'
RQ 



'
1   RQ
C1  C2 


R l And
Real
A d Imaginary
I
i
Parts
P t
2 '
 C1 RQ
2IQCos(ot)
C2
'
j C1 1  j RQ
C2
Yo 
1  j R' C  C
Q 1
2

Vo


  
2
2


'
 C1 1   RQ C2 C1  C2 

   nC
2
2
'


1   RQ C1  C2






USCC Viterbi School of
Engineering
EE 536a Lecture Aid #8
Integrated Circuit Oscillators
451
Colpitts Oscillation Amplitude
Vo
2IQCos(ot)
V
o
L
Ro
nC2
o

At Resonance

Oscillation
O
ill ti
Condition
 Small Signal gm Ro 
G (E)R 

R
 

2
1  n G (E)R

M

2
 V cos  t
m
 R'
Q
R  R 
o
2
n

1
o 
LnC
Vom  2IQ Ro 
2IQ R
1  n 2GM (E)R
1
n 1  n 
1
Note: Product Of Effective
Transconductance And Original
Shunt Output Port Resistance

Large Signal

 C

2
R
Resultant Amplitude Vom  2IQ Ro  2IQ  1  n  R  2IQ 
C  C 
2
 1
EE 536a Lecture Aid #8
M
n 1  n 
Integrated Circuit Oscillators
452
Introduction To Noise In Electronic Systems
R
R
(noisy)
(noiseless)
Practical Resistor
VR

Noise Equivalent Circuit
of Practical Resistor

Origin Of Noise And Observations
 Noise Voltage Caused By Thermally Agitated Motion Of Electrons
 Noise Voltage
2
V

V
Has Zero Average Value R
R
Purely Random And Therefore Not Time Deterministic
Expressed As Mean Square Value
 Noise Voltage Unaffected By “DC” Resistor Current Because
Electron Drift Velocity (Which Produces DC Current) Is Far Smaller
Than Thermal Velocity (Which Produces Noise) Of Electrons

Noise Voltage
EE 536a Lecture Aid #8
 f 
 f 
2
VR  4kTR   Coth    f  4kTR f
 f 
 f 
 z
 z
Integrated Circuit Oscillators
453
Resistance Noise Voltage
R
VR

(noiseless)
 f 
 f 
2
V  4kTR   coth    f  4kTR f
R
 f 
 f 
 z
 z

Parameters
 k
Boltzmann’s Constant; 1.38(10-23) joules/oK
Absolute Temperature Of Resistor; (oK )
 T
 f
Noise Equivalent Bandwidth Of System In Which
Resistor Is Embedded
 fz
Planck’s
Planck
s Frequency (12.5 THz)

Approximation Presumes Signal Frequencies Well Below Optical
Frequencies (f << fz)
 f 
 f 
VR2
4kTR

coth
 
   4kTR
Power Spectral Density
Δf
 fz 
 fz 
 Resistor Spectral Density Is
Approximately Frequency Invariant
 Constant Power Spectral Density Implies White Noise

EE 536a Lecture Aid #8
Integrated Circuit Oscillators
454
Thermal Noise Frequency Response
Norrmalized N
Noise Powe
er
1.4
1.2
12
1
0 .10
0 .16
0 .25
0 .40
0 .6 3
1.0 0
Normalized Signal Frequency, (f/f z )
Noise Power Is Normalized To Low Frequency Noise Value 4kTRf
EE 536a Lecture Aid #7
Broadband MOS Amplifiers
455
Resistor Noise Example
R1
R1
R2
R2

VR1



R1 R2
R1 + R2

VR
VR2



VR
VR




Uncorrelated Noise Sources
 Individual Noise Sources Of Mutually Independent Processes
 Net Mean Square Noise Response Is Superposition Of Effects Of
Individual Mean Square Noise Sources
 Analyses Yield Obvious Results For Series And Shunt Connections
2
 R

2
2
 V2
VR  
 R  R  R1
2
 1
2


 R2 
2
VR  4kT 
R1 


 R1  R2 
Analysis

EE 536a Lecture Aid #8
2
 R

2
1
 V2
 
V

V
R
R
 R  R  R2
2
 1
2

 R

 R R

1

 R  f  4kT  1 2
 R  R  2
R  R

2
2
 1
 1
EE 533ab
Integrated Circuit Oscillators


 f


4
456
Power Spectral Density (PSD)

Noise Voltage Or Noise Current Quantification




Mean Square Value V 2
N
Root Mean Square Value
PSD, SN(f)

V
2
N
VN
 V
SN(f) W

N
For Given PSD
2
 Incremental Mean Square Noise: d VN  S N ( f )df


Total Mean Square Noise In Frequency Band
f
2
From f1 -To- f2:
2
VN   S N ( f )df
) f
Whit Noise
White
N i
f
1
SN(f) = KN
KN Constant
2
V
 K
f  f  K f
For Resistor,
N
N 2
1
N



KN = 4kTR
Pink Noise
f

2 df
2
SN(f) = Ko/f
VN  K o 
 K o ln 
2
Ko In Volts -Hz

f f

1
EE 536a Lecture Aid #8
Integrated Circuit Oscillators
f2 

f 
1
457
Noise Equivalent Bandwidth
SN(f) W
Linear
Li
System
H(jf)
|H(jf)|

VoN

Note Identical
Maximum Transfer
Function Values
|H |
0.707|H |
m
Brick
B
i k Wall
W ll
System
HB(jf)
SN(f) W

VoN

|H (jf)|
B
|H |
m
Noise Equivalent
m
B


f
Bandwidth
f
f
Computation
f

 Replace Transfer 2
2
2
Function By Band- VoN   H( jf ) S N ( f )df   H m S N ( f )df
0
0
Limited
ted Ideal
dea Filter
te
 Note Scaled Area Equivalence Between Original And Simpler
2
Functions

H( jf )
White Noise [SN(f) = Constant]  f  
df
0 H
m
EE 536a Lecture Aid #8
Integrated Circuit Oscillators
458
Noise Bandwidth Example

Butterworth
utte o t Maximally
a
a y Flat
at Magnitude
ag tude System
Syste
2

B
2
m
N
H( jf ) 
2N
N=1
1   f B
Noise Bandwidth

2
 H(( jf ) 2


1
 df
Δf  
df   
2N
Hm

0
0  1   f B 

f
 2N
N=1
f/B = /2 (Almost 60% Bigger!)

B
sin  2N  N = 2
f/B = 1.11 (11% Bigger!)
N3
f/B  1.05 (Diminished Returns)
Comments
H


3-dB Bandwidth
Order Of MFM System
Dominant Pole System
Noise
o se Bandwidth
a d dt Always
ays Bigger
gge Than
a S
Signal
g a Bandwidth
a d dt
Design Only For The Signal Bandwidth Required
Avoid Highpass Networks In Noisy Signal Paths
Multiple Pole
Sharper Cutoff Rate Improves Total Output Noise
But Multiple Poles Are Troublesome In Feedback Loops
EE 536a Lecture Aid #8
Integrated Circuit Oscillators
459
Lowpass RC Network Noise
R
R
Vo

Vs
C

Signal
Circuit


Noise Circuit Derives From
Setting The Signal Source To

VR
H( jf ) 
C

Zero And
Z
A d By
B Replacing
R l i Th
The
Resistance By Its Noise
Equivalent Circuit
Single Pole Circuit
 Zero Frequency Gain: Hm = 1
 3-dB Bandwidth: B = 1/2RC
 Noise Equivalent Bandwidth:
VoN
Noise
Circuit
V ( jf )
o
V ( jf )

s
1
1  j2
j  f RC
1
 
 f   B 
4RC
2
Total Output
p Noise
2
2 2
 H V  ( 1 )4kTR f  kT C
 Net Mean Square Output VoN
m R
Noise Is Independent Of R
 Capacitance
p
Generates No Noise, But Noise Energy Stored Determines Net Noise
For C = 10 pF, VoN  20 V (RMS) @ T = 27 °C
EE 536a Lecture Aid #8
Integrated Circuit Oscillators
460
Noise In Oscillators

Fundamental
u da e ta Co
Concepts
cepts
 Electrical Noise Prevails In Oscillators, Just As it Does In Amplifiers
 Problems
Since Oscillators Are Not Linear Circuits ((There Is No Signal
g
Input
p Port),
),
Noise Figure Cannot Be Computed
Common Approach Is To Calculate The Signal -To- Noise Ratio At The
Output Port Of An Oscillator
 Requires Computation Of Equivalent Noise Bandwidth
Bandwidth, f
 Presumes Existence Of Oscillatory Signal At Output Port

Basic Oscillator
 Spectral Purity Encourages Tank Load Active
 Sinusoidal Oscillation Presumed
Network
vo(t)
R
L
C
v (t)  V cos  t


o
m
o
Active Network Establishes Shunt Output Negative Resistance That
Cancels The Net Output Port Shunting Resistance, R
Signal Power Delivered To Loaded Output Port At The Circuit
Resonant Or “Carrier
Resonant,
Carrier,” Frequency,
Frequency o, Is: P  V 2 2R
r
EE 536a Lecture Aid #8
Integrated Circuit Oscillators
m
461
Output Port Noise Parameters
vo(t)
Active
R
Network
L
C
vo(t)
IN
R
L
C
Z(jf )

Z(jf) 
Load Impedance
f
o
Q
o
 1 2
LC
Noise Equivalent Bandwidth

Input Noise



 jC 
o


1
R
 2πf RC  R 2πf L
o
1
2
IN
 4kTGN Δf

f 

1
j L
Z(jf)
0
R

2
df 
R
 f
fo 
1  jQ   
o f
f 
 o

1
4RC
GN Represents
p
Equivalent
q
Noise Conductance Associated With Total
Output Port Noise Current
Includes Noise In Active Unit And Noise Attributed To Resistance R
GN Is Frequency
q
y Dependent
p
When Account Is Made Of Flicker Noise
Best Case Is Noiseless Active Network, Wherein GN  1/R
EE 536a Lecture Aid #8
Integrated Circuit Oscillators
462
Output Port Noise
Actual Z(jf)
“Brick Wall” Z(jf)
R
R
VoN
4kTGN
VoN
f
4kTGN
fo



Output Noise Voltage
fo
2
2
 4kTGN R Δff 
VoN
N
2
o
S N 
2
V
oN
V
2
m

V C
GN R
Signal -To- Noise Ratio

2kT G R
 Increases With Increased
N
Carrier Power And Load Q
 Decreases With Increased Carrier Frequency
Realistic
Example
EE 536a Lecture Aid #8
T = 27 °C
fo = 1 GHz
Qo = 4
Vm = 250 mV
GNR = 3
L = 25 nH
C = 1/ωo2L = 1.01 pF
R = ωoQoL = 628.3 Ω
Pr = Vm2/2R = 49.7 mW
Integrated Circuit Oscillators


C

kT
kT

C
P Q
r o

2 f kT G R
o
N

S/N = 64.1 dB
463
Phase Noise Fundamentals

Noise
o se Perturbations
e tu bat o s
 Noise In Active Element And In Output Port Resistance Perturbs
Oscillatory Signal
Amplitude And Phase Of Oscillation Is Affected
Amplitude Effects Are Generally Not Serious Because Of Inherent SelfLimiting Of Signal Swings Afforded By The Active Element

Phase Change
v (t)
 Assume Active Element Cancels Resistance R K(t - t )
L
C
 Assume An Impulsive Perturbation At t = to
 Phase Change With Respect To Original
K
Carrier Is oto
vo (t) 
Cos  o  t  to 
C
 Phase Change Is Tantamount To LC Tank Being
Driven By A Sinusoid At A Slightly Offset Frequency, fo + fo
o
o

The Question Answered By Phase Noise Metric, L(f)
How Much Noise Is Produced At Tank Output Port When Tank
Center Frequency Is Offset Slightly By A User-Prescribed Amount,
f?
EE 536a Lecture Aid #8
Integrated Circuit Oscillators
464
Tank Output Noise Relationships
Z(jf )
Tank
a Impedance
peda ce Att O
Offset
set



Z j f  f  
t
o
o 

R
 f  f

f
o
o
o

jQ 

o
f
f  f 
o
o
o

Rf
o
2
VoN
f
R
Network
R
L

C
Zt(jf )
o
vo(t)
()
Output Noise Density

vo(t)
Active
o
jj2Q
Q f
Zt(jf )

 4kTGN Zt  j fo   fo 


2
4kTGN f
2
L
C
 Rf 
o 
 kTGN 
Q f 
 o o
Output Noise Density Normalized To Mean Square Signal

2
VoN  f
V2
o
EE 536a Lecture Aid #8
2kTGN  Rfo 



V 2  Qo  fo 
m
2
 kT
 
P
 r

 G R
 N



 f

o


Q f 
 o o
Integrated Circuit Oscillators
2
465
Phase Noise Computation

Definition
e
to
 One-Half Output Noise -Per- Unit Noise Equivalent Bandwidth,
Normalized To Signal Output Power
L(Δfo ) 



2
VoN
f
2Vo2

kTGN
Vm2
 Rf 
o 

Q f 
 o o
2
 kT
 
 2P
 r

 G R
 N



 f

o


Q f 
 o o
2
The “One
One-Half
Half” Stipulation Derives From The Presumption That Input
Noise Perturbations Nominally Affect Carrier Amplitude And Phase
Equally; That Is, One-Half The Noise Energy Impacts The Phase
Characteristics Of The Sinusoidal Oscillation
Expressed In Decibels; Units Are Decibels Below Carrier (dBc)
Example
EE 536a Lecture Aid #8
T = 27 °C
fo = 1 GHz
Qo = 4
Vm = 250 mV
GNR = 3
L = 25 nH
Dfo = 1 MHz

L(Δf o )  10 Log10  L(Δfo ) (in "dBc")


C = 1/ωo2L = 1.01 pF
R = ωoQoL = 628.3 Ω
Pr = Vm2/2R = 49.7 mW
Integrated Circuit Oscillators
L = -111.1 dBc
@ 1 MHz
466
Leeson Phase Noise Model


2
2
First
st O
Order
de Model
ode
 f

 kT 
VoN
f
o 
 G R 
 
 Does Not Predict Third L(Δfo ) 
N Q f 
2


2P
2Vo
 r
 o o
Order Variation With fo
At Small fo
 Predicts Smaller Than Actual Phase Noise At Any fo
 Does Not Predict Phase Noise Approaching A Constant At Large fo
2
Leeson Model
2





V
f
f
f 
F kT
oN
o
L
 1  c 
 G R 
 
 FL And fc Are L(Δfo ) 
2
 2P  N  Q  f  
 fo 
2V


r
o
o



Empirical
o
 1  FL  2
L(f ) (in dB)
Logf
 fc Correlated With Flicker
Noise Corner Frequency;
The Larger The Flicker
Sl op
Corner, The Larger fc
e=
-2
Becomes
2F kT
P
 Does Not Predict Constant
Phase Noise At Large fo




o
Slop
o
e=
-3
L
r
EE 536a Lecture Aid #8
Integrated Circuit Oscillators
467
Alternative Phase Noise Expression


Load
oad
Z(jf) 
Impedance


vo(t)
Active
R
Network
L
C
Load Impedance At Offset

Z  j f + f 
o
o 


R
 f
f 
1  jQo 
 o
 f
f 
 o


R
 f + f

f
o 
o

1  jQ  o
o
f
f + f 
o
o
o

Angle Of Load Admittance Function

1 j
 y   fo 
Alternative Phase Noise Expression
 2F kT
L(Δf )   L
o
 P
r




G R

N

  tan 2  f
 
y
o
 
R
2Q  f
o
f
Z(jf )
o
o


1  2Qo  f o 
 tan


f
o




2Q
f
f
 1 
o c o 

tan


f 
 
y
o 
 
Relates Phase Noise To Load Admittance Angle
U d
Underscores
Large
L
Change
Ch
In
I Load
L dA
Angle
l (Hi
(High
h Q) F
For A Given
Gi
Offset Frequency Comprises Ideal Operating Circumstance
EE 536a Lecture Aid #8
Integrated Circuit Oscillators
468