Lesson-19: JFET Characteristics

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EDC UNIT IV- Transistor and FET
Characteristics
Lesson-19: JFET Characteristics
LessonQuantitative Discussion
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1. Revision
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Output Characteristics
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Output characteristics of an n-channel JFET with the gate
short-circuited to the source VGS = 0
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Quantitative Discussion
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Output characteristics of an nn-channel JFET
with the gate shortshort-circuited to the source



The initial rise in ID is related to the buildup
of the depletion layer as VDS increases.
The curve approaches the level of the
limiting current IDSS when ID begins to be
pinched off.
The physical meaning of this term leads to
one definition of pinch-off voltage, VP ,
which is the value of VDS at which the
maximum IDSS flows.
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


Increasing VDS increases the widths of
depletion layers, which penetrate more
into channel and hence result in more
channel narrowing toward the drain.
The resistance of the n-channel, RAB
therefore increases with VDS.
The drain current: IDS = VDS/RAB
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JFET Transfer Characteristics
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

There is a convenient relationship between IDS
and VGS.
Beyond pinch-off
I DS



  VGS
 I DSS 1  

  VGS ( off )




2
Where IDSS is drain current when VGS= 0 and
VGS(off) is defined as –VP, that is gate-source
voltage that just pinches off the channel.
The pinch off voltage VP here is a +ve quantity
because it was introduced through VDS(sat).
VGS(off) however is negative, -VP.
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EDC Lesson 19- " , Raj Kamal,
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Transconductance drain current as a
function of Voltage between gategate-source
• Conductance is reciprocal of resistance
• D.C. Transconductance Gm = ID ÷
VGS
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EDC Lesson 19- " , Raj Kamal,
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The transconductance curve





The process for plotting
transconductance curve for a given
JFET:
Plot a point that corresponds to
value of VGS(off).
Plot a point that corresponds to
value of IDSS.
Select 3 or more values of VGS
between 0 V and VGS(off). For value
of VGS, determine the
corresponding value of ID from
equation for ID
Plot the point from (3) and connect
all the plotted point with a smooth
curve.
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JFET Biasing Circuits
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Example: Plot the dc bias line for the voltagevoltage-drivers biasing
circuit
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Summary
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We learnt


The resistance of the n-channel, RAB
increases with VDS.
The drain current: IDS = VDS/RAB
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We learnt
• Transconductance Gm = ID ÷ VGS
• Quantitative Relation
I DS  I DSS
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  V GS
1  
  V GS ( off )
EDC Lesson 19- " , Raj Kamal,




2
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We learnt
• When VGS = 0, ID changes nearly
linearly till pinch-off voltage. After
pinch-off voltage the drain-source
current remains constant at IDSS.
• When VGS is –ve (for n-JFET) at
certain value of VGS, ID does not
increase and is  0, transconductance =
0
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End of Lesson 19
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