Ahmad Shukri Fazil Rahman* et al. / (IJITR) INTERNATIONAL JOURNAL OF INNOVATIVE TECHNOLOGY AND RESEARCH Volume No. 1, Issue No. 3, April - May 2013, 226 – 232. Microcontroller Based SPWM Generator: A Conventional Design Perspective Through Graphical Oriented Approach AHMAD SHUKRI FAZIL RAHMAN1 4 SYAFRUDDIN HASAN MUZAIDI OTHMAN@MARZUKI2 BAHARUDDIN ISMAIL 5 ABDUL RAHIM ABDUL RAZAK3 SYED IDRIS SYED HASSAN6 Pusat Pengajian Kejuruteraan Sistem Elektrik,d/a Kompleks Pusat Pengajian Kejuruteraan Mikroelektronik Universiti Malaysia Perlis (UniMAP),Kampus UniMAP Pauh Putra , 02600 Arau, Perlis, Malaysia. Abstract- In this paper, a comprehensive design strategy was proposed and implemented for the design of a single phase sinusoidal pulse width modulation (SPWM) waveform. Excel software was used to generate the timing sequence, and then fed to a microcontroller unit (PIC16F877A). Through Excel, complex programming effort could be avoided and the whole data arrays can be presented graphically. The effectiveness of the timing sequence was validated by using PROTEUS software. The simulation result shows that the SPWM waveform achieved the desired goals. Keywords-SPWM, PWM, sinusoidal, triangular, modulation, carrier, excel, Proteus, inverter. I. INTRODUCTION Commonly used in inverter system, the SPWM or sinusoidal pulse width modulation is a part of control algorithm which rises’ from the many variety of pulse width modulation (PWM) control technologies. Its application has widened that include motor control, induction heating, welding power source, electronic converters [1, 2], wind power generation [3], flexible transmission system (FACTS) controllers [4] and etc. As the name implies, SPWM is a comparison between a reference modulation (sinusoidal) waveform and a carrier (triangular) waveform which resulted in PWM (gate) signals for switching devices. The width of each respective PWM signal is proportional to the amplitude of a sine wave. Fig. 1 shows a typical SPWM generation theory and its resultant PWM signal. There are several ways of producing SPWM signal, the method mainly consists of modulation or with the introduction of dedicated microcontroller [1, 3, 5-8]; which is producing greater accuracy than analogue circuits [7]. Other known methods emphasized the use of matlab simulink [7-9] and Labview [10] at design stage to performed SPWM process. With the rapid advancement of SPWM technology [11-15], complex circuitry could be integrated in a single chip thus reducing the complexity and increasing its capability [16]. Even though common method of loading complex programming SPWM algorithm to a single chip may compromise the chip performance [6]. Thus, the entire process could be avoided by performing the required task (SPWM comparison signal) through excel, this may reduce the degree of programming complexity and the chip performance can be fully optimize. It is the intentions of this paper to investigate the graphical approach by using excel 2007 to generate the PWM signal. These signals will be compared (sinusoidal and triangular) and then the output from the comparison will be used to generate the PWM signal. Thus, the required signal will be generated without affecting the performance of the microcontroller. Proteus Isis version 7.7 was used to simulate the PWM signal through PIC16F877A microcontroller. II. Fig. 1. SPWM comparison Signals (top) and PWM signal output (bottom) ISSN 2320 –5547 SPWM DESIGN PERSPECTIVE Presently, SPWM can be generated through symmetric regular sampling method and asymmetric regular sampling method [5] as per fig 2 [5] and fig 3 [17]. The excel SPWM generation @ 2013 http://www.ijitr.com All rights Reserved. Page | 226 Ahmad Shukri Fazil Rahman* et al. / (IJITR) INTERNATIONAL JOURNAL OF INNOVATIVE TECHNOLOGY AND RESEARCH Volume No. 1, Issue No. 3, April - May 2013, 226 – 232. principle was based on asymmetric method whereby discrete value of sinusoidal signal was sampled at nth steps (step size) per fc (carrier frequency). At each step, the carrier and modulation signal will be compared and the intersection between the modulation waveform, Vm(t) and the carrier signal, Vc(t) [17] will produced a PWM signal, Tpwm with its period proportional to the amplitude of the modulation waveform. Larger step size or high carrier frequency [17] would produce higher degree of the PWM signal accuracy. Vc(t) Vm(t) B A Tpwm Vdc(t) Fig. 2. Symmetric regular sampling principle Vc(t) t Vm(t) B A Tpwm Vdc(t) t Fig. 3. Asymmetric regular sampling principle III. THE GRAPHICAL APPROACH- EXCEL (2) DESIGN Three data columns were created to represent the modulation, carrier and the PWM waveform plus one column for timer or as a counter. The modulation waveform was created first with 1001 steps or map size by using function as shown in Equation (1), [18]. The frequency of the sinusoidal waveform was set to 50Hz or 20ms with respective step size of 20s. (1) Where MAPSIZE is the total array size, DEGMAX is the maximum angle value at 360, DEGMIN would be the minimum angle value at 0, DEGRES is the resolution for each step size and KMAP is the mapping scaler. The degree’s values were converted to radian through Equation (2): ISSN 2320 –5547 Using built in excel’s sine function (Equation 3); the pre-calculated angle was transformed to sine waveform. Sinusoidal=5.4*SIN(number) (3) Whereby, 5.4 would be the maximum amplitude of the waveform and (number) is the specific value in the respective row array. For the triangular or the carrier signal, the frequency was set to fc = 1kHz or 1ms while the amplitude was set to 5.4V. Since excel did not provided any function to generate triangular waveform; a simple linear equation was improvised (Equation 4) as an alternative [19]. y=mx+c @ 2013 http://www.ijitr.com All rights Reserved. (4) Page | 227 Ahmad Shukri Fazil Rahman* et al. / (IJITR) INTERNATIONAL JOURNAL OF INNOVATIVE TECHNOLOGY AND RESEARCH Volume No. 1, Issue No. 3, April - May 2013, 226 – 232. With m is the line slope and c would be the point of y-axis intersection. The carrier signal was created with 50 step size with carrier frequency, fc at 1kHz and each respective step is at 20Hz or 50ms. These data’s were tabulated inside excel’s data array and the final outcome is a graph contain both the carrier signal and the modulated signal shown in fig 4. Fig. 4. SPWM comparison signals The PWM signal was created by building Equation 5: PWM=IF(((ROWCARRIER)<(ROWSINUSOIDAL)),1,0) (5) Equation 5 compares data, i.e. modulation and carrier and if the condition is true the output will be ‘1’. Fig. 5 shows the PWM results for carrier frequency, fc = 1kHz and modulation frequency, fm = 50Hz. Fig. 5. PWM output The timing sequence for PWM period from fig 5 was obtained by measuring the length of each respective PWM period in number of step sizes multiply by 20s per step. There are 40 data’s calculated from SPWM comparison process which contain both positive and negative cycle. There are 20 data’s of positive and negative cycle ISSN 2320 –5547 respectively, that is equivalent to the carrier-tomodulation frequency ratio, fc/fm = 20, [17]. The PWM period is represented as in fig 6. The graph shows that the timing period is between 960ms and 20ms. The graph also indicates average time occurs at the beginning, middle and end of the modulation signal. @ 2013 http://www.ijitr.com All rights Reserved. Page | 228 Ahmad Shukri Fazil Rahman* et al. / (IJITR) INTERNATIONAL JOURNAL OF INNOVATIVE TECHNOLOGY AND RESEARCH Volume No. 1, Issue No. 3, April - May 2013, 226 – 232. Fig. 6. PWM period graphical representation IV. THE SIMULATION ASPECT The data’s from excel transformation was downloaded to a microcontroller unit through Proteus simulation. The data was created based on section 3, i.e. carrier frequency, fc = 1kHz and modulation frequency, fm = 50Hz. The timing program was written by using delay code under MPLAB environment with HI-TECH C as the compiler. The Proteus experimental set up was based on fig 7, with PORD0 as the PWM output and the clock frequency was set to 20MHz. A virtual digital oscilloscope was connected to PORTD0 to record the PWM output. The simulation was conducted from a DELL laptop with Intel® Core(TM)2 Duo CPU at 2.00GHz and Microsoft Windows XP version 2002 SP2. Fig. 7. Proteus SPWM experimental setup V. EXPERIMENTAL RESULTS Fig. 8 shows the simulation outcome for the proposed method. The result indicate a series of pulse wave signal with fc/fm = 20 at 19.75ms which ISSN 2320 –5547 is 1.25% lower than the calculated total modulation period. The measured amplitude is at 2.77V. The display outcome exhibit close resemblance with the theoretical result. @ 2013 http://www.ijitr.com All rights Reserved. Page | 229 Ahmad Shukri Fazil Rahman* et al. / (IJITR) INTERNATIONAL JOURNAL OF INNOVATIVE TECHNOLOGY AND RESEARCH Volume No. 1, Issue No. 3, April - May 2013, 226 – 232. Fig. 8. Simulation result with fc=1kHz and fm=50Hz Fig. 9 shows the simulation outcome for positive cycle. The result indicate a series of pulse wave signal with fc/fm half from the actual is at 10 and the half cycle is at 9.73ms which is 2.7% lower than the calculated total modulation period. The measured amplitude is at 2.77V. The display waveform also contains similar resemblance with theoretical result. Fig. 9. Half positive cycle simulation result Fig. 10 shows the simulation outcome for negative cycle. The result indicate a series of pulse wave signal with fc/fm half from the actual is at 10 and the half cycle is at 10.05ms which is 0.5% more ISSN 2320 –5547 than the calculated total modulation period. The measured amplitude is at 2.77V. The display waveform also produce similar pattern with theoretical result. @ 2013 http://www.ijitr.com All rights Reserved. Page | 230 Ahmad Shukri Fazil Rahman* et al. / (IJITR) INTERNATIONAL JOURNAL OF INNOVATIVE TECHNOLOGY AND RESEARCH Volume No. 1, Issue No. 3, April - May 2013, 226 – 232. Fig. 10. Half negative cycle simulation result A graphical comparison was conducted between simulation values and calculated values. Graph in fig 11 and 12 show the comparative presentation for positive and negative cycles respectively. Graph in fig 11 shows the percentage error output for positive cycle and it can be seen that significant error occurs at the beginning of the modulation process and high error rate occurs during the beginning of transition period from positive to negative cycle. Fig. 11. Percentage of error for positive cycle Graph in fig 12 shows the percentage error output for negative cycle, it can be seen that significant error occurs at the beginning of the modulation ISSN 2320 –5547 process and maintain a stable errorless value circulating around peak modulation before plunging at the end. @ 2013 http://www.ijitr.com All rights Reserved. Page | 231 Ahmad Shukri Fazil Rahman* et al. / (IJITR) INTERNATIONAL JOURNAL OF INNOVATIVE TECHNOLOGY AND RESEARCH Volume No. 1, Issue No. 3, April - May 2013, 226 – 232. Fig. 12. Percentage of error for negative cycle VI. CONCLUSION [8] The proposed method presented in this paper shows that the graphical method could provide an alternative solution toward SPWM generation. PWM signal generated by excel method was simulated through Proteus environment. Results from calculation and simulation obtained validate the process effectiveness with acceptable error values. VII. REFERENCES [1] [2] [3] [4] [5] [6] [7] L. H. Walker, “10-MW GTO converter for battery peaking service,” Industry Applications, IEEE Transactions on, vol. 26, no. 1, pp. 63-72, 1990. M. H. Ohsato, G. Kimura, and M. Shioya, “Fivestepped PWM inverter used in photovoltaic systems,” Industrial Electronics, IEEE Transactions on, vol. 38, no. 5, pp. 393-397, 1991. Y. Lu, P.-p. Jiao, and B. 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