Advanced Materials Research Vol. 367 (2012) pp 199-204
Online available since 2011/Oct/24 at www.scientific.net
© (2012) Trans Tech Publications, Switzerland
doi:10.4028/www.scientific.net/AMR.367.199
Analysis of a Weaver, Hartley and Saw- Filter Based, Image Reject
Architectures for Radio Receiver Design
F.E. Idachaba1,a and H.E. Orovwode2
Department of Electrical and Information Engineering,
Covenant University Ota
1
idachabafe@yahoo.com
+234-803-957-0321
Keywords: Hartley, Weaver, SAW filter, Image reject, Radio receiver
Abstract: This paper presents an analysis of the three popular image reject architectures used in
radio receiver design. The SAW-filter based image reject architecture is the simplest to implement
and has the lowest power consumption while the weaver is the most complex with the highest
power consumption. The Hartley architecture which utilizes half the number of mixers used in the
weaver architecture does not consume as much as the weaver architecture but is not as efficient due
to the use of the 900 phase shifter. The three architectures are optimized for various design
specifications. The receiver design with power constraints is better realized using the SAW filter
while the receiver with portability as its highest priority is better realized using the weaver
architecture. The architecture implemented for any particular radio design is determined by the
receiver specification with the highest priority.
Introduction
The rapid growth in communication services has led to the increase in research into radio receiver
design with the aim of producing low cost, low power, single chip radios being the driving force.
Wireless receivers can be generally divided into two categories according to their architecture.
These two categories are the homodyne receivers and the heterodyne receivers. Examples of
architecture under these classifications include the direct conversion radio architecture, the
superheterodyne architecture and the low IF architecture. This paper provides the technical
characteristics of the major radio receiver architectures and will aid in the design of radio receivers.
The heterodyne receiver developed by Armstrong during the First World War is the most widely
used architecture due to its high selectivity and excellent sensitivity with lower power consumption
[1]. In this architecture, the incoming RF signal is frequency translated to a lower frequency known
as intermediate frequency (IF). The IF is obtained by mixing the amplified RF signals with the local
oscillator signal. The mixer generates two sets of outputs, the sum and the difference components.
The difference components are selected (using filters) for receiver design. Translating the RF signal
to a much lower IF signal provides a lot of advantages since the Q factor required for the channel
select filter is relaxed. Figure 1 shows the block diagram of the super heterodyne receiver
architecture. The advantage of the superheterodyne receiver which is due to the translation of the
high RF signal to a lower IF signal introduces what is the most significant challenge of the
superheterodyne architecture (The image frequency problem). The image frequency is represented
by the formula in Equation 1 and in Figure 2.
Fimage = FRF + 2FIF
(1)
If
Xin(t) = cos(ωRF t) + cos(ωIM t)
(2)
XLO(t) = cos (ωLOt)
(3)
Xin(t) is the input signal and the XLO(t) is the Local Oscillator signal fed to the mixer.
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The output signal from the mixer by analog multiplication process becomes Equation 4
Figure 1 Block diagram of a superheterodyne receiver
Figure 2 Illustration of the Image frequency problem
Y(t) = Xin(t) . XLO(t)
(4)
The Equation 4 can be resolved mathematically using trigonometric relations to yield Equation 5
Y(t) = 0.5{cos (ωRF – ωLO)t + cos(ω RF + ω LO) t }
(5)
The mixer output consists of both the sum components and difference components as shown in
Equation (4).If the output of the mixer is passed through a low pass filter we have the sum
components eliminated and both the RF signal and the image frequency signals are then mixed with
the LO signal to produce the following down conversion products in Equation 6
y(t) = 0.5{cos (ω RF - ω LO)t + cos (ω IM – ω LO)t}
The image frequency is represented by Equation 7
(6)
ω RF - ω LO = ω IF
(7)
ω IM – ω LO = (ω RF + 2 ωIF) - ωLO
(8)
where
ω IM = ω RF +2 ωIF
But ωIF = ωLO - ωRF
Substitute Equation 10 into Equation 7 yields Equation 11
(9)
(10)
ω IM – ωLO = 2ωLO- ωRF = ωLO – ωRF
(11)
ω IM – ωLO = ωLO – ωRF
(12)
but ωLO – ωRF = ωIF thus
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ω IM – ωLO = ωIF
201
(13)
From Equation 13 the image frequency is down converted to the intermediate frequency
y(t) = 0.5{cos(ωIF)t + cos(ωIF)t}
(14)
Therefore any undesired signal located at the image frequency will be translated to the same IF
along the desired RF signals. The image signal which can be much larger than the desired signals
due to the fact that the wireless standard may not have the control over signals in order bands can
distort the desired signal leading to system failure. Thus it should be eliminated. [2]
More than 80dB of image rejection is required in receivers for proper signal processing. [2][3]
External band select filters are used before the low noise amplifiers and these filters provide up to
30dB – 40dB image rejection. [2]
Image Rejection Strategies
The traditional approach for image rejection is to place an image reject filter before the mixer. The
high Q factor requirement for the image reject filters makes the SAW filters the conventional choice
for this application. The use of the SAW filters imposes restrictions on the receiver design since the
LNA must drive 50ohms impedance of the filter. This leads to difficult design trade-off between
gain, NF, stability and power dissipation in the amplifier. The use of off chip SAW filter also
impedes the development of fully integrated monolithic transceivers. Approaches which enable full
monolithic integration of the radio receivers include the Hartley and the weaver architecture. The
achievable image rejection ratios of these architectures are limited to 30 – 35dB.[3] The three
image-reject architecture listed above will be discussed with a view showing the weakness, strength
and suitability of each architecture for radio receivers (transceiver design).
The Hartley Architecture: The Hartley image reject architecture was developed by R. Hartley.[4]
It originated from the single side band modulation technique. In this architecture, the RF input is
mixed with the quadrature phase of the LO (Sin WLOt and Cos WLOt) in two identical mixers as
shown in Figure 3.
Figure 3 Hartley image reject architecture
The IF from the two mixers has a 90o phase difference with respect to each other. The output is low
pass filtered with one side of the signal being given a 90o phase shift before both signals are added
together to generate the IF output.
The mathematical analysis of the circuit shows that after the low pass filtering, signals at point A
(after mixer at the top) and B (after the mixer below) are given represented by Equations 15 and 16.
VA(t) = -0.5 [Sin(ωo – ω1)t + sin [ωo – ω2]t)
(15)
VB(t) = 0.5 ( cos [(ωo – ω1)t + cos [ωo – ω2]t)
where,
ω0 = LO signal, ω3 = Image, ω1 = RF, ω2 = IF
(16)
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After the 900 phase shift (e.g sin (x) is transformed to –cos(x) the signal at point C becomes
(Equation 17)
VC(t) = 0.5 ( cos [(ωo – ω1)t - cos [ωo – ω2]t)
(17)
The sum of VB(t) and VC(t) is the final output signal which is represented by Equation 18
VOUT(t) = cos(ωo – ω1)t
(18)
The image part cos(ωo – ω1)t and - cos(ωo – ω1)t both cancel out producing the desired IF output
signal
The major limitation of the Hartley architecture is due to the high accuracy requirement of 90o
phase difference and amplitude balance between the two LO signals. It is hard to construct
integrated phase shifters with accuracy better than 1o and amplitude imbalance better than 0.1% and
this leads to additional image filtering or some forms of automatic image filtering [5].
The 90o phase shifter in the upper branch of the Hartley oscillator also produces amplitude error
limiting the achievable image rejection. In theory, the architecture would completely eliminate the
image frequency but in practice only a partial image cancellation is possible due to limitations in the
current IC processing technologies, I/Q mismatches in mixers, low pass filters and 90o phase
shifters [3][13]. To overcome these problems, the use of the +45o phase shifter in one path and -45o
phase shifter in the other path is used to replace the single 90o phase shifter (which is not practical
at high frequencies) [3]. A voltage controlled gain is also used to compensate the gain variation
from the LO phase shifting network. These modifications can yield image rejection values of up to
35dB [3].
Weaver Architecture: The weaver architecture introduced by D.K. Weaver [6] replaces the 90o
phase shift in the IF path with a second quadrature mixing stage. The architecture uses two- steps
down conversion approach. The first mixers down convert the RF signal using the quadrature
phases of the LO and then the IF is low pass filtered. The output of the low pass filter are then
mixed with the quadrature phases of the second LO, signals. The mixers translate the signals to base
band signals and these signals are then added together. The resulting signal contains only the
wanted signal. Since this architecture does not use the phase shifter networks (RC- CR) it can
achieve greater image rejection under process and temperature variations [6].The weaver
architecture requires double copies of mixer compared to the Hartley architecture and as such
consumes twice the power [7][8]. The weaver Image reject topology is shown in Figure 4
Figure 4 Weaver image reject topology
The use of the second set of mixers introduces the problem of secondary image. the weaver
architecture is also sensitive to mismatches in phase and gain of the LO quadrature signals. It
suffers from high noise due to use of four mixers [2] and the second set of mixers may need to be
preceded with low noise linear amplifiers which leads to more power consumption.
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The image problem arises if the second mixer does not translate its RF up to base band i.e IF is not
zero. This secondary image will now require additional filtering, increasing the circuit costs. This
secondary image problem can be eliminated if the second mixer stages translate to base band. This
how ever will introduce similar problems to that faced by the direct conversion receivers which
include DC offset problem and the LO leakage problem.
Different techniques have been explored to improve the performance of the weaver architecture
[9][10] and image rejection of 40dB and 74mW power consumption has also been achieved [11].
SAW Filter Based IR Architecture: This is the traditional approach for image rejection in
superheterodyne receiver. The requirement for filters used in cellular communication include
1. Light weight 2. Small size 3. Low power consumption 4. Low cost 5. Low insertion loss
6. High gain
The surface acoustic wave (SAW) filters are available as commercial off the shelf chips which can
be ordered from manufacturer web stores. These chips are manufactured with typical noise figures
varying from 2dB to 4dB with flat pass band and high Q factors. Examples of those chips are those
manufactured by murata corp., the impedance of the chips can be designed to 50 ohms. This value
is matched easily to the ASIC chips which are designed with 50 Ohms input and output impedance
values. The major setback in this architecture is the inability of monolithic integration of the entire
receiver block due to the difficulty of integrating the SAW chip together with other receiver
components. The second draw back is due to the fact that they can be physically large [1]. The
SAW image reject architecture is shown in Figure 5
Figure 5 SAW image reject topology
Discussion
The three architectures are compared based on the following benchmarks:
1. Complexity 2. Efficiency (image rejection achievable) 3. Cost 4. Power dissipation
2. Form factor ( ease of integration) 5. Drawbacks/limitations
Table 1 Comparison of the Image-Reject Topologies
SAW
WEAVER
HARTLEY
Low
High
medium
(image High
High
Medium
Benchmark
Complexity
Efficiency
rejection)
Cost
Power dissipation
Form factor (space
consumption)
Limitations
High
Low
High
Medium
High
Medium
power
(1)50 ports required (1)high
consumption
(2)non
monolithic
(2)I/Q mismatches in
transceivers
the LO paths
(3)Possibility of DC
offset and LO leakages
problem if IF is non
zero
(4)secondary
image
requiring special filters
Medium
Medium
Medium
(1)I/Q mismatches
(2) Phase mismatch
due to RC-CR 900
phase shifter
(3)Lower
image
reflection ratio
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The results of the comparison are shown Table 1. From the table, the Weaver architecture is the
most complex, it generates better image rejection ratio than the Hartley architecture. It is however
faced with the problems of the DC offset, LO leakage and secondary image which requires
additional filtering to eliminate. This makes it the architecture with the highest power consumption.
The Hartley has lower power consumption than the weaver architecture because it uses half the
number of mixers. The use of the 90o phase shift circuit reduces the efficiency of the architecture
and makes more evident the I/Q mismatches in both local oscillator paths. [12]
The SAW architecture has the lowest power consumption but due to the current technology, it can
not be fully integrated does not permit the development of a fully integrated receiver. Its other
disadvantage is its high cost and requirement of 50 ohms ports
Conclusion
The different architectures have different features which can be optimized for the design of radio
receivers. In systems with extreme power constraints, transceivers based on the super heterodyne
architecture are better realized using the SAW image reject architecture. For systems with high
portability requirement like the mobile phones, the Hartley or the weaver architecture would be
more suitable. For low cost infrastructure, the SAW based architecture is the optimum choice due to
its low complexity and low power consumption. In conclusion, the image rejects architecture used
in design of radio receivers should be determined by a compromise between the different receiver
specifications.
References
[1]
L.E.Larson, Radio Frequency Integrated Circuit Technology for low power wireless
Communication by IEEE personal communication (June 1998)
[2]
H.Lee, Monolithic image rejection Methods suitable for GSM receivers. A PhD qualifying
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Tech (April 2001)
[3]
N. Yan. On chip image reject techniques for wireless receivers. University of Toronto
department of electrical and computer Engineering. (Nov 2001)
[4]
R Hartley, Modulation System US patent 1666206 Apr (1928)
[5]
D. Pache et al, An improved 3V 2Ghz BiCMOS image reject Mixer IC , IEEE custom
Integrated circuits conference, 1995, 95-98.
[6]
D.K. Weaver, A third method of generation and detection of single side band signals.
Proceedings of IRE vol 44 No 12, 1956, 1703-1705.
[7]
B. Razavi, Architecture and circuits for RF CMOS receivers. IEEE customs integrated
circuits conference (1998)
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Xin He,Fully integrated transceiver design in SOI process, PhD thesis, Department of
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[9]
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conference 1997, 521 – 524.
[11] S. Wu and B. Razavi, A 900MHz/1.8GHz CMOS receiver for dual band application IEEE
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[12] On the direct conversion receiver. Application note 101735A.Skyworks solutions
(July 20th 2001)
[13] Tsung-Yuan Chang and Steven B.Bibyk, Analysis of the improved Hartley image reject
receiver by bandpass delta sigma modulator. Analogue Integrated circuits and signal
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Advances in Materials and Systems Technologies III
10.4028/www.scientific.net/AMR.367
Analysis of a Weaver, Hartley and Saw-Filter Based, Image Reject Architectures for
Radio Receiver Design
10.4028/www.scientific.net/AMR.367.199
DOI References
[1] L.E. Larson, Radio Frequency Integrated Circuit Technology for low power wireless
Communication by IEEE personal communication (June 1998).
doi:10.1109/98.683726
[5] D. Pache et al, An improved 3V 2Ghz BiCMOS image reject Mixer IC , IEEE custom
Integrated circuits conference, 1995, 95-98.
doi:10.1109/CICC.1995.518144
[6] D.K. Weaver, A third method of generation and detection of single side band signals.
Proceedings of IRE vol 44 No 12, 1956, 1703-1705.
doi:10.1109/JRPROC.1956.275061
[7] B. Razavi, Architecture and circuits for RF CMOS receivers. IEEE customs integrated
circuits conference (1998).
doi:10.1109/CICC.1998.695005
[9] T. Okanobu, D. Yamazaki and C. Nishi, A new radio receiver system for personal
communication. IEEE Transactions on Consumer Electronics vol 41, No 3, 1995, 795-803.
doi:10.1109/30.468082
[10] M Banu et al, A BiCMOS double Low- IF receiver GSM . IEEE customs integrated
circuits conference 1997, 521 – 524.
doi:10.1109/CICC.1997.606680
[11] S. Wu and B. Razavi, A 900MHz/1. 8GHz CMOS receiver for dual band application
IEEE journal of solid state circuits vol 33 no 12, 1998, 2178 -2185.
doi:10.1109/ISSCC.1998.672400
[13] Tsung-Yuan Chang and Steven B. Bibyk, Analysis of the improved Hartley image
reject receiver by bandpass delta sigma modulator. Analogue Integrated circuits and signal
processing. Kluwer Academic publishers (1999).
doi:10.1109/MWSCAS.1998.759434