LTC1157
3.3V Dual Micropower
High-Side/Low-Side MOSFET Driver
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DESCRIPTIO
FEATURES
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■
■
■
■
■
■
■
■
Allows Lowest Drop 3.3V Supply Switching
Operates on 3.3V or 5V Nominal Supplies
3 Microamps Standby Current
80 Microamps ON Current
Drives Low Cost N-Channel Power MOSFETs
No External Charge Pump Components
Controlled Switching ON and OFF Times
Compatible with 3.3V and 5V Logic Families
Available in 8-Pin SOIC
The LTC1157 dual 3.3V micropower MOSFET gate driver
makes it possible to switch either supply or ground
reference loads through a low RDS(ON) N-channel switch
(N-channel switches are required at 3.3V because Pchannel MOSFETs do not have guaranteed RDS(ON) with
VGS ≤ 3.3V). The LTC1157 internal charge pump boosts
the gate drive voltage 5.4V above the positive rail (8.7V
above ground), fully enhancing a logic level N-channel
switch for 3.3V high-side applications and a standard Nchannel switch for 3.3V low-side applications. The gate
drive voltage at 5V is typically 8.8V above supply (13.8V
above ground), so standard N-channel MOSFET switches
can be used for both high-side and low-side applications.
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APPLICATI
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Notebook Computer Power Management
Palmtop Computer Power Management
P-Channel Switch Replacement
Battery Charging and Management
Mixed 5V and 3.3V Supply Switching
Stepper Motor and DC Motor Control
Cellular Telephones and Beepers
Micropower operation, with 3µA standby current and
80µA operating current, makes the LTC1157 well suited
for battery-powered applications.
The LTC1157 is available in both 8-pin DIP and SOIC.
UO
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S
TYPICAL APPLICATI
Ultra Low Voltage Drop 3.3V Dual High-Side Switch
Gate Voltage Above Supply
3.3V
+
10µF
VS
3.3V
LOGIC
IN1
G1
LTC1157
IN2
G2
(8.7V)
(8.7V)
IRLR024
IRLR024
3.3V
LOAD
GND
LTC1157 • TA01
3.3V
LOAD
GATE VOLTAGE – SUPPLY VOLTAGE (V)
12
10
8
6
4
2
0
2.0 2.5
3.0 3.5 4.0 4.5 5.0 5.5
SUPPLY VOLTAGE (V)
6.0
LTC1157 • TA02
1
LTC1157
W W
W
AXI U
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ABSOLUTE
RATI GS
Supply Voltage ........................................... – 0.3V to 7V
Any Input Voltage ............. (VS + 0.3V) to (GND – 0.3V)
Any Output Voltage ............. (VS + 12V) to (GND – 0.3V)
Current (Any Pin)................................................. 50mA
Operating Temperature Range
LTC1157C............................................... 0°C to 70°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
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W
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PACKAGE/ORDER I FOR ATIO
TOP VIEW
NC 1
GATE 1 2
8 NC
7 GATE 2
GND 3
6 VS
IN1 4
5 IN2
ORDER PART
NUMBER
LTC1157CN8
NC 1
8
NC
GATE 1 2
7
GATE 2
GND 3
6
VS
IN1 4
5
IN2
S8 PACKAGE
8-LEAD PLASTIC SO
TJMAX = 100°C, θJA = 130°C/ W
TJMAX = 100°C, θJA = 150°C/ W
PARAMETER
CONDITIONS
IQ
Quiescent Current OFF
Quiescent Current ON
VS = 3.3V, VIN1 = VIN2 = 0V (Note 1)
VS = 3.3V, VIN = 3.3V (Note 2)
VS = 5V, VIN = 5V (Note 2)
VINH
VINL
IIN
CIN
VGATE – VS
Input High Voltage
Input Low Voltage
Input Current
Input Capacitance
Gate Voltage Above Supply
tON
Turn-ON Time
Turn-OFF Time
MIN
●
LTC1157C
TYP
MAX
UNITS
3
80
180
10
160
400
4.0
4.5
7.5
5
4.7
5.4
8.8
6.5
7.0
12.0
µA
µA
µA
V
V
µA
pF
V
V
V
30
75
130
240
300
750
µs
µs
30
75
85
230
300
750
µs
µs
10
36
60
µs
10
31
60
µs
70% × VS
15% × VS
±1
●
0V ≤ VIN ≤ VS
●
VS = 3V
VS = 3.3V
VS = 5V
VS = 3.3V, CGATE = 1000pF
Time for VGATE > VS + 1V
Time for VGATE > VS + 2V
VS = 5V, CGATE = 1000pF
Time for VGATE > VS + 1V
Time for VGATE > VS + 2V
VS = 3.3V, CGATE = 1000pF
Time for VGATE < 0.5V
VS = 5V, CGATE = 1000pF
Time for VGATE < 0.5V
●
●
●
The ● denotes specifications which apply over the full operating
temperature range.
Note 1: Quiescent current OFF is for both channels in OFF condition.
Note 2: Quiescent current ON is per driver and is measured independently.
2
1157
VS = 2.7V to 5.5V, TA = 25°C, unless otherwise noted.
SYMBOL
tOFF
LTC1157CS8
S8 PART MARKING
N8 PACKAGE
8-LEAD PLASTIC DIP
ELECTRICAL CHARACTERISTICS
ORDER PART
NUMBER
TOP VIEW
LTC1157
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TYPICAL PERFOR A CE CHARACTERISTICS
Standby Supply Current
Supply Current per Driver ON
12
ONE INPUT = ON
OTHER INPUT = OFF
TA = 25°C
500
SUPPLY CURRENT (µA)
8
6
4
2
400
300
200
100
0
2.0
2.5
3.0 3.5 4.0 4.5 5.0
SUPPLY VOLTAGE (V)
5.5
0
6.0
2.0 2.5
3.0 3.5 4.0 4.5 5.0 5.5
SUPPLY VOLTAGE (V)
LTC1157 • TPC01
Input Threshold Voltage
2
2.0
1.0
0.5
600
400
VGS = 2V
VGS = 5V
300
2.0
2.5
40
30
20
10
VGS = 1V
0
6.0
3.0 3.5 4.0 4.5 5.0
SUPPLY VOLTAGE (V)
LTC1157 • TPC04
5.5
0
6.0
2.0
10
250
SUPPLY CURRENT (µA)
300
6
VS = 5V
VS = 3.3V
2
3.0 3.5 4.0 4.5 5.0
SUPPLY VOLTAGE (V)
5.5
6.0
LTC1157 • TPC06
Supply Current per Driver ON
Standby Supply Current
8
2.5
LTC1157 • TPC05
12
6.0
CGATE = 1000pF
TIME FOR VGATE < 0.5V
50
200
3.0 3.5 4.0 4.5 5.0 5.5
SUPPLY VOLTAGE (V)
5.5
Turn-OFF Time
800
1.5
3.0 3.5 4.0 4.5 5.0
SUPPLY VOLTAGE (V)
60
TURN-OFF TIME (µs)
2.5
2.0
2.5
LTC1157 • TPC03
CGATE = 1000pF
TURN-ON TIME (µs)
INPUT THRESHOLD VOLTAGE (V)
4
Turn-ON Time
TA = 25°C
4
6
0
1000
2.0 2.5
8
LTC1157 • TPC02
3.0
0
10
6.0
Gate Drive Current
1000
TA = 25°C
GATE DRIVE CURRENT (µA)
SUPPLY CURRENT (µA)
12
GATE VOLTAGE – SUPPLY VOLTAGE (V)
VIN1 = VIN2 = 0V
TA = 25°C
10
SUPPLY CURRENT (µA)
Gate Voltage Above Supply
600
200
VS = 5V
150
100
VS = 3.3V
100
VS = 5V
10
VS = 3.3V
1
50
0
0
10
40
30
50
20
TEMPERATURE (˚C)
60
70
LTC1157 • TPC07
0.1
0
0
10
40
30
50
20
TEMPERATURE (˚C)
60
70
LTC1157 • TPC08
0
2
4
6
8
GATE VOLTAGE ABOVE SUPPLY (V)
10
LTC1157 • TPC09
3
LTC1157
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PI FU CTIO S
Input Pins: The LTC1157 input pins are active high and
activate the charge pump circuitry when switched ON. The
LTC1157 logic inputs are high impedance CMOS gates
with ESD protection diodes to ground and supply and
therefore should not be forced beyond the power supply
rails.
Gate Drive Pins: The gate drive pin is either driven to
ground when the switch is turned OFF or driven above the
supply rail when the switch is turned ON. This pin is a
OPERATIO
relatively high impedance when driven above the rail (the
equivalent of a few hundred kΩ). Care should be taken to
minimize any loading of this pin by parasitic resistance to
ground or supply.
Supply Pin: The supply pin of the LTC1157 should never
be forced below ground as this may result in permanent
damage to the device. A 300Ω resistor should be inserted
in series with the ground pin if negative supply voltage
transients are anticipated.
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The LTC1157 is a dual micropower MOSFET driver designed specifically for operation at 3.3V and 5V and
includes the following functional blocks:
3.3V Logic Compatible Inputs
The LTC1157 inputs have been designed to accommodate
a wide range of 3.3V and 5V logic families. Approximately
50mV of hysteresis is provided to ensure clean switching.
An ultra low standby current voltage regulator provides
continuous bias for the logic-to-CMOS converter. The
logic-to-CMOS converter output enables the rest of the
circuitry. In this way the power consumption is kept to an
absolute minimum in the standby mode.
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BLOCK DIAGRA
Gate Charge Pump
Gate drive for the power MOSFET is produced by an
internal charge pump circuit which generates a gate voltage substantially higher than the power supply voltage.
The charge pump capacitors are included on-chip and
therefore no external components are required to generate
the gate drive.
Controlled Gate Rise and Fall Times
When the input is switched ON and OFF, the gate is
charged by the internal charge pump and discharged in a
controlled manner. The charge and discharge rates have
been set to minimize RFI and EMI emissions.
(One Channel)
VS
INPUT
LOW STANDBY
CURRENT
REGULATOR
HIGH
FREQUENCY
OSCILLATOR
CHARGE
PUMP
LOGIC-TO-CMOS
CONVERTER
VOLTAGE
REGULATOR
GATE
DISCHARGE
LOGIC
LTC1157 • BD
GND
4
GATE
LTC1157
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APPLICATIO S I FOR ATIO
MOSFET Selection
The LTC1157 is designed to operate with both standard
and logic level N-channel MOSFET switches. The choice of
switch is determined primarily by the operating supply
voltage.
Obviously, this is too much current for the regulator (or
output capacitor) to supply and the output will glitch by as
much as a few volts.
The start-up current can be substantially reduced by
limiting the slew rate at the gate of an N-channel switch as
shown in Figure 1. The gate drive output of the LTC1157
Logic Level MOSFET Switches at 3.3V
Logic level switches should be used with the LTC1157
when powered from 2.7V to 4V. Although there is some
variation among manufacturers, logic level MOSFET
switches are typically rated with VGS = 4V with a maximum
continuous VGS rating of ±10V. RDS(ON) and maximum
VDS ratings are similar to standard MOSFETs and there is
generally little price differential. Logic level MOSFETs are
frequently designated by an “L” and are usually available
in surface mount packaging. Some logic level MOSFETs
are rated up to ±15V and can be used in applications which
require operation over the entire 2.7V to 5.5V range.
Standard MOSFET Switches at 5V
Standard N-channel MOSFET switches should be used
with the LTC1157 when powered from 4V to 5.5V supply
as the built-in charge pump produces ample gate drive to
fully enhance these switches when powered from a 5V
nominal supply. Standard N-channel MOSFET switches
are rated with VGS = 10V and are generally restricted to a
maximum of ±20V.
Powering Large Capacitive Loads
Electrical subsystems in portable battery-powered equipment are typically bypassed with large filter capacitors to
reduce supply transients and supply induced glitching. If
not properly powered however, these capacitors may
themselves become the source of supply glitching.
For example, if a 100µF capacitor is powered through a
switch with a slew rate of 0.1V/µs, the current during startup is:
ISTART = C(dV/dt)
= (100 × 10 – 6) (1 × 10 5)
= 10A
VIN
3.3V
LT1129-3.3
+
3.3µF
R1
100k
VS
ON/0FF
IN1
R2
1k
MTD3055EL
G1
1/2 LTC1157
GND
C1
0.1µF
+
CLOAD
100µF
3.3V
LOAD
LTC1157 • TA02
Figure 1. Powering a Large Capacitive Load
is passed through a simple RC network, R1 and C1, which
substantially slows the slew rate of the MOSFET gate to
approximately 1.5 × 10 – 4 V/µs. Since the MOSFET is
operating as a source follower, the slew rate at the source
is essentially the same as that at the gate, reducing the
start-up current to approximately 15mA which is easily
managed by the system regulator. R2 is required to
eliminate the possibility of parasitic MOSFET oscillations
during switch transitions. Also, it is good practice to
isolate the gates of paralleled MOSFETs with 1k resistors
to decrease the possibility of interaction between switches.
Reverse Battery Protection
The LTC1157 can be protected against reverse battery
conditions by connecting a 300Ω resistor in series with
the ground pin. The resistor limits the supply current to
less than 12mA with – 3.6V applied. Since the LTC1157
draws very little current while in normal operation, the
drop across the ground resistor is minimal. The 3.3V µP
(or control logic) can be protected by adding 10k resistors
in series with the input pins.
5
LTC1157
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TYPICAL APPLICATIO S
Ultra Low Drop 3 to 4 Cell Dual High-Side Switch
+
3 TO 4
CELL
BATTERY
PACK
0.47µF
Si9956DY
7,8
5,6
VS
IN1
CONTROL
LOGIC
OR µP
G1
2
LTC1157
IN2
1
G2
4
3
GND
LOAD
LOAD
LTC1157 • TA03
Mixed 5V and 3.3V Dual High-Side Switch
5V
+
3.3V
10µF
6.3V
RFD16N05SM
VS
IN1
CONTROL
LOGIC
OR µP
+
MTD10N05E
10µF
4V
51k
G1
LTC1157
IN2
51k
G2
GND
5V
LOAD
3.3V
LOAD
LTC1157 • TA04
Mixed 3.3V and 12V High- and Low-Side Switching
3.3V
+
12V
10µF
4V
+
IRLR024
12V
LOAD
VS
CONTROL
LOGIC
OR µP
IN1
G1
LTC1157
IN2
30k
G2
GND
10µF
16V
MTD3055EL
3.3V
LOAD
LTC1157 • TA05
6
LTC1157
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TYPICAL APPLICATIO S
Ultra Low Voltage Drop Battery Switch with Reverse Battery
Protection, Ramped Output and 3µA Standby Current
5,6,7,8
1
3
+
3 TO 4
CELL
BATTERY
PACK
SWITCHED (RAMPED)
BATTERY
Si9956DY
0.47µF
2
4
+
VS
IN1
CONTROL
LOGIC
OR µP
100µF
6.3V
G1
LTC1157
IN2
100k
1k
G2
GND
0.1µF
300Ω
LTC1157 • TA06
Generating 3.3V and 5V from a 3.3V or 5V Source
(Automatic Switching)
3.3V OR 5V
1M
1M
1
7,8
2
3
5,6
Si9956DY
4
VS
IN1
G1
7,8
1
G2
2
5,6
3
LTC1157
IN2
GND
2N7002
4
*20µH
1
1M
+
6
180µF
6V
ILIM
2
AO
SW2
430k
SET
FB
GND
5
Si9956DY
120µF/10V MBRS12OT3
2N7002
*20µH
4 39Ω
ZTX869-M1
LT1111
7
3.3V/150mA
+
3
VIN SW1
5V/150mA
8
47Ω
105k
1%
174k
1%
140k
1%
+
100µF
6V
LTC1157 • TA07
*CTX20-3 COILTRONICS
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
7
LTC1157
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TYPICAL APPLICATIO S
3.3V Ultra Low Voltage Drop Regulator with Optional Reverse
Battery Protection and 3µA Standby Current
Q1
IRLR024*
+
+
3 TO 4
CELL
BATTERY
PACK
Q2
IRLR024
C1
10µF
VS
IN1
CONTROL
LOGIC
OR µP
G1
IN2
1
R5
100k
LTC1157
G2
LT1431
GND
5
R1
300Ω*
3.3V/1A
3
C2
330pF
R3
3.3k
8
+
6
R2
680Ω
C3
220µF
R4
10k
LTC1157 • TA08
*OPTIONAL REVERSE BATTERY PROTECTION. ADD R1 IN SERIES WITH THE
GROUND LEAD AND ADD Q1 IN SERIES WITH THE BATTERY AS SHOWN.
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PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
N Package
8-Lead Plastic DIP
0.300 – 0.320
(7.620 – 8.128)
0.045 – 0.065
(1.143 – 1.651)
+0.025
0.325 –0.015
8.255
+0.635
–0.381
0.130 ± 0.005
(3.302 ± 0.127)
8
7
0.125
(3.175)
MIN
0.100 ± 0.010
(2.540 ± 0.254)
0.020
(0.508)
MIN
1
2
0.010 – 0.020
× 45°
(0.254 – 0.508)
4
3
0.018 ± 0.003
(0.457 ± 0.076)
N8 0392
S Package
8-Lead SOIC
0.189 – 0.197
(4.801 – 5.004)
8
0.053 – 0.069
(1.346 – 1.752)
7
6
5
0.004 – 0.010
(0.101 – 0.254)
0.008 – 0.010
(0.203 – 0.254)
0°– 8° TYP
5
0.250 ± 0.010
(6.350 ± 0.254)
0.045 ± 0.015
(1.143 ± 0.381)
)
0.016 – 0.050
0.406 – 1.270
6
0.065
(1.651)
TYP
0.009 – 0.015
(0.229 – 0.381)
(
0.400
(10.160)
MAX
0.014 – 0.019
(0.355 – 0.483)
0.050
(1.270)
BSC
0.228 – 0.244
(5.791 – 6.197)
0.150 – 0.157
(3.810 – 3.988)
SO8 0392
1
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Linear Technology Corporation
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LT/GP 0193 10K REV 0
1630 McCarthy Blvd., Milpitas, CA 95035-7487
(408) 432-1900 ● FAX: (408) 434-0507 ● TELEX: 499-3977
 LINEAR TECHNOLOGY CORPORATION 1993