Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
Republic of Iraq
Ministry of Higher Education and Scientific Research
Madenat al-elem University College
Computer Techniques Engineering Department
Second Class
Year 2012-2013
ELECTRONICS
Slips
1- Interstice semiconductor
3.1 Extrinsic Semiconductor (P-type and N-type)
2- P-N Junction (Diode)
4.1 Diode Equivalent cct.
4.2 Diode DC analysis
3- Diode a.c Applications
5.1 Rectifier
5.2 Clipper
5.3 Clamper
4- Zener Diode
5- Transistor
5-1 transistor D.C analysis
5.2 transistor ac analysis
6- Operational amplifiers
6-1 op-amp cct. analysis
6-2 op-amp linear applications
6-3 op-amp non-linear applications
BY
Dr. Hussam A. A. Al-obiady
-1-
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
2- Material Types
There are three type of material :
i. Insulator is very poor conducting material the energy gap between
valance band and conduction band very high.
ii. Conductor is excellent conducting material the energy gap between
valance band and conduction band very small.
iii. Semiconductor is subtended material between conductor and
Insolate material, the energy gap between valance band and
conduction band small, for that the semiconductor is transfer case
between conducted and insolated material.
Energy Band, its know as group of orbital have the same performance.
There are two type of Bands, Valance Band (V.B) and Conduction
Band (C.B). The electron in C.B call free electrons, this electrons cause
conducing in material. As shown Fig.().
Energy Gap (E.G), it’s the region separates between valence band and
conduction band. The energy gap is
Eg =EC- EV
…. (2.1)
Free electrons
EC
Eg
EC
EC
Eg
Eg
EV
EV
EV
Carbon (Diamond)
Insulator Eg very big
Copper conductor
Eg = 0
Silicon(Crystal)
semiconductor Eg small
Fig. (7) material Type and Energy levels.
-2-
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
2.1 Interstice Semiconductor
The covalent bonding process in Silicon (Si) is illustrated in Fig.(8)
Si
Si
Si
Covalent
band
Si
Si
Si
All Four electron is
Valance electron
Si
Si
Si
Fig. (8) Silicon Structure
Structures from by atoms bounded together covalently are called
Crystal
Structures.
This
semiconductor
crystal
call
Interstice
semiconductor. All the valence electron are tightly bound to the parent
atom and to other atoms by Covalent bounds.
C.B
Eg
Valance
electron
V.B
Fig. (9) Energy band diagram of Int. Si
1.6.1 Affect of Temperature
After hear energy has been applied a covalent bound broken the one
of the valance electrons as a result of heat energy. The liberation of this
valence electron left a vacancy in the covalent structure. This vacancy is
call a hole, the number of free electron (n) is equal to total number of hole
-3-
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
(p). the (ni) the total carrier density in interstice semiconductor calculated
by
…. (2.2)
n2i  n  p
- Electron-hole pairs : the hole is created by an electron breaking a
covalent bond a valence electron from a neighboring atoms can easily fill
hole by free electron, for that electrons and holes moving in different side
as shown in Fig.(10).
Si
Si
Si
Free
electron
Si
Si
Si
hole
Si
Si
Si
a- Silicon Structure
C.B
Free electron
Fermi level
Eg
holes
Valance electron
V.B
b- Energy band diagram of Int. Si
Ie
+
Ih
c- pair of Interstice Semiconductor.
Fig. (10) Effect of Temperature.
-4-
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
2.2
Seocnd Class
2012-2013
Extrinsic Semiconductor
The interstice semiconductor has been doped by extremely small amounts
of Three or Five electron material, this semiconductor call extrinsic.
There are two type of doping
i- Pentavalent atoms have Five valance electron.
ii- Trivalent atoms have Three valance electron.
2.2.1 N-type Semiconductor
If the doping by Five velance electron materal, the number of electron
increasing, that increase total number of carrier, the electrons call majority
carrier (nn). The hole result from electron-hole pair, it is minority carrier
(Pn) Fig.(10-a). when doner impurities (electrons) has been add to a
semiconductor allowable energy level below the conduction bound (E D
Doner Energy level), this case reduce the energy gap as shown in Fig.(10b).
The main current generated from majority carrier (electron), when the hole
generate minority carrier as shown in Fig. (10-c).
2.2.3 P-type Semiconductor
If the doping by Three valance electron material, the number of hole
increasing, that increase total number of carrier. The holes call majority
carrier (pp). The electrons result from electron-hole pair, it is minority
carrier (np) Fig.(11-a). when Accepter impurities (holes) has been add to a
semiconductor allowable energy level below the conduction bound (E A
Accepter Energy level), this case reduce the energy gap as shown in
Fig.(11-b). The main current generated from majority carrier (holes), when
the electrons generate minority carrier as shown in Fig. (11-c).
-5-
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
Si
Si
Si
Free
electron
Si
In
Si
Si
Si
Si
a- N-type Semi.
C.B
Free electron
Doner level
ED
Eg
Valance electron
V.B
b- Energy band diagram of N-type
Ie
+
Ih
c- Pair of N-type Semiconductor (majority carrier electron).
Fig. (11) N- type Semiconductor.
-6-
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
Si
Si
Si
Free hole
Si
Al
Si
Si
Si
Si
a- P-type Semi.
C.B
Free electron
Accepter level
Eg
EA
Valance electron
V.B
b- Energy band diagram of P-type
Ie
+
Ih
c- Pair of P-type semiconductor (majority carrier hole).
Fig. (12) P-type Semiconductor.
1.8.3 Charge Density in semiconductor
- Interstice Semiconductor
The number of electron is equal to the number of hole
n=p
and
…. (2.4)
ni = n p
- N- type Extrinsic Semiconductor
-7-
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
Let ND the concentration of doner atoms,
The total number of electron (majority carrier)
ND + n
nn  N D  n
…. (2.5)
N D  n
nn  N D
the number of holes pn (minority carrier) calculated by
pn 
ni2
ND
…. (2.6)
- P- type Extrinsic Semiconductor
Let NA the concentration of Accepter atoms,
The total number of holes (majority carrier)
NA + p
Pp  N A  p
…. (2.7)
N A  p
Pp  N A
the number of holes np (minority carrier)calculated by
ni2
np 
NA
…. (2.8)
2.3.3 Conductivity in Semiconductor
-Interstice Semiconductor
The current in semiconductor is
…. (2.9)
I  Ie  Ih
where
Ie: current of electron (A).
Ih: current of hole (A).
The current density (J) is
-8-
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
J
Seocnd Class
2012-2013
I
A
…. (2.10)
where
A: area cross section (m2).
By using ohm low the current density is


J   E  e n e  e p  h E
…. (2.11)
where
 : conductivity of material ((  .m) ).
-1
E: electrical filed intensity (V/m).
The total current density is
 e : Mobility of electrons (m /v.sec).
2
 h : Mobility of holes (m /v.sec).
2
from the Eq. (2.11) the conductivity calculated from
  e n e  e p h 
…. (2.12)
- N- type Extrinsic Semiconductor

 N  e nn e  e pn h

…. (2.13)
because
nn>> pn then conductivity of hole will be neglected
then the conductivity of N – type be
 N  e N D e
…. (2.14)
- P- type Extrinsic Semiconductor

 p  e n p e  e p p  h

…. (2.15)
because
-9-
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
pp>> np then conductivity of hole will be neglected
then the conductivity of P – type be
 p  e N A h
…. (2.16)
2.3.4 Semiconductor Resistance
l
The resistively of material is defined as
Pair of Si

1
A
I
…. (2.17)

V
Fig.(13) Pair of Si
The applied voltage V across the pair of semiconductor is equal to
…. (2.18)
V  E.l
where
E: The electrical filed intensity (v/m)
l : Pair material length (m).
The ohm’s low defined the resistance of material (R) by
J  E
…. (2.19)
From Eqs. (2.10), (2.18), and (2.19) the resistance by
I
1
 V l
A 
V
l
 R
I
A
…..
(2.20)
()
By using Eq. (2.20) the resistance of semiconductor interstice, N-type, and
P-type, respectively, defined as
R
l
 A
()
RN 
l
N A
()
- 10 -
RP 
l
P A
()
…. (2.21)
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
Example : A specimen of pure Germanium at 300K has density of charge
carrier of 2.5*1014 m-3. Its doped with donor impurity atoms at the rate of
one impurity atom for every 106 atoms of Germanium. All impurity atoms
may be supposed to be ionized. The density of Germanium atoms 4.2*1028
atoms/m-3 if mobility of electron and hole is 0.36 m2/(v.sec) and 0.18
m2/(v.sec), respectively. Find 1- minority and majority carrier
2- Conductivity and resistively
Sol.
T=300K
ni = 2.5*1014 m-3
ND =4.2*1028 /106 = 4.2*1022 m-3
(majority)
pn= ni2/ND =(2.5*1014)2/4.2*1022 =1.4*106 m-3
(minority)
N-type

 
 N  e nn e  e pn  h  e N D e  pn  h

 N  1.602 1019 (4.2 10 22 * 0.36  1.4 106 * 0.18)
 N  2.42 103
n 
1
N

(.m) 1
1
 0.4110 3
3
2.42 10
.m
Q3/ Cylindrical tube of germanium of length 1mm and radius 0.05 mm
have carrier density 4.5*10-3 cm-3. It's doped with acceptor impurity atoms
at rate of one atom to every 106 atoms of germanium. The total number of
atoms per unit volumes 5.31*1032 atoms.m-3.
- 11 -
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
3. P-N Junction (Diode)
The semiconductor diode is formed by simple bringing of N-type
and P-type semiconductor, this materials together generate diode as shown
in Fig.(14). At the instant the two material are joined the electrons and
holes. The region of the junction will combine resulting in alack of carriers,
this region call Depletion region.
VD=0
Diode Symbol
Fig.(14) P-N junction diode.
Diode Bias
If the external potential of V volt is applied across the P-N junction
this will bias the diode. There are two type of diode bias
- Reverse Bias
The Positive terminal to N-type and the negative terminal to P-type
as shown in Fig.(15-a). The depletion region have been winded, that result
to over come the region from the majority carrier more and more carrier.
The current that exists under reverse-bias condition call Reverse
Saturation Current (IS).
- 12 -
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
- Forward Bias
The Positive terminal to P-type and the negative terminal to N-type
as shown in Fig.(15-b). The application of F.B potential VD . The electrons
in N-type and hole in P-type will be recombine with the ions near the
boundary region and reduce the width of depletion region. The Diode
current pass ID calculated by

I D  I S exp eVD
KT 

1
Where
VD : applied voltage:
K: Boltizman Constant. (K=1.38*10-23 J/k)
e : electron charge. (e = 1.602*10-19C)
T: Temp. in Kelvin.
T0: temp. in degree.
T=T0+273
ID=0
(a)
- 13 -
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
(b)
Fig.(15)
a. Reverse bias diode
b. Forward bias diode
- V-I Diode Characteristics
The relation ship between applied voltage VD and diode current ID
can draw as
Break Down
Voltage
The break down region is the reverse voltage that destroyed the reverse
bias depletion region and flow current in R.B.
- Diode Resistance
- 14 -
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
The diode resistance can calculated depend on type of applied voltage
- D.C Diode Resistance
RD 
VD
ID
Where
RD: diode resistance in DC.
- a.c Diode Resistance
The derivative of a function at point is equal to
the slope of the tangent line draw at the point
I D  I S (exp eVD / KT   1)
ID
I D
vD
dI D
e
 I S (exp eVD / KT  .
)
dV D
KT
dI D
e
I D  I S

dV D KT

dI D
e

ID
dV D KT
at room temp. T  300k
rD 
dV D
dI D
rD 
0.026

ID
- Diode Equivalent cct.
- 15 -
Dr. Hussam AL-Obiady
VD
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
Diode equivalent cct. in both F.B and R.B shown in Fig.(14)
Power dissipated in diode is
PDiode  VD . I D
Example/ For the cct. shown below find VD, ID and RD at room temp.
1K 
10 Volt
From the cct.
- 16 -
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
V - VD - IDRL=0
VD-1000 ID = 10

I D  I S exp eVD
KT 


1
(1)

I D  0.1*10 6 exp VD 11600  1
(2)
Using draw to find ID and VD
Equation (1)
VD=0 ID=10 mA
ID=0 VD=10 V
ID
10 mA
Q- point
IDQ
VD
VDQ
10 v
VDQ=0.8 volt
VDQ=9.8 mA
RD=0.8/9.8*10-3= 81.6 
- 17 -
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
Example/ Determined the currents I1, I2, and ID2 for the cct. shown below.
Both diode silicon diode
I1
I2
3.3 K 
20 Volt
5.6 K 
SOL.
D1 : F.B
D2 : F.B
VD1 = VD1= 0.7 volt
I1= 3.3*103 * 0.7 = 2.31 mA
I2= (20-0.7-0.7)/ 5.6*103 = 3.32 mA
ID2= I2- I1
ID2= 1.01 mA
- 18 -
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
3.3 Diode a.c Applications
3.3.1 Rectifier
A rectifier is an electrical circuit used to convert AC voltage into DC
voltage. The are two type of rectifiers
- Half-Wave Rectifier (HWR)
The process of half-wave rectification is illustrated below
Positive Cycle
a
.
c
Negative Cycle
Fig.(16) HWR cct.
 When sinusoidal input (Vin) goes positive, diode is Forward Biased
(F.B), thus conducts current. The output voltage keeps the shape of the
input voltage.
 When Vin becomes negative (second half of cycle), diode is reverse
biased (RB). There is no current the voltage across resistor RL is 0V.
 Net result is a pulsating dc voltage with same frequency as input.
Average value (DC value) of HWR signal is
VDC 
V p (out)

- 19 -
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
Where
V p (out) : the peak output voltage.
The root mean square value (RMS value) of HWR signal is
Vrms 
V p (out)
2
For non-ideal diode (Silicon diode) the peak output voltage decreases by
0.7 V as
Vp (out)  Vp (in)  0.7
Peak Inverse Voltage (PIV)
Diode must be able to withstand this amount of repetitive reverse voltage,
PIV calculate from diode in reverse bias. PIV in HWR is equal to peak
value of the input voltage.
PIV = Vp(in)
Example/ prove for HWR
i. VDC 
V p (out)

ii. Vrms 
V p (out)
2
Vp
Sol.
Vp sin(t ) 0  t  T / 2
Vout (t )  
0
T /2  t T

t
0
T/2
T
T /2
VDC 
VDC
VDC
VDC
VDC
1
Vout (t ) dt
T T/ 2
T /2
T

1
   Vp sin(t ) dt   0 dt 
T0
T /2

T /2

Vp 

  sin(t ) dt 
T 0

 Vp
T /2

cos(t ) 0
T
 Vp

[cos(T / 2)  cos(0)]
T
- 20 -
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
VDC 
VDC 
Seocnd Class
2012-2013
2Vp
2
T
T
Vp

II.
T /2
Vrms 
1
Vout (t ) 2 dt

T T / 2
1


T
T /2
Vrms
 Vp sin(t )
2
0

0
dt
 
T /2
T
dt 
Vrms
T /2
Vp 2  1  cos(t ) 

dt 

T  0
2

Vrms
Vp 2  1
1


t
sin(t )

T 2
4
0
T /2
Vp 2 T
T 4
Vp

2
Vrms 
Vrms
- Full-Wave Rectifier (FWR)
The Full-Wave Rectifiers are the most commonly used ones for dc
power supplies. The FWR exactly the same as the half-wave, but allows
unidirectional current through the load during the entire sinusoidal cycle
(as opposed to only half the cycle in the half-wave) as shown in Fig.(17).
The frequency of the output is twice that of the input. There are two main
types of full wave rectifiers:
- 21 -
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
Fig. (17) The FWR output wave form
1- Center-tapped transform FWR
Two diodes connected to the secondary of a center-tapped
transformer as shown in Fig.(18). Half of Vin shows up between the center
tap and each secondary Vp(sec). At any point in time, only one of the diodes
is forward biased. This allows for continuous conduction through load.
- Positive Cycle
D1 : F.B
D2 : R.B
- Negative Cycle
D1 : R.B
D2 : F.B
Fig. (18) The FWR center tab transformer circuit.
- 22 -
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
Average value (DC value) of FWR center-tap signal is
VDC 
2 V p ( out)

The root mean square value (RMS value) of HWR signal is
Vrms 
V p (out)
2
For non-ideal diode (Silicon diode) the peak output voltage decreases by
0.7 V as
Vp (out)  Vp (sec)  0.7
PIV in FWR center-tab is
PIV = Vp(sec)+ Vp(out) = 2 Vp(sec)+0.7
2- Bridge full-wave rectifier.
Four diodes connected to transform as shown in Fig.(19). Every two
diode work together in one cycle of signal.
- Positive Cycle
D1, D3 : F.B
D2, D4 : R.B
- Negative Cycle
D1, D3 : R.B
D2, D4 : F.B
Fig.(19) The FWR cct. (Bridge rectifier)
- 23 -
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
When the input cycle is positive, diodes D1 and D2 are forward
biased. When the input cycle is negative, diodes D3 and D4 are the ones
conducing. The output voltage becomes:
Vp(out) = Vp(sec) – 1.4 V
The reason we’d rather use a full bridge rectifier than a center-tap, is
that the PIV is a lot smaller as shown in Fig.(20)
Fig.(20) The FWR Bridge rectifier, calculate PIV.
PIV = Vp(out) + 0.7
Q/ prove for FWR
i. VDC 
2V p ( out)

ii. Vrms 
- 24 -
V p (out)
2
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
- Rectifier with filters (regulators)
The output of the rectifier is a pulsating dc wave. To generate a
constant dc output use filter out the oscillations from the pulsating dc
wave. The diode capacitor combination is the first type of regulator as
shown in Fig. (21).
A capacitor-input filter will charge and discharge such that it fills in
the “gaps” between each peak. This reduces variations of voltage. This
voltage variation is called ripple voltage Vr. The advantage of a full-wave
rectifier over a half-wave is shown in Fig. (22) . The capacitor can more
effectively reduce the ripple when the time between peaks is shorter.
Fig.(21) the affect of capacitor at HWR output signal
- 25 -
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
Fig.(22) the effect of regulator at a)HWR b) FWR circuit.
The ripple voltage and ripple factor calculated by
Vdc  VP (in ) (1 
Vr ( rms ) 
1
)
2 RCf
VP (in )
2 3RCf
- 26 -
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
Hint/ f :frequency of input signal in HWR and double in FWR.
The ripple factor calculated by
r
Vr ( rms )
r
VDC
1
3 (2 RCf  1)
Example/ The FWR cct. shown in Fig.() draw output wave form. Then
find
i.
DC voltage and current
ii.
the ripple voltage
iii.
ripple factor. 
iv.
Change in DC voltage if capacitor increased to 100 F
Vin(rms)=220 v
f= 50 Hz
Vo
RL=10K 
C=50 F
Ns/Np=1/5
Sol/
Vin(p)=Vin(rms)* 2
Vin(p)= 311,13 volt
Vp= 311,13 *1/5 = 62,23 volt
F=2*50 =100 Hz
- 27 -
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
1
)
2 RCf
Vdc  61.6 volt
Vdc  VP (in ) (1 
I dc 
VDC
 6.16 mA
R
r
1
 5.77%
3 (2 RCf  1)
r
Vr ( rms )
VDC
Vr ( rms)  0.3556 volt
62.23 v
61.6 v
Vr ( PP )  1.232 volt
iv. change capacitor 100 F
Vdc  VP (in ) (1 
1
Vdc  VP (in ) (1 
)
2 RCf
Vdc  61.92 volt
T=1/100
Change in DC voltage
61.92-61.6 = 0.32 volt
Q/ The HWR circuit with resistance load 20K and parallel capacitor
C=100  F. If diode ideal calculate the DC voltage with and without
capacitor, then draw the output wave if input signal 10 sin (t).
- 28 -
Dr. Hussam AL-Obiady
1
2 RCf
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
3.3.2 Clipper
–
Diodes can be used to clip off portions of signal voltages (above or
below certain levels).
–
Diode will become forward biased as soon as VA becomes larger than
VBIAS+0.7.
–
When diode is forward biased, VA cannot become larger than VBIAS + 0.7
V.
–
Thus, the voltage across the load, RL, will also be equal to VBIAS + 0.7.
–
When diode is reverse biased, it appears as an open, so the output
voltage is the voltage of RL alone.
Fig.(23) The diode used as Clipper cct.
Q/ Draw output wave form for two circuit below
- 29 -
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
3.3.3 Diode Clampers
A clamper adds a dc level to an ac voltage, also called DC restorers.
The clamper cct. shown in Fig. (24), analysis by
–
When input voltage goes initially negative, diode is forward biased.
–
Capacitor charges to near peak of inpt (Vp(in) – 0.7).
–
Right after the negative peak, diode is reverse biased (because cathode is
held near Vp(in) – 0.7 by charge on capacitor).
–
Capacitor can only discharge through the RL.
–
Since RL has high resistance, the capacitor discharges very little each
period.
–
Note that time constant should be large (at least 10 times the period of
the input voltage).
–
Since capacitor retains charge, it acts like a battery in series with the
input voltage.
Fig.(24) The diode used as Clamper cct.
- 30 -
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
Q/ Draw output wave form for two circuit below
3.3.4 FULL-WAVE DOUBLER
By use two diodes and two capacitor the cct. work as voltage
doubler, as shown in Fig.(25). The cct. analysis is
–
When secondary is positive, D1 is forward biased and C1 charges to
approximately Vp.
–
During the negative half-cycle, D2 is forward biased and C2 charges to
approximately Vp.
–
Output voltage is talked across the two capacitors in series.
Fig.(25) The Voltage Double cct. a) Positive cycle b) Negative Cycle.
- 31 -
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
3.4 Zener Diodes
The analysis of circuit employing Zener diodes is equity similar to
that applied to the semiconductor diode in F.B, if Zener diodes in R.B and
the applied voltage across the diode greater than VZ (Zener voltage), than
the output voltage has been fixed at VZ as shown in Fig.(26).
Case
Equivalents
0.7
F.B
V in
V in
O.C
R.B
Vin <VZ
V in
V in
VZ
R.B
Vin >VZ
V in
V in
Fig.(26) the equivalent circuit of Zener Diode
- 32 -
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
For the three case shown in Fig. (26) the Zener Diodes Characteristics
shown in Fig.(27)
VZ
Vin > VZ
IZmin
Output
IZmax
voltge = VZ
Fig.(27) Zener Diode Characteristic
3.4.1 Zener Diode as Voltage Regulator
The Zener diode in Fig. (28) works as voltage regulator, the load
voltage has been fixed at VZ when input voltage increase.
RS
Iin
IL
IZ
Vin
Fig.(28) Zener as voltage regulator
If Vin< VZ
diode = O.C
the equivalent cct. is
- 33 -
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
VL  Vin
Seocnd Class
2012-2013
RL
RLs  R S
RS
Iin
IL
IZ
IZ  0
Vin
Vin
V
I in  I L 
 in
RL  R S RL
VL  VZ
RS
V
IL  Z
RL
Iin
IL
IZ
Vin
I in  I L  I Z
VZ
Vin
V
 Z  IZ
RL  R S RL
PZ: Total dissipated power in Zener diode is
Pz  VZ .I Z
3.4.2 Variable load (RL) with fixed (Vin)
Due to VZ there is a specific range of resistance value which will
ensure that Zener is in the ON state. The RLmin result of load voltage be less
Zener voltage and Zener device have min Zener current IZmin. When RLmax
that result increasing in load current and Zener siode have max current
IZmax.
RLmi n < RL < RLmax
RS
I in  I L  I Z
V  Vz
I in  in
RS
Iin
IL
IZ
V
IL  Z
RL min
Vin
Vin  Vz
V
 Z  I Z min
RS
RL min
Vin  Vz
V
 Z  I Z max
RS
RL max
3.4.3 Variable (Vin) with fixed (RL)
- 34 -
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
If RL fixed then the input voltage Vin must be sufficiently large to
turn the Zener diode ON. The Vinmin turn with min Zener current IZmin.
When Vinmax turn with Zener diode have max current IZmax, that result an
fixed load current IL .
RS
Vinmin < Vin < Vinmax
Iin
IL
IZ
Vin
I in  I L  I Z
I inmin 
Vinmin  Vz
Vinmin  Vz
RS
Vinmin  Vz
RS
IL 
RS

VZ
 I Z min
RL

VZ
 I Z max
RL
VZ
RL
Example / Determined the range of values
RS =
220 
fo Vin that will maintain the Zener diode in
Iin
IL
IZ
ON state, for the cct. shown below
Vin
SOL/
I in  I L  I Z
I inmin 
Vinmin  Vz
Vinmin  Vz
RS
Vinmin  20
RS

IL 
VZ
RL
VZ = 20V
IZmax = 60mA
IZmin = 0
VZ
 I Z min
RL
20
0
220
1200
Vinmin  23.6 volt

- 35 -
Dr. Hussam AL-Obiady
RL =
1.2K 
Computer Techniques Engineering Department
Electronic Engineering
Vinmin  Vz

RS
Vinmin  20
Seocnd Class
2012-2013
VZ
 I Z max
RL
20
 60 *10 3
220
1200
Vinmin  36.87 volt

23.6  Vin  36.87 volt
RS =
1K 
Example / Determined the range of
Iin
IL
values fo RL that will maintain the
IZ
Zener diode in ON state, for the cct.
Vin
50 V
shown below
SOL/
VZ = 10V
IZmax = 32mA
IZmin = 0
I in  I L  I Z
I in 
Vin  Vz
RS
Vin  Vz
IL 
VZ
RL min
VZ
 I Z min
RS
RL
50  20
10

0
1000
RL min

RL min  250 
Vin  Vz
V
 Z  I Z max
RS
RL max
50  20
10

 32 * 10 3
1000
RL min
RL min  1250 
250  RL  1250 
Q/ The DC voltage supply have Vin =50 volt used in regulator cct. contian
Zener diode, the load voltage fixed at VL=12 volt and load current
change from (10mA-200mA). Design the cct. then determined RS, Vz,
and PZ max.
- 36 -
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
4. Bipolar Junction Transistor
4.1 BJT Structure and Operator
The transistor is a three layer semiconductor device consisting of two
N-type and one P-type layers of material call (NPN) transistor or two Ptype and one N-type layers of material call (PNP) transistor as shown in
Fig.(29). In transistor two depletion region have made between three layers,
that’s name
E : Emitter ( High doping layer and wide width)
C: Collector ( Low doping layer but wide width)
B: Base ( Low doping layer the ratio of width depend on Emitter 150:1)
E
C
P
N
P
E
C
N
B
P
N
B
C
E
C
E
B
B
Fig.(29) The BJT transistor
a) PNP transistor with symbol
b) NPN transistor with symbol.
- 37 -
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
The basic operation of the transistor (PNP) as shown in Fig.(30)
- J1 (junction one) between Emitter and Base is F.B, the depletion
region reduced. Large Hole current has been passed.
- J2 (junction Two) between Collector and Base is R.B, the depletion
region wide. The current pass only the minority carrier.
Fig.(30) Transistor Bias
By apply Kerchief Current low the transistor currents as shown in Fig.(31)
are
IE = IC+ IB
IE: Emitter current
IC: Collector Current
IB: Base Current
Fig.(31) BJT transistor Currents.
- 38 -
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
4.2 Common-Base Configuration
The Common-Base configuration set Emitter as input port and Collector as
output port and base as common for that call C.B.
VCB
IE
RE
VEB
+
IC
-
+
+
IB
+
-
RC
VCC
VEE
C.B input port
Input current IE
Input voltage VEB
C.B output port
output current IC
output voltage VCB
the relation ship between input and output current depend on  coefficient
IC   I E
The input characteristic of C.B transistor shown in Fig.(32), the input curve
(between current IE and voltage VEB) various when output voltage change.
- 39 -
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
Fig.(32) Input Characteristic of C.B transistor.
The output characteristic of C.B transistor shown in Fig.(33), the output
curve (between current IC and voltage VCB) various when input current
change.
Fig.(33) Output Characteristic of C.B transistor.
- 40 -
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
- Common-Base Analysis
The C.B circuit shown below analyzed by two loop
- input loop
VEE - IE RE - VEB = 0
Emitter-Base junction F.B then VEB = 0.7 volt in (PNP)
VBE = 0.7 volt in (NPN)
IE 
VEE  VEB
RE
I C  I E
- output loop
VCC  I C RC  VCB  0
VCB  VCC  I C RC
Q- point ( the transistor work point )
Q (VCB, IC)
Example/ The electron circuit shown below find Q point
 = 0.98
VCB
IE
RE = 1K 
VEB
+
-
IC
+
-
+
IB
+
-
RC= 1.5 K 
VCC =5 V
VEE = 5 V
SOL/
IE 
VEE  VEB 5  0.7

 4.3 mA
RE
1000
I C  I E  0.98 * 4.3 *10 3  4.214 mA
- 41 -
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
VCC  I C RC  VCB  0
VCB  VCC  I C RC
VCB  7  4.214 *103 *1.5 *103
VCB  12.321 volt
Q point (VCB = 12.321 volt , IC = 4.214 mA)
Q/ The electron circuit shown below find Q point, IE, IC, IB,VE, and VC
 =0.98
RE =
500 
RB =
50K 
RC 1K 
VCC = 4 volt
VEE = 2 volt
4.3 Common Emitter Configuration
The Common-Emitter configuration set Base as input port and
Collector as output port and Emitter as common for that call C.E.
C.E input port
Input current IB
Input voltage VBE
C.E output port
output current IC
output voltage VCE
- 42 -
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
the relation ship between input and output current depend on  coefficient
IC   I B
The input characteristic of C.E transistor shown in Fig.(34), the input curve
(between current IB and voltage VBE) various when output voltage change.
Fig.(34) Input Characteristic of C.E transistor.
The output characteristic of C.E transistor shown in Fig.(35), the output
curve (between current IC and voltage VCE) various when input current
change.
Fig.(35) Output Characteristic of C.E transistor.
- 43 -
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
- The relation ship between  and 
I E  IC  I B
IC
I
 IC  C


1
1
 1




1 
another relashion
1
1
 1




 1
The relation Between IE and IB
IE = (  +1) IB
- Analysis of C.E Transistor
- input loop
VCC
VBB – IB RB - VBE = 0
IB 
VBB  VBE
RB
RC
I C  I B
RB
- output loop
IC
IB
+
VEB-
+ VCE
-

VBB
VCC  I C RC  VCE  0
VCE  VCC  I C RC
Q- point ( the transistor work point )
Q (VCE, IC)
- 44 -
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
- Load Line and Transistor Regions
The load line anaylsis is he sum of points that transistor can work on
it in different type of input current IB. To draw Load line two region
must be calculated
1- Cutoff Region
Where both junction of transistor are R.B the currents pass
through transistor are Zeros
IC = I B = 0
From output loop can calculate VCE in cutoff
VCC  I C RC  VCE  0
IC  0
VCE (cutoff )  VCC
2- Saturation Region
Where both junction of transistor are F.B the currents pass
through transistor are the maximum current hold from transistor
VCE = 0 ( practical 0.2 volt)
From output loop can calculate IC(sat.) is
VCC  I C RC  VCE  0
I C ( Sat.) 
VCE  0
VCC
RC
Q-point
Sat. Region
- 45 -
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
- C. E with RE
In this cct. an RE resistance are connect between Emitter and Earth, this
resistance gives more stability to Q-point when  change.
VCC
- input loop
VBB – IB RB - VBE – IE RE = 0
RC
VBB  VBE
IB 
RB  (   1) RE
RB
I C  I B
IB
+ VCE
-
+
VEB-
output loop

IC
VBB
RE
VCC  I C RC  VCE  I E RE  0
IC  I E
VCE  VCC  I C ( RC  RE )
Q- point ( the transistor work point )
Q (VCE, IC)
Example/ for the cct. shown below Find Q. point for  =50 and 80
Sol/
For  =50
VCC=15
VBB – IB RB - VBE – IE RE = 0
3K 
IC
5  0.7
IB 
 43 A
3
50 *10  (50  1)1000
I C  I B  2.15 mA
50K 
IB
+
VEB-
VCC  I C RC  VCE  I E RE  0
VCE  15  2.15 *10 3 * (3 *103  1 *103 )
VBB = 5
VCE  6.4 volt
+ VCE
-
1K 
For  =80
- 46 -
Dr. Hussam AL-Obiady

Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
VBB – IB RB - VBE – IE RE = 0
5  0.7
 32.8 A
50 *10  (80  1)1000
I C  I B  2.63 mA
IB 
3
VCC  I C RC  VCE  I E RE  0
VCE  15  2.63 *10 3 * (3 *103  1 *103 )
VCE  4.48 volt
For  =50
(VCE = 6.4 volt , IC = 2.15 mA)
For  =80
(VCE = 4.48 volt , IC = 2.63 mA)
- C. E Self Bias
In this cct. only one suppliy used to bias the two junctions.
- input loop
VCC
VCC – IB RB - VBE = 0
IB 
VCC  VBE
RB
RC
I C  I B
RB
IB
+
VEB-
- output loop
VCC  I C RC  VCE  0
VBB
IC
+ VCE
-
RE
VCE  VCC  I C RC
Q (VCE, IC)
- 47 -
Dr. Hussam AL-Obiady

Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
- C. E Self Bias with RE
In this cct. an RE resistance are connect between Emitter and Earth
- input loop
VCC
VCC – IB RB - VBE – IE RE = 0
IB 
VCC  VBE
RB  (   1) RE
RC
I C  I B
RB
IB
+ VCE
-
+
VEB-
- output loop
VCC  I C RC  VCE  I E RE  0

IC
VBB
RE
IC  I E
VCE  VCC  I C ( RC  RE )
Q (VCE, IC)
Example/ for the cct. shown below Find Q. point for  =30 and 60
Sol/
10
For  =30
VBB – IB RB - VBE – IE RE = 0
1K
10  0.7
IB 
 76.8 A
3
90 *10  (30  1) *1 *103
I C  I B  2.3 mA
90K

VCC  I C RC  VCE  I E RE  0
VCE  10  2.3 *10 3 * (1 *103  1 *103 )
IB
+
VEB-
VBB
VCE  5.4 volt
10  0.7
 71 A
90 *10  (60  1) *1 *103
I C  I B  4.26 mA
3
- 48 -
+ VCE
-
1K
For  =60
IB 
IC
Dr. Hussam AL-Obiady

Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
VCC  I C RC  VCE  I E RE  0
VCE  10  4.26 *10 3 * (1 *103  1 *103 )
VCE  1.48 volt
For  =30
(VCE = 5.4 volt , IC = 2.3 mA)
For  =60
(VCE = 1.48 volt , IC = 4.26 mA)
In this cct. increase  100% change IC by 70%
VCC
- An Dependent of  Circuit
This cct. used two resistance in
RC
R2
input loop, this give part of VCC
in input voltage.

IB
By using thieven theory in input
R1
loop to find VBB and RBB
RE
VCC
R2
RBB
IB
Base
Base
R1
VBB  VCC
Thieve
theory
R1
R1  R2
VBB
RBB 
- 49 -
Thieve
theory
R1 R2
R1  R2
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
- input loop
VCC
VBB – IB RBB - VBE – IE RE = 0
IB 
VBB  VBE
RBB  (   1) RE
RC
I C  I B
RBB
- output loop
VBB
IC  I E

IB
+
VEB-
VCC  I C RC  VCE  I E RE  0
IC
+ VCE
-
RE
VCE  VCC  I C ( RC  RE )
Q- point Q (VCE, IC)
Example/ for the cct. shown below Find Q. point for  =50 and 70
SOL/
RBB 
RBB 
12 v
R1 R2
R1  R2
50 *103 * 60 *103
 27.27 K
50 *103  60 *103
1.5K 
50K 
IB
VBB  VCC
VBB  12
R1
R1  R2
60K 
60 *103
 6.55 volt
50 *103  60 *103
- 50 -
1K 
Dr. Hussam AL-Obiady

Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
For  =50
VCC=12
VBB – IB RBB - VBE – IE RE = 0
6.55  0.7
 73.3 A
27.27 *103  (50  1)1000
I C  I B  3.72 mA
IB 
VCC  I C RC  VCE  I E RE  0
1.5 K 
IC 
27.27 K 
VCE  12  3.72 *10 3 * (1.5 *103  1 *103 )
IB
+
VEB-
VCE  2.71 volt
6.55 V
For  =70
+ VCE
-
1K 
VBB – IB RBB - VBE – IE RE = 0
6.55  0.7
 59.3 A
27.27 *103  (70  1)1000
I C  I B  4.15 mA
IB 
VCC  I C RC  VCE  I E RE  0
VCE  12  4.15 *10 3 * (1.5 *103  1 *103 )
VCE  1.62 volt
For  =50
(VCE = 2.71 volt , IC = 3.72 mA)
For  =70
(VCE = 1.62 volt , IC = 4.15 mA)
Load line
VCC  I C RC  VCE  I E RE  0 (output loop)
12  IC (2.5 *103 )  VCE  0
Cutoff Region IC = 0 VCE =12 volt
Saturation Region VCE = 0 IC(Sat)= 4.8 mA
IC
 =70
4.8 mA
 =50
12 V
- 51 -
VCE
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
- C.E with Feedback Resistance
VCC
- input loop
I C'  I C  I B
RB
I C'  I E
I C'
RC
IC
IB
VCC – IE RC – IB RBB - VBE – IE RE = 0
+
VEB-
VCC  VBE
IB 
RBB  (   1)( RE  RC )
I C  I B
+ VCE
-
RE
- output loop
VCC  I E RC  VCE  I E RE  0
VCE  VCC  I C
( RC  RE )

Q- point Q (VCE, IC)
Q / for the cct. shown below Find Q. point for  =50 and 70
12 v
I C'
1K 
IC
90K

IB
+
VEB-

+ VCE
900 
- 52 -
Dr. Hussam AL-Obiady

Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
Sheet
18 v
Q1 / for the cct. shown
below Find Q. point, load
5.6K 
82K 
line, VB, VC, and VCB
  50
IB
22K 
1.2K 
Q2 / for the cct. shown below Find
Q. point and load line
1 K
100 K 
IB

+ VCE
-
+
VEB-
200 
-9
Q3 / for the cct. shown below Find
Q. point and load line

240 K 
IB
+ VCE
-
+
VEB-
2K 
-20
- 53 -
Dr. Hussam AL-Obiady
Computer Techniques Engineering Department
Electronic Engineering
Seocnd Class
2012-2013
Q4/ for the cct. shown below Find RB,
10
RC, and RE . If  =30, VCE = 5.4 volt , IC
= 2.3 mA, and VE = 2.31 Volt.
RC
IB
RB
+ VCE
-
+
VEBVBB
RE
VCC=15
Q5/ for the cct. shown below Find RB,
RC, and RE . If  =50, VCE = 6.4 volt ,
RC
IC = 2.15 mA, and VE = 2.2 Volt.
Calculate change in Q.point
RB
if VBB = 9 volt.
IC
IB
+
VEB-
+ VCE
-
VBB = 5
Q6/ for the cct. shown below
RE
12 v
Q.
point (5.4 V, 2.3 mA) and  =50.
Find RC and R1.
RC
R1
IB
60K 
- 54 -
1K 
Dr. Hussam AL-Obiady
