SiGe(C) MOSFET Technology
Sanjay Banerjee
University of Texas at Austin
• Issues in Scaled CMOS
• Bandstructure, Transport and Strain
• Enhanced Mobility Channels
- Strained Si and SiGe(C)
• Multi-Gate and Novel MOSFETs
• Process Integration Challenges
1
ITRS, 2003
2
3
Streetman and Banerjee, Solid State Electronic Devices, Prentice Hall
For LONG channel
ID
W
1


=
µ C 0 X  (V G − V T ) V D − V D 2 
2
L


I DSAT =
W
1


µ C0 X (VG − VT )VDSAT − VDSAT 2 
L
2


where[VDSAT = (VG − VT )]
I DSAT =
W
1

µ C0 X  VDSAT 2 
L
2

For SHORT channel,
I D ≈ WCOX (VG − VT ) vsat
Experimental output characteristics of n-channel and p-channel MOSFETs with 0.1 micron channel
lengths. The curves exhibit almost equal spacing, indicating a linear dependence of ID on VG, rather
than a quadratic dependence. We also see that ID is not constant but increases somewhat with VD
4
in the saturation region. The p-channel devices have lower currents because hole mobilities are
lower than electron mobilities.
I DSAT
 1 − rc 
(VG − VT )
= [COWvT ]
 1 + rc 
5
For short “quasi-ballistic” MOSFETs, current is limited by source-to-channel injection of thermal carriers. Since,
here the longitudinal field is low, this injection is limited by low field mobility. (Natori and Lundstrom)
6
Compressive Strain in Si1-xGex
• Si1-xGex Bulk Properties.
– 0 to 100% Ge possible
– Lattice constant and bandgap
given by Vegard’s Law:
aSiGe ( x ) = aSi (1 − x ) + aGe ( x )
Relaxed
104
Critical Thickness (nm)
• Si1-xGex on Si
– Up to 4.2% lattice mismatch
– Strained epitaxial layers
– Tetragonal distortion breaks
degeneracy in the bandstructure.
103
102
Metastable
101
100
0
20
40
Ge Conc. (%)
7
60
“Effective mass”
m
g c (E ) = 4π 
 h
eτ
µ=
m*
3
2
1

 (E − Ec )2

1
m1* m2* m3* 3
*
de
2
!2
m =
 d 2E 
 2 
 dk 
*
−1
 1
1
1 
m = 3 * + * + * 
m =
 m1 m2 m3 
Bandstructure effective mass, m*, is inversely related to curvature of bands, and
depends on crystal orientation.
Density of states m* is related to geometric mean of bandstructure m*. Must
count number of “equivalent” valleys.
8
Conductivity m* is harmonic mean of bandstructure m*.
*
(
)
*
Si-based Strained Materials
growth
direction
growth
direction
CB
VB
E
Bulk Si
CS-SiGe
TS-Si
Relaxed
SiGe
E
CB
LH
k
k
HH
VB
LH
CS-SiGe
HH
TS-Si
9
Calculated Electron and Hole Mobility of Strained SiGe
Hole mobility with/without alloy scattering in plane and out-of-plane
Electron mobility with/without alloy scattering in plane and out-of-plane
Ge MOLE FRACTION
Fischetti and S.E. Laux, J. Appl. Phys. 80 (4), 1996
10
Monte Carlo calculations of minority hole mobilities in Si1-xGex for four doping
levels (in cm-3) at 300 K: dot-dashed line is the vertical mobility of strained
Si1-xGex, solid line is the mobility of unstrained Si1-xGex, dashed line is the planar
mobility of strained Si1-xGex.
FM Bufler, P Graf, B Meinerzhagen, G Fischer, H Kibbel. Hole transport investigation in unstrained and 11
strained SiGe. J. Vac. Sci. Technol. B 16(3), pp. 1667-1669, 1998.
Ultra High Vacuum Chemical Vapor Deposition
• Base pressure: ~10-10 Torr
• Cold wall, load locked system
• Low deposition pressures
• 1 to 10 mTorr
• ~500o C growth temperature
• Gases
• Si2H6, GeH4, CH3SiH3
• B2H6, PH3
• Can use hot wall UHVCVD or RTPCVD
12
13
Strained Si-on-SiGe Buffer
14
Inversion Layer Mobility
Strained Si mobility
enhancement may be
due to reduced
surface roughness,
rather than
bandstructure
(Fischetti)
15
Strained Si NMOSFET Monte Carlo Simulations
1000
800
Welser et al.
Rim et al.
600
400
Takagi et al.
MCUT, γ = 0.0
200
MCUT, γ = 0.2
MCUT, reduced SR, γ = 0.2
0
0.0 0.2 0.4 0.6 0.8 1.0 1.2
Normal Effective Field ( MV/cm )
!MOSFET (Tox= 2 nm) K. K. Rim et. al., IEEE Trans. on Elec. Dev., 47 (7), pp. 1406, 2000
! MIT well-tempered device structure:http://www-mtl.mit.edu/Well/device50/topology50.html
!1-D Schrödinger equation for quantum correction
!As suggested by Fischetti et. al., J. Appl. Phys., 92 (12), 2002), surface roughness reduction may
16
play a role in mobility increase in strained-Si devices.
Id ( µA/µm )
600
S-Si, γ=0.2
Bulk-Si
S-Si, γ=0.2, reduced SR
Vg - VT = 2.0 V
500
400
300
Vg - VT = 1.0 V
200
100
0
0.0
0.4
0.8
1.2
Vd (V)
4
BSi 0.1 V
BSi 0.3 V
BSi 0.6 V
7
700
Average Drift Velocity (10 cm/s)
Current enhancement in Strained Si NMOSFET
1.6
2.0
3
SSi 0.1 V
SSi 0.3 V
SSi 0.6 V
BSi = Unstrained Si
SSi = Strained Si on Si0.8Ge0.2
2 Tox = 67 A
L = 50 nm
VG - VT = 0.5 V
1
0
0.07
0.08
0.09
0.10
0.11
Channel Position (um)
0.12
0.13
17
Strained Si p-MOSFETs
Mobility Enhancement over Cz-Si
ε-Si on Si0.7Ge0.3
ε-Si on Si0.65Ge0.35
1.7
ε-Si on Si0.6Ge0.4
Adapted
from Leitz et
al. J.Appl.
Phys. 92,
3745 (2002)
1.6
1.5
1.4
1.3
1.2
2.5x10
12
12
5.0x10
7.5x10
2
12
1.0x10
13
Ninv per cm
• µeff enhancement decreases with gate
overdrive* for holes
*Lee and Fitzgerald,
MARCO, 2004
*Rim et al. IEDM
(1995).
Nayak et al. IEEE
Trans. on Elec.
Dev. 43, 1709
(1996)
**Rim et al.
Symposium on
VLSI
Technology
(2002)
– No p-channel enhancement at Eeff = 1 MV/cm** for x = 0.28
– Physical mechanism poorly understood
Performance benefits of ε-Si primarily from n-MOSFET
18
Mobility enhancement in tensile and compressively strained Si
19
Mobility with Strain (Courtesy: Yu)
20
SiGe strain- and bandengineered heterostructures
2DEG
Ec
ε-Si
Relaxed Si1-xGex
Ec
ε-Si1-yGey
Relaxed Si1-xGex
Ef
Ef
Increasing y
Ev
Ev
Increasing x
• Relaxed Si1-xGex virtual substrates allow
– Si-rich alloys in biaxial tension (a║/ao > 1)
• Type-II band offset → Two-dimensional electron gas
• Barrier for holes
– Ge-rich alloys in biaxial compression (a║/ao < 1)
• Type-I band offset → Two-dimensional hole gas
• Cannot confine electrons
21
Dual-channel heterostructures
ε-Si1-yGey
ψ decays in ε-Si
due to deep well in
Si1-yGey
Ec
ε-Si
Relaxed Si1-xGex
Ef
Ev
ψholes
• Cannot confine ψ in one channel or another
– Different from traditional buried-channel device
• ε-Si1-yGey layer beneath ε-Si boosts µeff even at large Ninv, high Eeff
• ε-Si is more than just a “cap”
– Enhanced hole mobility*, different from pseudomorphic SiGe devices
22
23
Ge, et. al, IEDM 2003
24
Sanuki, et. al. IEDM 2003
Electronic Properties of Strained Si1-xGex
a||
a⊥
aSi
∆6
Relaxed
Si
HH & LH
∆E c
∆4
Strained
Si 1-x Ge x
HH
∆E v
Type-I (Compressive)
25
SiGe MOSFET Structure
Poly
Oxide
Energy
SiGe
Ec
Si Substrate
Ev
∆Ev
Depth
• Typical MOS structure
– Si1-xGex channel with Si cap
leads to buried channel, and
lower gate capacitance
• Si cap
– Used for oxidation
– Also acts as a parasitic channel,
leading to gate operating
Z.Shi, ..S. Banerjee
“window”
26
“Simulation and optimization of strained Si1-xGex
buried channel p-MOSFETs,” Solid State Electronics, 44 (7): 1223, 2000.
Output, sub-threshold,
and mobility-field
characteristics of
70nm Si0.9Ge0.1-SiO2
buried channel
PHFET.
E. Quinones,..S.Banerjee “Design,
Fabrication, and Analysis of SiGeC
Heterojunction PMOSFETs,”
IEEETrans.Elec.Dev., Sept. 2000.
27
Subthreshold and mobility-field characteristics for 180nm Si0.8Ge0.2-HfO2 PHFETs
and control Si PMOSFET.
Recovery of mobility degradation for high-k gate dielectrics with enhancedmobility channels: (Onsongo,.., Banerjee)
28
T.Ngai, J.Lee, S.Banerjee, “Electrical Properties of ZrO2 Gate Dielectric on SiGe,” Appl. Phys. Lett., 76(4),
p. 502, Jan. 2000.
Carbon Concentration
Addition of C to Si and Si1xGex
• Carbon has a smaller lattice constant
– Strain compensation of SiGe (~8:1)
– Tensile strained Si-C on Si
• Low solubility in Si
– Need low temperature growth to incorporate
C due to low solubility (5x1017 cm-3)
– Growth window for alloy growth
• Carbon ∆Ev=21-26meV/%C in SiGeC
(Lanzerotti, EDL,1996)
– Ge ∆Ev=25 meV/3% Ge
Carbide
Amorphous
Twinned
Islanded
Alloy
Temperature
A. R. Powell, K. Eberl, B. A. Ek, and S. S. Iyer,
"Si1-x-yGexCy growth and properties of the
ternary system," Journal of Crystal Growth Vol.
127, pp. 425, 1993.
• Carbon ∆Ec=75-90 meV/%C for SiC
– (Faschinger, APL, 1995)
K. Eberl, K. Brunner, W. Winter,
“Pseudomorphic Si1-yCy and Si1-x-yGexCy
alloy layers on Si,” Thin Solid Films, Vol.
294, pp. 98, 1997.
Si
CB
∆(6)
Si1-yCy
∆4
∆2
VB
hh, lh
lh
29
hh
Carbon Strain Compensation
-3 10
-3
-2.5 10
-3
-2 10
-3
Bare Si
0% C, 40% G e
1% C, 40% G e
1.5% C, 40% Ge
V -V =-4V
G
T
Red = after processing
Blue = as grown
Si0.795Ge0.2C0.005
)
A(
-3
-1.5 10
ID
-1 10
-3
-5 10
-4
V -V =-2V
G
0 10
T
0
Si0.8Ge0.2
0
-1
-2
-3
-4
-5
V (V)
D
Si0.585Ge0.4C0.015 shows 55% drive current
enhancement over bulk Si and 42%
enhancement over Si0.6Ge0.4
W/L= 10/0.5 um; tox= 6 nm
XRD Rocking Curves 30
S.Ray, .. S.Banerjee, “Novel SiGeC Channel Heterojunction PMOSFET,” Proc. of Int. Elec. Dev.Meet., 1996.
Electronic Properties of Strained Si1-xGex
[001]
[1
00
]
[010]
•
•
•
•
•
Strain splits the six fold degeneracy of
conduction band valleys.
•
Hole mobility increases with Ge fraction.
The four-fold in-plane valleys are
– Valence band splitting with strain
lowered, leading to less f-type scattering.
results in reduced scattering.
Carriers have a lower out-of-plane and
– Reduction of effective hole mass with
higher in-plane mass.
strain due to VB warpage
Electron mobility dependent on
– Increase in both ⊥ and || mobilities
directions: increase in ⊥, decrease in ||
To enhance electron mobility for the
planar NMOSFETs, tensile strained Si
31
Chen XD,.. Banerjee SK, Hole and electron mobility enhancement in strained
has to be used.
SiGe vertical MOSFETs, IEEE T ELECTRON DEV 48 (9): 1975-1980 SEP 2001
Hole mobility in Strained SiGe
32
Mobility in Relaxed SiGe
-4 0
Jayanaran & Banerjee, EMC 2004
S t r . S iG e
-3 0
W /L = 1 2 0 µ m /7 0 n m
T ox=4nm
V
GS
- V
T
= -1 .5 V
-2 0
D
I (mA)
Vertical Si, relaxed and
strained Si1-xGeX PHFETs
showing enhancement of
drive current over Si
MOSFETs only in the
presence of strain.
NHFETs also enhanced!
Si
R e l. S iG e
-1 0
- 0 .5 V
0 V
0
0
-0 .5
-1
V
DS
-1 .5
(V )
-2
33
-2 .5
Ge MOSFETs
Ge
Si
µn
(cm2/Vs)
3900
1500
µp
(cm2/Vs)
1900
450
Eg (eV)
0.66
1.12
Rosenberg et al. EDL 9, 639 (1988), Shang et al. IEDM(2002),
Chui et al. IEDM (2002), Bai et al. VLSI (2003)
A. Ritenour et al., IEDM, p.433, 2003
•
•
•
•
•
•
•
Bulk Ge has higher electron (2.5x) and hole (4x) mobility than Si, and can potentially
lead to faster MOSFETs and more balanced N vs. PMOSFETs.
Germanium bulk substrates brittle, lower thermal conductivity (0.6W/cm-K vs. 1.5 for Si)
Smaller Ge bandgap than Si broadens absorption spectrum; optoelectronic integration
on CMOS?
Native oxide on Ge surface is not stable; GeO2 water soluble, GeO volatile at low T.
Deposited high-k gate dielectrics promising
Performance much worse than expected, especially for NMOSFETs, probably because
of poor interface between Ge and high-k gate dielectric, as well as poor dopant
activation and interface between metal- source/drain
Higher junction leakage in Ge, especially at high T
34
Higher dielectric constant in Ge leads to worse electrostatics (DIBL, SS)
UHVCVD Ge-on-Si NMOS w/o SiGe buffer with PVD HfO2 and TaN gate
3
1
High frequency (1MHz) and
calculated low frequency
Ig(A)/cm2
2.5
L=10um, W=100um
EOT=1.1nm
2
Capacitance(uF/cm )
Ig(A)/cm
2
0.1
0.01
0.001
0.0001
0
2
1.5
EOT=1.1nm
1
L=10um, W=100um
0.5
0
-2 -1.5 -1 -0.5
0
0.5
1
1.5
2
-2 -1.5 -1 -0.5
0
0.5
1
1.5
2
V (V)
V (V)
G
G
10.0
8.0
L=2um, W=5um
I (uA/um)
S
-5
10
-7
10
I (A/um)
S
Vg=0.1V
Vg=0.6V
Vg=1.1V
Vg=1.6V
Vg=2.1V
6.0
4.0
SS=170mV/dec
V ~0.3V
-9
10
Vds=0.1V
Vds=0.6V
Vds=1.1V
Vds=1.6V
Vds=2.1V
-11
10
L=2um, W=5um
2.0
t
0.0
0
0.5
1
1.5
V
DS
2
2.5
(V)
-13
10
-1 -0.5
0
0.5
1
V (V)
GS
1.5
2
2.5
3
35
Donnelly, .., Banerjee, SRC 2004
Effect of strain in Ge layer
Si0.5Ge0.5
Si0.4Ge0.6
1600
Si0.3Ge0.7
x ↓, εGe ↑,µeff ↑
1400
12
Hole mobility enhancement
2
Effective mobility (cm / Vs)
1800
Si0.2Ge0.8
Si0.1Ge0.9
1200
Ge
Cz-Si
1000
800
600
400
200
0
2
4
6
8
10
2
Ninv per cm
*Lee et al.
Appl. Phys.
Lett. 79,
3344 (2001).
Lee et al. in
Mater. Res.
Soc. Symp.
Proc., vol.
686,
A1.9.1(2002)
.
12
12
14×10
2
% Compressive strain in Ge
1.6
1.2
0.8
0.4
0
Experimental
values computed at
Ninv = 8×1012/cm2
10
8
6
4
Experimental
Theoretical
2
0
0.5
0.6
0.7
0.8
0.9
Ge fraction in virtual substrate
• Higher strain in the Ge layer favors high µeff*
– x ≤ 0.7
• reasonable agreement with theoretical calculations**
– x ≥ 0.8
• rampant defect nucleation in Si cap, µeff depressed
1.0
**M. V.
Fischetti
and S.
E. Laux,
J. Appl.
Phys.
80,
(1996).
36
3-D Transistor Structures
top gate
S
G
100 nm
IBM ‘97
D
source
S
G
D
bottom gate
drain
Berkeley ‘99
S
G
Lucent ‘99
D
37
Mark Bohr, ECS Meeting PV 2001-2, Spring, 2001
Strained-Si PMOSFET on SiGe-on-Insulator
Tensile Strain
G
Gate
SiO2
S
p+
D
Strained Si
Relaxed
Si1-xGex
Buried SiO2
n+-Poly Gate
(200 nm)
SiO2 (9 nm)
p+
Strained-Si (20 nm)
Si0.9Ge0.1 (340 nm)
SiGe Buffer
Buried-Oxide (100 nm)
Si Substrate
T. Mizuno et al., IEDM, 934-936 (1999)
38
SSOI with thin SiGe buffers w/o misfits
using BPSG compliant substrates
39
Rim, et. al. & Sturm et. al. (IEDM, 2003)
High mobility heterojunction transistor (HMHJT)
• A Si/SiGe/Si quantum well is
used to increase the drive
current.
• The bulk punchthrough, DIBL
and floating body effect are
still suppressed due to
heterojunction in the deep
source/drain region.
Q.Ouyang, X.Chen, ..A.Tasch, S.Banerjee, “Bandgap Engineering in Deep
Submicron Vertical PMOSFETs,” Dev. Res. Conf., 2000.
40
Energy Band Diagram and Hole
Concentration of HMHJT in the Channel
2.5
21
v
E (eV)
1.5
Hole Concentration (cm )
Drain
-3
HJMOSFET
HMHJT
Si
2
10
V =V =-2V
1
DS
GS
1nm from the surface
0.5
Source
Channel
0
-0.5
-0.05
20
10
HJMOSFET
HMHJT
Si
V =V =-2V
DS
GS
19
10
18
10
0
0.05
0.1
Distance along the channel (µ
µm)
0.15
-0.05
0
0.05
0.1
Distance along the channel(µ
µm)
0.15
41
Subthreshold and Output Characteristics for HMHJT
-8
-3
10
-6
-5
ID (mA)
ID (A)
10
Si control
HMHJT
-7
10
-9
10
Si control device
HMHJT
-7
V = -0.1, -0.6, -1.1, -1.6 V
V -V =0, -0.5, -1, -1.5, -2V
G T
-5
-4
-3
-2
DS
-1
-11
10
-3
-2.5
-2
-1.5
V (V)
GS
-1
-0.5
0
0
-2
-1.5
-1
V (V )
-0.5
0
DS
42
Process Issues
• STI edge leakage can be increased by SiGe buffer.
• B diffusion enhanced by tensile strain; compressive retards it.
Ge retards B and enhances As/P diffusion in SiGe buffer.
• Need higher doping in channel due to reduced bandgapnegates some advantages of strain
43
Defects in Strained Si
44
Takagi, et. al, IEDM 2003
45
Device Metrics
• Speed
• τ = Cload VDD / Id
• Power
• P = f Cload VDD2
• Saturation current
• IDSAT = (W/2L) (krkoA) (TEOT,INV)-1 µ (VG-VT)2
• Consider VG ⇒ VDD
• Transconductance
• gm = (W/L) (krkoA) (TEOT,INV)-1 µ VDSAT
• Off-state power
• Subthreshold swing and source/drain junction leakage
46