DG411/412/413
Vishay Siliconix
Precision Monolithic Quad SPST CMOS Analog Switches
FEATURES
BENEFITS
APPLICATIONS
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
44-V Supply Max Rating
"15-V Analog Signal Range
On-Resistance—rDS(on): 25 Fast Switching—tON: 110 ns
Ultra Low Power—PD: 0.35 W
TTL, CMOS Compatible
Single Supply Capability
Widest Dynamic Range
Low Signal Errors and Distortion
Break-Before-Make Switching Action
Simple Interfacing
Precision Automatic Test Equipment
Precision Data Acquisition
Communication Systems
Battery Powered Systems
Computer Peripherals
DESCRIPTION
The DG411 series of monolithic quad analog switches was
designed to provide high speed, low error switching of
precision analog signals. Combining low power (0.35 W) with
high speed (tON: 110 ns), the DG411 family is ideally suited for
portable and battery powered industrial and military
applications.
Each switch conducts equally well in both directions when on,
and blocks input voltages up to the supply levels when off.
The DG411 and DG412 respond to opposite control logic as
shown in the Truth Table. The DG413 has two normally open
and two normally closed switches.
To achieve high-voltage ratings and superior switching
performance, the DG411 series was built on Vishay Siliconix’s
high voltage silicon gate process. An epitaxial layer prevents
latchup.
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG411
DG411
Dual-In-Line and SOIC
LCC
D1 IN1 NC IN2 D2
IN1
1
16
IN2
D1
2
15
D2
S1
3
14
S2
S1
4
18
S2
V–
4
13
V+
V–
5
17
V+
GND
5
12
VL
NC
6
16
NC
GND
7
15
VL
S4
8
14
S3
S4
6
11
S3
D4
7
10
D3
IN4
8
9
IN3
Top View
Key
3
9
2
10
1
11
20
12
19
TRUTH TABLE
Logic
DG411
DG412
0
ON
OFF
1
OFF
ON
Logic “0” v 0.8 V
Logic “1” w 2.4 V
13
D4 IN4 NC IN3 D3
Top View
Document Number: 70050
S-52433—Rev. D, 06-Sep-99
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1
DG411/412/413
Vishay Siliconix
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG413
DG413
Dual-In-Line and SOIC
LCC
IN1
1
16
IN2
D1
2
15
D2
S1
3
14
S2
V–
4
13
V+
GND
5
12
VL
S4
6
11
S3
D4
7
10
D3
IN4
8
9
IN3
D1
Key
3
IN1 NC IN2
2
1
20
D2
TRUTH TABLE
19
S1
4
18
S2
Logic
SW1, SW4
V–
5
17
V+
0
OFF
ON
NC
6
16
NC
1
ON
OFF
GND
7
15
VL
S4
8
14
S3
9
10
D4
11
12
IN4 NC IN3
Top View
SW2, SW3
Logic “0” v 0.8 V
Logic “1” w 2.4 V
13
D3
Top View
ORDERING INFORMATION
Temp Range
Package
Part Number
DG411/412
DG411DJ
–40 to 85_C
16-Pin Plastic DIP
DG412DJ
DG411DY
–40 to 85_C
16-Pin Narrow SOIC
DG412DY
DG411AK, DG411AK/883, 5962-9073101MEA
16-Pin CerDIP
–55 to 125_C
_
DG412AK, DG412AK/883, 5962-9073102MEA
DG411AZ/883, 5962-9073101M2A
LCC-20
5962-9073102M2A
DG413
–40 to 85_C
_
16-Pin Plastic DIP
DG413DJ
16-Pin Narrow SOIC
DG413DY
–55 to 125_C
_
16-Pin CerDIP
LCC-20
DG413AK, DG413AK/883, 5962-9073103MEA
5962-9073103M2A
ABSOLUTE MAXIMUM RATINGS
V+ to V– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 V
GND to V– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 V
VL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (GND –0.3 V) to (V+) +0.3 V
Digital Inputsa, VS, VD . . . . . . . . . . . . . . . . . . . . . . . . . . (V–) –2 V to (V+) +2 V
or 30 mA, whichever occurs first
Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA
Peak Current, S or D (Pulsed 1 ms, 10% Duty Cycle) . . . . . . . . . . . . 100 mA
Storage Temperature
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2
(AK, AZ Suffix) . . . . . . . . . . . . . . –65 to 150_C
(DJ, DY Suffix) . . . . . . . . . . . . . . –65 to 125_C
Power Dissipation (Package)b
16-Pin Plastic DIPc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
16-Pin Narrow SOICd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
16-Pin CerDIPe . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LCC-20e . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
470 mW
600 mW
900 mW
900 mW
Notes:
a. Signals on SX, DX, or INX exceeding V+ or V– will be clamped by internal
diodes. Limit forward diode current to maximum current ratings.
b. All leads welded or soldered to PC Board.
c. Derate 6 mW/_C above 25_C
d. Derate 7.6 mW/_C above 75_C
e. Derate 12 mW/_C above 75_C
Document Number: 70050
S-52433—Rev. D, 06-Sep-99
DG411/412/413
Vishay Siliconix
SPECIFICATIONSa
Test Conditions
Unless Specified
Parameter
Symbol
V+ = 15 V, V– = –15 V
VL = 5 V, VIN = 2.4 V, 0.8 Vf
Tempb
Typc
A Suffix
D Suffix
–55 to 125_C
–40 to 85_C
Mind
Maxd
Mind
Maxd
Unit
–15
15
–15
15
V
35
45
Analog Switch
Analog Signal Rangee
Drain-Source
On-Resistance
Switch Off
Leakage Current
VANALOG
rDS(on)
IS(off)
ID(off)
Full
V+ = 13.5 V, V– = –13.5 V
IS = –10 mA, VD = "8.5 V
V+ = 16.5, V– = –16.5 V
VD = "15.5 V, VS = #15.5 V
Room
Full
25
35
45
Room
Full
"0.1
–0.25
–20
0.25
20
–0.25
–5
0.25
5
Room
Full
"0.1
–0.25
–20
0.25
20
–0.25
–5
0.25
5
ID(on)
V+ = 16.5 V, V– = –16.5 V
VS = VD = "15.5 V
Room
Full
"0.1
–0.4
–40
0.4
40
–0.4
–10
0.4
10
Input Current, VIN Low
IIL
VIN Under Test = 0.8 V
Full
0.005
–0.5
0.5
–0.5
0.5
Input Current, VIN High
IIH
VIN Under Test = 2.4 V
Full
0.005
–0.5
0.5
–0.5
0.5
Room
Full
110
175
240
175
220
Room
Full
100
145
160
145
160
25
Channel On
Leakage Current
nA
Digital Control
A
Dynamic Characteristics
Turn-On Time
tON
Turn-Off Time
tOFF
Break-Before-Make
Time Delay
Charge Injection
RL = 300 , CL = 35 pF
VS = "10 V See Figure 2
tD
DG413 Only, VS = 10 V
RL = 300 , CL = 35 pF
Room
Q
Vg = 0 V, Rg = 0 , CL = 10 nF
Room
5
Room
68
Room
85
Off Isolatione
OIRR
Channel-to-Channel Crosstalke
XTALK
RL = 50 , CL = 5 pF,
f = 1 MHz
Source Off Capacitancee
CS(off)
Room
9
Drain Off Capacitancee
CD(off)
Room
9
CD(on)
Room
35
Positive Supply Current
I+
Room
Full
0.0001
Negative Supply Current
I–
Room
Full
–0.0001
Room
Full
0.0001
Room
Full
–0.0001
Channel On
Capacitancee
f = 1 MHz
ns
pC
dB
pF
Power Supplies
Logic Supply Current
Ground Current
Document Number: 70050
S-52433—Rev. D, 06-Sep-99
IL
IGND
V+ = 16.5, V– = –16.5 V
VIN = 0 or 5 V
1
5
–1
–5
1
5
–1
–5
1
5
–1
–5
1
5
A
–1
–5
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DG411/412/413
Vishay Siliconix
SPECIFICATIONSa FOR UNIPOLAR SUPPLIES
Test Conditions
Unless Specified
Parameter
V+ = 12 V, V– = 0 V
VL = 5 V, VIN = 2.4 V, 0.8 Vf
Symbol
Tempb
Typc
A Suffix
D Suffix
–55 to 125_C
–40 to 85_C
Mind
Maxd
Mind
Maxd
Unit
12
12
V
Analog Switch
Analog Signal Rangee
VANALOG
Drain-Source
On-Resistance
Full
V+ = 10.8 V, IS = –10 mA
VD = 3 V, 8 V
rDS(on)
Room
Full
40
80
100
80
100
Room
Hot
175
250
400
250
315
Room
Hot
95
125
140
125
140
Dynamic Characteristics
Turn-On Time
tON
Turn-Off Time
tOFF
RL = 300 , CL = 35 pF
VS = 8 V, See Figure 2
Break-Before-Make
Time Delay
tD
DG413 Only, VS = 8 V,
RL = 300 , CL = 35 pF
Room
25
Charge Injection
Q
Vg = 6 V, Rg = 0 , CL = 10 nF
Room
25
ns
pC
Power Supplies
Positive Supply Current
I+
Room
Hot
0.0001
Negative Supply Current
I–
Room
Hot
–0.0001
Logic Supply Current
IL
Room
Hot
0.0001
IGND
Room
Hot
–0.0001
V+ = 13.5, VIN = 0 or 5 V
Ground Current
1
5
1
5
–1
–5
–1
–5
1
5
A
1
5
–1
–5
–1
–5
Notes:
a. Refer to PROCESS OPTION FLOWCHART.
b. Room = 25_C, Full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f.
VIN = input voltage to perform proper function.
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
On-Resistance vs. VD and Power Supply Voltage
On-Resistance vs. VD and Unipolar Supply Voltage
300
TA = 25_C
45
"5 V
VL = 5 V
250
40
35
V DS(on) ( )
r DS(on)– Drain-Source On-Resistance ( )
50
"8 V
30
"10 V
25
"12 V
"15 V
20
200
150
V+ = 5 V
100
15
"20 V
8V
10
15 V
5
20 V
0
–20
–15
–10
–5
0
5
VD – Drain Voltage (V)
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12 V
50
0
4
V+ = 3 V
VL = 3 V
10
15
20
0
2
4
6
8
10
12
14
16
18
20
VD – Drain Voltage (V)
Document Number: 70050
S-52433—Rev. D, 06-Sep-99
DG411/412/413
Vishay Siliconix
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
Leakage Current vs. Analog Voltage
ID, IS Leakages vs. Temperature
40
30
V+ = 15 V
V– = –15 V
VL = 5 V
TA = 25_C
20
I S, I D (pA)
10
r DS(on)– Drain-Source On-Resistance ( )
35
ID(off)
0
IS(off)
–10
ID(on)
–20
–30
–40
–50
–60
–15
–10
–5
0
5
10
V+ = 15 V
V– = –15 V
VL = 5 V
30
125_C
25
85_C
20
25_C
15
–55_C
10
5
–15
15
–10
VD or VS — Drain or Source Voltage (V)
–5
0
5
10
15
VD – Drain Voltage (V)
Charge Injection vs. Analog Voltage
Charge Injection vs. Analog Voltage
100
140
V+ = 15 V
V– = –15 V
VL = 5 V
80
V+ = 15 V
V– = –15 V
VL = 5 V
120
100
CL = 10 nF
60
80
60
CL = 10 nF
Q (pC)
Q (pC)
40
20
CL = 1 nF
40
20
0
0
CL = 1 nF
–20
–20
–40
–40
–60
–60
–15
–10
–5
0
5
10
–15
15
–10
VS – Source Voltage (V)
Input Switching Threshold vs. Supply Voltage
5
10
15
Switching Time vs. Temperature
240
210
3.0
VL = 7.5 V
2.0
6.5 V
1.5
1.0
5.5 V
4.5 V
0.5
t ON, t OFF (ns)
180
2.5
V TH (V)
0
VD – Drain Voltage (V)
3.5
V+ = 15 V
V– = –15 V
VL = 5 V
VS = 10 V
150
tON
120
tOFF
90
60
30
0
(V+) 5
–5
0
10
15
20
25
30
35
40
–55 –35
–15
5
25
45
65
85
105 125
Temperature (_C)
Document Number: 70050
S-52433—Rev. D, 06-Sep-99
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5
DG411/412/413
Vishay Siliconix
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
Supply Current vs. Input Switching Frequency
100 mA
V+ = 15 V
V– = –15 V
VL = 5 V
10 mA
= 1 SW
= 4 SW
1 mA
I SUPPLY
I+, I–
100 mA
10 mA
IL
1 mA
100 nA
10 nA
10
100
1k
10 k
100 k
1M
10 M
f – Frequency (Hz)
SCHEMATIC DIAGRAM (TYPICAL CHANNEL)
V+
S
VL
V–
Level
Shift/
Drive
VIN
V+
GND
D
V–
FIGURE 1.
TEST CIRCUITS
+5 V
+15 V
Logic
Input
tr <20 ns
tf <20 ns
3V
50%
0V
VL
"10 V
V+
S
tON
D
VO
Switch
Input*
VS
VO
IN
GND
RL
300 V–
CL
35 pF
Switch
Input*
–15 V
0V
tON
90%
VO
–VS
*VS = 10 V for tON, VS = –10 V for tOFF
CL (includes fixture and stray capacitance)
VO = VS
Switch
Output
90%
RL
Note:
RL + rDS(on)
Logic input waveform is inverted for switches that
have the opposite logic sense control
FIGURE 2. Switching Time
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Document Number: 70050
S-52433—Rev. D, 06-Sep-99
DG411/412/413
Vishay Siliconix
TEST CIRCUITS
+5 V
+15 V
Logic
Input
VL
V+
S1
VS1
D1
Switch
Output
IN2
RL1
300 V–
GND
90%
VO2
D2
S2
VS2
50%
0V
VS1
VO1
VO1
IN1
3V
RL2
300 CL1
35 pF
CL2
35 pF
Switch
Output
0V
VS2
VO2
0V
90%
tD
tD
–15 V
CL (includes fixture and stray capacitance)
FIGURE 3. Break-Before-Make (DG413)
VO
Rg
+5 V
+15 V
VL
V+
S
VO
INX
OFF
D
IN
Vg
ON
OFF
VO
CL
10 nF
3V
V–
GND
INX
OFF
ON
Q = VO x CL
OFF
INX dependent on switch configuration Input polarity determined
by sense of switch.
–15 V
FIGURE 4. Charge Injection
C
+5 V
VL
S1
VS
Rg = 50 +15 V
C
V+
D1
50 IN1
0V, 2.4 V
S2
D2
VO
NC
0V, 2.4 V
RL
IN2
GND
XTALK Isolation = 20 log
V–
C
VS
VO
–15 V
C = RF bypass
FIGURE 5. Crosstalk
Document Number: 70050
S-52433—Rev. D, 06-Sep-99
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DG411/412/413
Vishay Siliconix
TEST CIRCUITS
+5 V
+15 V
C
C
VL
V+
S
VS
+15 V
C
VO
D
C
VL
Rg = 50 0V, 2.4 V
+5 V
V+
S
RL
50 IN
Meter
GND
V–
IN
C
HP4192A
Impedance
Analyzer
or Equivalent
0 V, 2.4 V
D
–15 V
GND
Off Isolation = 20 log
V–
VS
C
VO
C = RF Bypass
–15 V
FIGURE 6. Off Isolation
FIGURE 7. Source/Drain Capacitances
APPLICATIONS
Single Supply Operation:
Summing Amplifier
The DG411/412/413 can be operated with unipolar supplies
from 5 V to 44 V. These devices are characterized and tested
for unipolar supply operation at 12 V to facilitate the majority
of applications. In single supply operation, V+ is tied to VL and
V– is tied to 0 V. See Input Switching Threshold vs. Supply
Voltage curve for VL versus input threshold requirments.
When driving a high impedance, high capacitance load such
as shown in Figure 8, where the inputs to the summing
amplifier have some noise filtering, it is necessary to have
shunt switches for rapid discharge of the filter capacitor, thus
preventing offsets from occurring at the output.
R1
R2
VIN 1
C1
R5
R3
R4
VIN 2
–
VOUT
+
C2
R6
DG413
FIGURE 8. Summing Amplifier
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Document Number: 70050
S-52433—Rev. D, 06-Sep-99