1
Modelling hybrid modulation strategy with nearest levelled vector switching
2
pattern in space vector control technique for multilevel inverters
3
Rohith Balaji JONNALA*, Sai Babu CHOPPAVARAPU
4
Department of Electrical and Electronics Engineering, UCEK, Jawaharlal Nehru
5
Technological University Kakinada, Kakinada-533003, Andhra Pradesh, India.
6
*E-mail: rohithbalajijonnala@yahoo.com / researchscholar201@jntuk.edu.in
7
Abstract: The Multilevel Inverter’s impact in the area of Power Electronics is
8
augmented because of its nimble nature. This paper presents an efficient switching
9
pattern for multilevel inverters using Nearest Levelled Vector (NLV) strategy through
10
Space Vector Control technique. The objective is to reduce the total harmonic
11
distortions by generating optimal switching sequence with newly introduced NLV-SVC
12
for multilevel inverters. The proposed NLV modulation is applied for asymmetrical
13
multilevel inverter, which has high number of levels with reduced switch count, sources
14
and lower switching losses. The effectiveness of proposed method is verified on a 27-
15
Level 3-Cell asymmetrical multilevel inverter. The efficacy of proposed method in
16
terms of total harmonic distortions is compared with the existing Nearest Vector
17
Control (NVC) modulation strategy. Implementation and experimental verification of
18
Proposed NLV-SVC modulation strategy for Asymmetrical Cascaded H-Bridge
19
Multilevel Inverter is presented for the real-time validation with the comparison of
20
NVC Modulation strategy.
21
Key words: Asymmetrical multilevel inverter, space vector control, nearest levelled
22
vector modulation, switching pattern, better THD.
1
1
Modelling hybrid modulation strategy with nearest levelled vector switching
2
pattern in space vector control technique for multilevel inverters
3
Abstract: The Multilevel Inverter’s impact in the area of Power Electronics is
4
augmented because of its nimble nature. This paper presents an efficient switching
5
pattern for multilevel inverters using Nearest Levelled Vector (NLV) strategy through
6
Space Vector Control technique. The objective is to reduce the total harmonic
7
distortions by generating optimal switching sequence with newly introduced NLV-SVC
8
for multilevel inverters. The proposed NLV modulation is applied for asymmetrical
9
multilevel inverter, which has high number of levels with reduced switch count, sources
10
and lower switching losses. The effectiveness of proposed method is verified on a 27-
11
Level 3-Cell asymmetrical multilevel inverter. The efficacy of proposed method in
12
terms of total harmonic distortions is compared with the existing Nearest Vector
13
Control (NVC) modulation strategy. Implementation and experimental verification of
14
Proposed NLV-SVC modulation strategy for Asymmetrical Cascaded H-Bridge
15
Multilevel Inverter is presented for the real-time validation with the comparison of
16
NVC Modulation strategy.
17
Key words: Asymmetrical multilevel inverter, space vector control, nearest levelled
18
vector modulation, switching pattern, better THD.
19
1
20
The escalation of qualitative power requirement raises the opportunities to the arrival of
21
many contemporary power converter topologies which are capable of machinate all
22
needed power. Either to improve the quality of signal or to reduce energy wastage, an
23
adequate power electronic technologies and its associated control strategies.
24
Nowadays Multilevel inverters are becoming popular in various power applications as
Introduction
2
1
they are capable to reach high power applications using advanced medium power
2
semiconductor devices [1]. The nature of multilevel inverter and proper modulation
3
strategies are essential to find an improvement in nominal power in the converter and
4
output signal quality [2,3]. The load side voltage waveform with effective modulation
5
improves its nature of quality with the increase in the number of levels intern reduces
6
the Total Harmonic Distortion (THD) [3,4] at the output of the converter. A hybrid
7
asymmetrical multilevel inverter which gives higher voltage levels than the
8
conventional asymmetrical multilevel inverter topologies is considered in this paper.
9
Multilevel converter’s modulation and control strategies are gaining more attention by
10
researchers over the last few years. The modulation strategies used for multilevel
11
inverters can be classified based on switching frequency as shown in Figure 1 [5,6].
12
Among all control strategies from the classification, an extremely accepted strategy for
13
industrial application namely standard carrier-based Sinusoidal Pulse Width Modulation
14
that uses the phase shifting strategy to reduce the harmonics in the output voltage signal.
15
The other alternative captivating strategy is Space Vector Modulation, which has been
16
used in multilevel inverters with low switching frequency. One of the representatives of
17
this family is the Space Vector Control (SVC); in this modulation the output voltage
18
signal is generated like staircase waveform [7]. Along with the progress of multilevel
19
inverter topologies, there is a need to extend the traditional modulation techniques for
20
the reliable operation. Though, huge number of multilevel inverter topologies are
21
available but the modulation strategies are limited and hence, there is a need to enhance
22
traditional modulation techniques for reliable operation of recently developed
23
converters [8,9].
24
The two main categories of modulation strategies are Space Vector oriented and Level
3
1
based modulation techniques. Both these strategies have their own forte to elevate in
2
different areas of applications. In open loop operation, there is no such contest between
3
these Vector oriented and Level based strategies. In closed loop operation, the major
4
control methodologies are based on vectors or samples for the optimal control actions.
5
Among the two control methodologies (vector or sample); Vector based modulation
6
techniques such as SVM and SVC have more desirability in the closed loop operations.
7
Though SVM is widely used and reached a certain state of influence in multi-level
8
applications, it is very difficult to implement and design for converter with a higher
9
number of levels due to the complexity in computation of switching angles. In this
10
operating situation, other low switching frequency related strategies are more
11
convenient such as multi-level SVC. It has the advantage of more number of voltage
12
vectors generated by a converter with respect to different levels by approximating the
13
reference signal to the nearest generatable space vector. This SVC or NVC principle
14
gives the output with fundamental switching frequency and hence low switching losses.
15
1.1
16
In this strategy, the voltage vectors are simply selected by approximating the reference
17
signal to the adjacent vectors in the operating zone of space hexagon without any
18
operational conditions like other strategies. Therefore, this strategy is specified as the
19
closest vector control method in place of closest vector modulation strategy [3,5-7]. The
20
operating principle of NVC is shown in Figure 2, where all the selected state of a
21
control vectors of Space Vector strategy for 11-level converter with over modulated
22
reference is illustrated. The over modulated SVM strategy is used for general practice,
23
in view of getting the maximum effective output voltage of converter. The selection of
24
voltage vectors changes with the change in modulation index. Each and every dot as
Nearest vector control
4
1
shown in Figure 2 is one of the feasible voltage control vector generated by the inverter,
2
all of these dots are covered by a hexagon which represents the boundary of the area
3
where there is a closest available voltage vector [8-10]. The dashed line shown in Figure
4
2 is the control voltage reference trajectory and it is passes through the d-q plane.
5
Hence, when the required signal come into any hexagon, the respective control vectors
6
are selected according to the illustrative logic in Figure 2 of NVC strategy.
7
Some of the researchers concentrated on the NVC strategy in the view of cell wise
8
modifications of modulation in asymmetrical multilevel inverters and some
9
modifications are made with the level of the reference signal and it is called as Nearest
10
Level Control [11]. This NLC is not in the Space Vector oriented strategy, but the
11
quality of the output signal and straightforwardness of the control strategy are better
12
than NVC, because of approximate reference signal generation in output side. In vector
13
based modulations, the fundamental selection of the nearest control vector gives a better
14
reduction in the commutations number. Those reduced commutations reflects the
15
reduction in switching losses, this strategy does not avoid low-order harmonic
16
distortions because of its operating nature of strategy. The Nearest Vector Control has
17
predetermined operating principle for a fixed load condition and very easy to
18
implement. However, the computation of the nearest vectors for the required load is not
19
simple in nature because this algorithm is needed to find the closest vector in numerical
20
form with NVC logic for the required conditions. In the view of application point of
21
reference, Vector oriented and Level based modulations have their own priorities in the
22
different areas of applications. Major control methodologies are based on vectors
23
oriented strategies for the desired control actions in closed-loop operation [6,11,12].
24
A new Hybrid Strategy for control operation based on the Space-Vector orientation is
5
1
presented in this paper. This modulation strategy operates at a very low switching
2
frequency and avoids grievances of the Space Vector based NVC strategy to get high-
3
quality signal on load side. The working principle and features of the proposed strategy
4
are discussed in Section 2.
5
2
6
Various multilevel converter modulation strategies have been introduced over the years,
7
including a comprehensive review of recent development in modulation techniques
8
[1,3,12], And different variations on Nearest Vector Control strategies are discussed in
9
section 1. The proposed modulation strategy is a combination of organized approach
10
with NVC and rounded Reference signal to improve the quality of signal in output side
11
of a multilevel inverter with Vector based approach.
12
The basic strategy of Space Vector Control united with the Space Vectors of hexagon
13
and Voltage vector of different levels. Figure 3 shows the voltage vectors at different
14
levels of Space vector regions and zones of each levels, blue and green circles are
15
represented the over modulation zones of 3 and 2 level Space Vector trajectories
16
respectively. Black circle indicates the linear modulated reference signal. If the required
17
signal is over modulated, the selected voltage vectors are the outer most vector of the 3-
18
level hexagon. Otherwise, the reference signal is within the black and green circles i.e.,
19
linearly modulated and here the selected voltage vectors are adjacent to the required
20
signal [7].
21
The output signal generated by the selected voltage vectors of SVC strategy is not
22
tracking the required signal, either in over or linear modulated zones. If the output does
23
not follow the required reference signal, the quality of the system is condensed. To
24
avoid this problem, a few alternative methodologies are raised. One of the popular
Proposed modulation strategy
6
1
alternatives is just follow the level of the reference to select the vectors [11], but it
2
violated the Space Vector Orientation. Another alternative is shifting the reference
3
signal by using ceil or floor function [13,14] at each sector’s duration. The approach
4
with ceil or floor function the approximation error is very high and unfair selection for a
5
particular sector like ith sector shown in Figure 4.
6
In Figure 4, a part of 3-level Space Vector Hexagon is illustrated. The levels j and j+1
7
are indicated with green and light green dashed lines separated by a sectional blue line.
8
The reference (Vref) signal is above the blue line in the (i+1)th and successive sectors.
9
At this position of reference, if the ceil function is used to select the adjacent vector the
10
approximation error is low and for floor it will be very high. In ith sector, the three
11
yellow dots indicate the different level positions of the reference with respect to
12
sectional line and they are represented as Case A/B/C. In Case A, B and C reference
13
signal is above, in and below to the sectional line, either of the alternative functions
14
gives wrong selection of vectors. To avoid all these constraints, Nearest Levelled Vector
15
Modulations approach and its methodology to select a vector and the pattern of
16
switching states are clearly discussed in Section 3.
17
3
18
For a particular closed loop application like machine control, NVC is the best strategy
19
to control the load for a required performance. The NVC strategy having less output
20
power quality than Level based strategies and these are having more complexity to
21
implement in closed loop systems than NVC. An algorithm is proposed to upgrade the
22
NVC strategy with rounded reference signal operating conditions for a better quality in
23
output. The proposed modulation is a combinational one or a hybrid modulation is
24
named with Nearest Levelled Vector (NLV)-SVC. This hybrid proposed strategy takes
Methodology for proposed strategy
7
1
all of the operating conditions of level oriented approach with better power quality in
2
Vector based operating conditions.
3
The flow diagram of a control algorithm is shown in Figure 5. Vref shown in Figure 4 is
4
the trajectory component of required space vectors in dq plane, Vv and Vh are the dq
5
components of the Vref. In the strategy, the approach for the selection of voltage vector
6
is based on the value of Vh with the reference position of either in leading edge (LEi) or
7
in trail edge (TEi) of the each sectors. In this approach the rounded function is used to
8
choose the future voltage vector (VF).
9
Vref = f (Vv and Vh)
10
Vv = (1/3) × (2Va-Vb-Vc) i.e., d component of Vref.
11
Vh = (1/sqrt(3)) × (Vb-Vc) i.e., q component of Vref.
12
Here Va, Vb and Vc are the abc components of Vref.
13
Lsk = fround (Vh) i.e., rounded value of Vh at preferred edge of sector. This Lsk
14
contains the values of either j-1, j and j+1 levels, that level of required signal is to be
15
generated in output side. In progressive path with the selected level decides the future
16
voltage vector. As shown in the Figure 4, the present sector is ith and the voltage vector
17
is A then the proposed strategy selects the j+1 level, the path moves from A to C,
18
otherwise it is j level then the path moves towards D. The clear explanation and digital
19
implementation of NLV-SVC strategy is as follows.
20
Primarily collect / read the value of level (l), i.e., l = 3N corresponding to the number of
21
sectors (ns), with the help of space voltage vector diagram, i.e., ns = 6 × ((l-1)/2). The
22
logic circuit or processor have the data of parameters ns and l for a required operation,
23
with this data present state of sector k (LEk /TEk) is calculated by using system clock; k
8
1
varies from 1 to ns. This k value depends on output frequency (fo) and ns, i.e., ns/fo gives
2
the value of time period of sector then processor will get the k value from 1 to ns by
3
comparing the system clock and time period of the sector. All the computed data from
4
the start pulse of clock, it is possible to calculate present state of level (Lsk) of inverter.
5
The required level of inverter at sector k i.e., Lsk = ns/6 × sin((k/ns) × 360) is useful to
6
generate appropriate pulses. This computational stage was the key operation of the
7
NLV-SVC.
8
The level is approximated in this strategy is with respect to a particular sector, i.e.,
9
calculating the p.u value of reference sinusoidal magnitude with the reference of clock
10
but it was segmented by sectors. Then rounded the Lsk value at a particular sector to the
11
nearest value, all the rounded Lsk value are stored at switching state table with respect to
12
sector k (LEk /TEk). The switching state table data is never changed until resets (or)
13
shutdowns the system process. The stored rounded Lsk values are transferred to pulse
14
generator with respect to sector k(LEk /TEk). The pulses are generated by the NLV-SVC
15
logic and transferred to Asymmetrical Cascaded H-Bridge multilevel inverter to get a
16
better output. This operation repeats with the help of switching state table (having
17
rounded Lsk values) until shutdown or resets the system. The selected voltage vectors
18
for the LEk or TEk is same, because trail edge of a one sector is leading edge of
19
successive sector. The 27-level Voltage Space Vectors are shown in Figure 6 in dq
20
plane and the red coloured dots are the selected Voltage Vectors by NLV-SVC
21
approach and the switching states pattern of the Proposed Modulation is Figure 7.
22
Simulation and Experimental implementation of the proposed NLV-SVC modulation
23
strategy to 3-Cell Asymmetrical Multilevel Inverter [9,10,15-17] is compared with the
9
1
NVC modulated results are presented and discussed in Section 4. The experimental
2
implementation and performance analysis of NLV-SVC and NVC modulation strategies
3
are carried out by the Low-Power (1 ) model. For comparison purpose, Low and
4
Medium (1 & 3 ) power model are simulated.
5
4
6
4.1
7
The simulated model of the 3-Cell Asymmetrical Multilevel Inverter shown in Figure 8
8
is designed with the parameters shown in Table 1. Both Low and Medium Power
9
models are equipped with 1:3:9 ratio related individual DC Sources to get asymmetrical
10
nature in construction and operation to analyze the performance of the NLV-SVC
11
modulation.
12
The proposed modulation technique NLV-SVC is a combination of Rounded reference
13
signal with NVC strategy. Then the comparisons like Implementation, Operation and
14
Performance analysis are done with NVC. The Low-Power model with NVC and NLV-
15
SVC modulation strategies related simulation results are shown in Figures 9-16. The
16
comparison of results for both the Low and the Medium (1
17
shown in Table 2.
18
Figures 9-12, are simulated results for the single phase Low-Power model with NVC
19
strategy. The 27-Level Voltage and Current waveforms are shown in Figure 9. The
20
Asymmetrical Multilevel Inverter is operated with different ratings of DC sources for
21
each conversion cells. These cells are operated in +ve region, -ve region and neutral or
22
freewheeling state to get a particular level in output side. The asymmetrical nature of
23
operation reflects the Low rated conversion cell have more changes in operating region
24
than High rated cell. This asymmetrical nature is also effects the switching frequency of
Results and analysis
Simulation results
& 3 ) Power models are
10
1
switches and power sharing of DC sources are different from one another of 3 Cells.
2
The individual voltage sources helps to avoid the cell balancing problem. The Switching
3
Pulses and Power of 3-Cells are shown in Figure 10 and 11 respectively. The spectral
4
analysis of NVC strategy based Line to Line Voltage wave of Low and Medium Power
5
models is shown in Figure 12.
6
Figures 13-16 are illustrates the simulated results for the single phase Low-Power
7
model with proposed NLV-SVC modulation strategy. The 27-Level Voltage and
8
Current waveforms are shown in Figure 13, with the comparison of NVC based voltage
9
and current waveforms as shown in Figure 9 the proposed NLV-SVC based voltage and
10
current signals has smooth and sinusoidal in nature.
11
The Switching Pulses and Power of 3 Cells are shown in Figures 14 and 15
12
respectively. Figure 16 shows the spectral analysis of Proposed NLV-SVC strategy
13
based Line to Line Voltage wave of Low and Medium Power models.
14
4.2
15
To implement, compare and validate the NLV-SVC strategy for 3-Cells of 27-Level
16
Asymmetrical Multilevel Inverter with Simulation, an Experimental model is designed
17
with reference to NVC strategies. The experimental single phase 3-Cell multilevel
18
inverter prototype is shown in Figure 17. Figure 18 shows the close view of Driver
19
circuit and Inverter.
20
The single IGBT with anti parallel diode module FGL40N120ANDC10JJ (1200V, 40A)
21
is selected for the design of the H-Bridge Cells. The prototype is controlled and
22
associated with the use of a high performance, standalone development platform Digital
23
Signal Processor (DSP) 150MHz TMS320F28335 from Texas instruments. The
Experimental results
11
1
parameters used in the experiment are the same as the parameters of Low-Power
2
simulated model.
3
NVC strategy based 27-Level Voltage waveforms and spectral analysis are shown in
4
Figures 19-21. Figure 19 illustrates the NVC based voltage waveform and also shows
5
duration of the 50Hz cycle of the NVC modulated 27-Level voltage wave. Figure 20
6
shows the clear view of 0-13 levels of NVC modulated inverter output voltage wave.
7
Spectral analysis of NVC modulated inverter output voltage signal is shown in Figure
8
21, and it is also indicated that the NVC strategy based voltage signal has 10.45% of
9
harmonic distortions.
10
Proposed NLV-SVC strategy based 27-Level Voltage waveforms and spectral analysis
11
are shown in Figures 22-25. Figure 22 illustrates the NLV-SVC based voltage
12
waveform and also shows the 50Hz cycle of the NLV-SVC modulated 27-Level voltage
13
wave. The comparison of Figures 19 & 22 will provide the illustrative information
14
about better performance of NLV-SVC modulation based voltage signal because it has
15
resemblance of sinusoidal wave. Figure 23 shows the clear view of 0-13 levels of NLV-
16
SVC modulated inverter output voltage wave. The Spectral analysis of Harmonic order
17
for the Proposed NLV-SVC and snapshot of measured window by Power Analyzer are
18
shown in Figure 24 and 25 respectively.
19
Table 3 gives the comparison of simulated and experimental values of NVC and NLV-
20
SVC strategies for Low-Power model with the load variation R and RL. Figure 26
21
shows a graphical comparison of spectral analysis for NVC and NLV-SVC.
22
5
23
The Simulation and Experimental results with 27-levels of 3-Cell Asymmetrical
24
Cascaded H-Bridge Multilevel Inverter prove that feasibility of the proposed NLV-SVC
Discussion
12
1
modulation strategy over NVC in implementation and better performance. The nearest
2
level is approximated at each and every sector’s duration to select a proper vector in
3
proposed strategy. Hence the harmonic distortions of the NVC are reduced with the new
4
approach, and this control algorithm can extended to any N-level inverter. Furthermore,
5
the NLV-SVC could be used not only with AS-CHB multilevel inverter but also with
6
other multilevel inverter configuration compatible of SVC strategy. The experimental
7
results show the compatibility of NVC and NLV-SVC modulation strategies to
8
implement for 3-Cell Asymmetrical Multilevel Inverter in real time applications.
9
The variations of performance parameter (THD) values for both NVC and NLV-SVC
10
strategies from simulation to experimentation are deviated about 3.9% and 1.98%
11
respectively. The NVC strategy based 27-level voltage waveform has less performance
12
with the reference of THD values measured by the simulation and experimentation than
13
NLV-SVC. Implementation of NLV-SVC for asymmetrical multilevel inverter exhibits
14
the features of high efficiency, compactness and high quality output signal with low
15
THD. Comparison with Simulation and Experimental results demonstrate the
16
dominance of the proposed NLV-SVC modulation strategy for the multilevel inverter
17
applications than other Vector based strategies.
18
Acknowledgement
19
The authors gratefully acknowledge the support provided by Jawaharlal Nehru
20
Technological University Kakinada, Andhra Pradesh and TEQIP Centrally Sponsored
21
Scheme through Ministry (HRD) of Govt. of India and also Shri Vishnu Engineering
22
College for Women’s (Autonomous), Bhimavaram.
13
1
References
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[10] Ding K, Cheng K W E, Zou Y P. Analysis of an asymmetrical modulation method
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for cascaded multilevel inverters. IET POWER ELECTRON 2011; 5: 74-85.
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15
1
Table 1. Simulation model parameters.
1V : 3V : 9V (3 Cells)
DC
3V : 9V : 27V
18V : 53V : 159V
Low-Power Model
Medium-Power Model
Voltages
= 10Ω, L = 25mH
Load
f0
50Hz
Switches
IGBT / D
Modulation Strategy
NVC & NLC
Max – Step Size
1e-6 Sec
2
3
Table 2. Comparison of THD for NVC and NLV-SVC strategies.
Fundamental Value
Modulation
VTHD (%)
Type of
(V)
Type of Model
Strategy
Phase
Low-Power
NVC
R load
RL load
R
RL
1-
40.08
40.08
6.55
6.55
1-
236.2
236.2
6.57
6.57
3-
409.1
409.1
5.53
5.53
1-
38.97
38.97
3.33
3.33
1-
229.5
229.5
3.34
3.34
3-
397.5
397.5
3.34
3.34
Medium-Power
Low-Power
NLV-SVC
Medium-Power
4
16
1
Table 3. Comparison between experimental / simulated values of THD for NVC and
2
NLV-SVC strategies.
VTHD (%)
Type of Analysis /
Model Parameters
R
Modulation Strategy
RL load
load
13-Cell, 27-Level
Simulation / NVC
6.55
6.55
Experimental / NVC
10.45
10.40
Simulation / NLV-SVC
3.33
3.33
Experimental / NLV-SVC
5.31
5.90
Asymmetrical (3:9:27V)
Multilevel Inverter with
Load (R = 10Ω, L = 25mH)
3
4
5
Figure 1. Classification of multilevel inverter's modulation strategies.
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1
2
Figure 2. Operating principle of NVC.
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4
Figure 3. 3-level voltage space vectors.
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Figure 4. Selection of voltage space vectors by the strategies.
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4
Figure 5. Control algorithm for nearest levelled vector technique.
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Figure 6. 27-level selected voltage space vectors by the proposed NLV-SVC.
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4
Figure 7. NLV-SVC switching state pattern.
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6
Figure 8. Asymmetrical CHB multilevel inverter.
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1
2
Figure 9. Output voltage and current waveforms for NVC.
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4
Figure 10. Gating pulses to asymmetrical multilevel inverter for NVC.
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6
Figure 11. Cell wise power sharing waveforms with NVC strategy.
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1
2
Figure 12. Simulated frequency spectrum of voltage signal for NVC strategy.
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4
Figure 13. Output voltage and current waveforms for NLV-SVC.
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1
2
Figure 14. Gating pulses to asymmetrical multilevel inverter for NLV-SVC.
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4
Figure 15. Cell wise power sharing waveforms with NLV-SVC strategy.
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6
Figure 16. Simulated frequency spectrum of voltage signal for NLV-SVC strategy.
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1
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Figure 17. Experimental setup of single phase 3-cell CHB multilevel inverter prototype.
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Figure 18. Close view of driver circuit and CHB multilevel inverter setup.
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Figure 19. Voltage waveform for NVC strategy based 27-level asymmetrical CHB
7
multilevel, 50 Hz cycle of NVC modulated voltage signal.
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1
2
Figure 20. Magnified view of levels (0-13) for NVC strategy.
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Figure 21. Spectral analysis of NVC strategy.
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6
Figure 23. Voltage waveform for NLV-SVC strategy based 27-level asymmetrical CHB
7
multilevel, 50 Hz cycle of NLV-SVC modulated voltage signal.
25
1
2
Figure 23. Magnified view of levels (0-13) for NLV-SVC strategy.
3
4
Figure 24. Spectral analysis of NLV-SVC strategy.
5
26
1
Figure 25. Snapshot of po er analy er’s harmonic measurement for NLV-SVC
2
strategy.
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4
Figure 26. Comparison of spectral analysis between NVC & NLV-SVC strategies.
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