Sourcing and Sinking Currents
Dc input modules can either be sources or sinks
for dc current. This depends on the the transistor
used in the input card and the polarity of the dc supply
Sinking
NPN
sinking
current
to ground
switch sinks
load current
Sourcing
equivalent
circuit
PNP
switch
sources
current
transistor sources current to load
et438b-9.ppt
1
Sourcing And Sinking Currents
NPN transistors are open collector I-sinking devices
Interfaces with sourcing input modules
PNP transistors are open collector I-sourcing devices
Interfaces with sinking input module
Sourcing
sensor
and sinking
input
module
sinking
sensor
with sourcing
module
note: polarity of
dc supply
et438b-9.ppt
2
Sourcing and Sinking Output
Modules
et438b-9.ppt
3
Relationship Between I/O
Hardware and Memory
Field I/O device is considered load. Must provide
sources of potential for I/O
I/O points mapped to memory by PLC software
Users must specifiy address when programming
Determined by I/O hardware addressing
et438b-9.ppt
4
PLC Data File Structures
Typical structure Allen-Bradley SLC500 Series
Memory structure
System
Memory
Application
memory
ROM
holds PLC Operating
system
File
ID
number
0
Output Image
1
Input Image
2
Status
3
Bit
4
Timer
5
Counter
6
Control
7
Integer
8
Reserved
9
10-255
et438b-9.ppt
5
Network Comm.
User defined
RAM
Holds user programs
and data files
I/O maps, programs
battery back-up
Bit, timer, counter,
integer data defined
by user
AB SLC 500 Data File Identifiers
File type
Output status
Input status
Process status
Bit file
Timer
Counter
Control
Integer
Float-pt
Interface
File ID
O
I
S
B
T
C
R
N
F
File Number
0
1
2
3
4
5
6
7
8
9
File 0 - Output image single memory words
15
14
13
12 11 10
9
8
7
6
5
4
3
2 1
0
addr.
Address depends on slot location of the Output card
and number of points
et438b-9.ppt
6
Output Image File
15
14
13
12 11 10
9
8
7
6
5
4
3
2 1
0
addr.
O:2
x
Invalid
O:5
x
O:6
x
x
Invalid
O:7
PLC has an 16 ouput card in slot 2
a 8 output card in slot 5, a 16 output card in slot 6
and a 8 output card in slot 7
Each card assigned a word, unused bits are not
addressable
File 1 - Input image single memory words
15
14
13
12 11 10
9
8
7
6
5
4
3
2 1
0
addr.
I:0
I:3
I:4
et438b-9.ppt
7
File 2 - Processor Status File
Contains information about how PLC and its
operating systen is functioning
Typical Information
monitoring and clearing hardware and software
faults
setting of watchdog timer value
runtime errors
I/O errors
average scan times
File 3 - The Bit File
Bit files used to represent control relays
that were used in electromechanical systems
15
14
13
12 11 10
9
8
7
6
5
4
3
2 1
0
addr.
B3:0
1
B3:1
B3:2
0
B3:3
B3:1/9
et438b-9.ppt
8
B3:2/8
Identifying individual bits
Timer File Structure and
Addressing
File 4 - Timers. Each timer requires 3
words of data file
Word 0 - control word I/O bits and Internal
control
Word 1 - preset value
Word 2 - accumulated value
15
14
EN
TT
13
0
DN
INTERNAL USE ONLY
Preset Value (PRE)
Accumulated Value (ACC)
0
1
2
EN - timer enabled bit
TT - timer timing bit
DN - timer done bit
Data Structure is the same for on-delay and off-delay
timers
et438b-9.ppt
9
Addressing Timer File Data
15
14
EN
TT
13
0
DN
INTERNAL USE ONLY
1
Preset Value (PRE)
Accumulated Value (ACC)
General form
Examples
Tf:e.s/b
timer
file #
element
default
4
T4:0/15 = C5:0/EN
0
2
bit
sub-element
timer 0; timer enabled bit
T4:1.ACC or C5:1.2 accumulated value of counter
T4:5/DN timer 5 done bit
T4:5.ACC/1 bit one of accumulated value of timer
5
T4:2/TT timer timing bit for counter 2
T20:2.PRE preset of a timer defined in a user
defined file area
et438b-9.ppt
10
Counter File Structure
File 5 - Counters
Each counter defined by three words in
data file
Word 0 - control word I/O bits and Internal
control
Word 1 - preset value
Word 2 - accumulated value
15
14
CU
CD
13
DN
0
OV
UN
UA
INTERNAL USE ONLY
Preset Value (PRE)
Accumulated Value (ACC)
0
1
2
CU - counter up enabled bit
CD - counter down enabled bit
DN - counter done bit
OV - counter overflow bit
UN - counter underflow bit
UA - update accumulated value (only certain models)
PRE - preset value
ACC -acculumulated value
et438b-9.ppt
11
Addressing Counter Data
15
14
CU
CD
13
DN
0
OV
UN
UA
INTERNAL USE ONLY
1
Preset Value (PRE)
Accumulated Value (ACC)
General form
file #
default
5
0
2
Cf:e.s/b
bit
element
sub-element
Examples
C5:0/15 = C5:0/CU
counter 0; count up bit
C5:1.ACC or C5:1.2 accumulated value of counter
C5:5/DN counter 5 done bit
C5:5.ACC/1 bit one of accumulated value of counter
5
C5:2/CD count down enable bit for counter 2
C20:2.PRE preset of a counter defined in a user
defined file area
et438b-9.ppt
12
Control File And Integer Files
File 6 -Control File
Used to store status information for bit operations
and stack control operations
File 7 - Integer File
Stores Integer data - one file location = one word
range depends on data type (signed or unsigned)
9
8
7
6
5
4
3
2 1
0
addr.
N7:0
45
N7:10
129
N7:20
N7:0/8
N7:10/7
File 8 - Float-point number data. numbers stored in
scientific notation in memory locations similar to
integer data. Only available on certain models
et438b-9.ppt
13
Basic Concept of PLC Ladder Logic
PLC ladder logic based on logical “continuity”
Symbols represent bits in data maps
All input symbols must test true for the output symbol
to be true
Boolean Equation
((1PB 2CR) + 3LS) 4CR 5CR = SOL A
Could program PLC in verbose language or use
ladder logic symbols.
Ladder logic used to reduce training of maintenance
personnel
et438b-9.ppt
14
Basic PLC Programming
Instructions
Bit or Relay Instructions
Examine if closed: XIC
examines an input
for closed condition
Examine if open: XIO
examines an input for
an open condtion
Logic of XIC
Input bit = 1
Evaluates TRUE pass
logical continuity
Input bit = 0
Evaluates FALSE block
logical continuity
Logic of XIO
Input bit = 1
Evaluates FALSE block
logical continuity
Input bit = 0
Evaluates TRUE pass
logical continuity
et438b-9.ppt
15
Output Instructions
Output Energize (OTE)
Instruction becomes true when
all instructions to rung become
true
Output latch and Output unlatch
Output latch become TRUE when
input rung instructions become TRUE
remains TRUE after rung becomes
FALSE
Ouput unlatch is used to reset the
ouput latch instruction
One Shot Instruction
OSR
Input that allows an event to occur
only once during a program scan
Instruction only responds to
rising hardware input signal
Responds to only FALSE to TRUE transitions
et438b-9.ppt
16
Rung Examples
What is the condition of the output instruction (T/F)
I:0
O:2
1
1746-OB16
0
1746-IA8
15
14
13
12 11 10
9
8
7
6
5
4
3
2 1
0
addr.
0 I:0
I:3
I:4
Input image table shows a 0 bit, so XIC evalues to a FALSE
rung is FALSE so OTE is FALSE This gives 0 in output image
15
14
13
12 11 10
9
8
7
6
5
4
3
2 1
0
addr.
O:0
0
O:2
O:4
et438b-9.ppt
17