The All-In
AD/AR Envelope Generator
Ian Fritz, July 2008
This novel envelope generator (EG) provides a versatile, cost-effective alternative to other designs. It will take
just about any signal you feed it and generate an envelope. For example, its main input can accept either a
trigger or a gate signal. Driven by a trigger pulse, the unit's output is an attack-decay (AD) envelope; driven by
a gate its output is an attack-release (AR) envelope. And you can even use a continuous signal like an LFO for
the gate! An auxilliary circuit produces a delayed, fixed-width pulse (monostable, or "Mono") which also drives
the EG circuitry. This pulse may be initiated by any signal with a positive-going 1.5 V crossing, for example, a
trigger pulse or a waveform from an LFO, noise source or chaos generator. A dedicated output jack for the
pulse generator allows other, independent, timing applications.
Schematic:
Circuit Board:
A circuit board layout for use with MOTM- or dotcom-style panels is pictured below. The board is double sided
with overall dimensions of 5.63" x 1.5". Mounting hole separations are 5.37". A diagram showing the I/O
pinouts and power supply wiring is also given.
Component List:
ICs:
A1
U1
U2
TL071 or similar
TL074 or similar
556 CMOS dual timer (ICM7556, etc.)
Diodes:
D1-D8
D9
1N4148 or any DO35 Si signal diode
Indicator LED (your choice)
Resistors (all carbon or metal film 5% or better):
22 Ohm
R50, R51 (optional or substitute ferrite beads, PS decoupling)
1 kOhm
R9b, R10b, R19b, R20, R23b
1.8 kOhm R25
2.2 kOhm R5, R11, R12, R24
2.7 kOhm R17
10 kOhm R8, R14
22 kOhm R16
27 kOhm R2
47 kOhm
56 kOhm
100 kOhm
390 kOhm
470 kOhm
1 MOhm
R6, R7
R18, R21
R13, R22
R4
R1, R3
R15
Pots (all log taper):
250 kOhm R9a
1 MOhm R10a, R19a, R23a
Caps (plastic or ceramic):
560 pF
C3, C5
.01 uF
C2, C4, C7
.22 Uf
C53
Caps (electrolytic):
2.2uF
C1, C6, C8
10 uF
C50, 51 (N.B., there is no C52)
Setup and Operation:
The circuit was designed and tested with +/-12 V power, but is expected to work properly at +/-15 V.
Be careful in mounting C1, C6 and C8 -- make sure the cap is across the gap and has the indicated polarity.
There are no adjustments or calibration.
To test operation, put first a trigger pulse and then a gate signal into the T/G input and check for the appropriate
AD or AR envelopes. Attack times should range up to ~1.5 sec, and decay time up to ~5 sec. Then feed the
Mono input with a trigger pulse or a slow LFO signal. Delay times and pulse widths should vary up to ~2.5 sec.
The LED indicator will light during the delay phase.
ADSR and other more complex envelopes are easily produced by mixing the outputs from several units. We
suggest four or so.
How it Works:
Most EG's use logic chips. This one uses opamps to perform the logic operations, giving more versatility.
Briefly: U1a is a latch, which is held high by R3 afer receiving Any Input signal -- trigger, gate or mono pulse.
When the output envelope reaches the peak of its attack phase, U1d switches low. This will reset the latch,
initiating the decay phase of an AD envelope, provided there are no input signals present. If a gate or mono
signal is present, the latch will not reset until that signal goes away. Once it does, the output decays, producing
an AR envelope.