LTC6404
600MHz, Low Noise,
High Precision Fully Differential
Input/Output Amplifier/Driver
FEATURES
DESCRIPTION
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The LTC®6404 is a family of AC precision, very low noise,
low distortion, fully differential input/output amplifiers
optimized for 3V, single supply operation.
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Fully Differential Input and Output
Low Noise: 1.5nV/√Hz RTI
Very Low Distortion:
LTC6404-1 (2VP-P , 10MHz): –91dBc
LTC6404-2 (2VP-P , 10MHz): –96dBc
LTC6404-4 (2VP-P , 10MHz): –101dBc
Closed-Loop –3dB Bandwidth: 600MHz
Slew Rate: 1200V/μs (LTC6404-4)
Adjustable Output Common Mode Voltage
Rail-to-Rail Output Swing
Input Range Extends to Ground
Large Output Current: 85mA (Typ)
DC Voltage Offset < 2mV (Max)
Low Power Shutdown
Tiny 3mm × 3mm × 0.75mm 16-Pin QFN Package
APPLICATIONS
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Differential Input A/D Converter Driver
Single-Ended to Differential Conversion/Amplification
Common Mode Level Translation
Low Voltage, Low Noise, Signal Processing
The LTC6404-1 is unity-gain stable. The LTC6404-2 is
designed for closed-loop gains greater than or equal to
2V/V. The LTC6404-4 is designed for closed-loop gains
greater than or equal to 4V/V. The LTC6404 closed-loop
bandwidth extends from DC to 600MHz. In addition to the
normal unfiltered outputs (OUT+ and OUT–), the LTC6404
has a built-in 88.5MHz differential single-pole lowpass
filter and an additional pair of filtered outputs (OUTF+,
OUTF–). An input referred voltage noise of 1.5nV/√Hz
make the LTC6404 able to drive state-of-the-art 16-/18-bit
ADCs while operating on the same supply voltage, saving
system cost and power. The LTC6404 is characterized, and
maintains its performance for supplies as low as 2.7V and
can operate on supplies up to 5.25V. It draws only 27.3mA,
and has a hardware shutdown feature which reduces current consumption to 250μA.
The LTC6404 family is available in a compact 3mm × 3mm
16-pin leadless QFN package and operates over a –40°C
to 125°C temperature range.
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
LTC6404-4 Distortion vs Frequency
Single-Ended Input to Differential Output
with Common Mode Level Shifting
–40
0.5VP-P
–50
0V
–60
100Ω
50Ω
402Ω
3V 0.1μF
71.5Ω
SIGNAL
GENERATOR
HD2, HD3 (dBc)
VS
1VP-P
+
1.5VDC
1.5VDC
VOCM
0.1μF
130Ω
–
1.5VDC
402Ω
1VP-P
6404 TA01
VCM = VOCM = MID-SUPPLY
VS = 3V
VOUT = 2VP-P
RI = 100Ω, RF = 402Ω
DIFFERENTIAL INPUT
SINGLE-ENDED INPUT
–70
–80
–90
HD2
–100
HD2
–110
–120
–130
0.1
HD3
HD3
1
10
FREQUENCY (MHz)
100
64044 G16
6404f
1
LTC6404
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
OUTF–
OUT–
IN+
NC
TOP VIEW
16 15 14 13
2
V–
3
VOCM
4
12 V–
11 V+
17
10 V+
9
5
6
7
8
OUTF+
V+
OUT+
1
NC
SHDN
IN–
Total Supply Voltage (V+ to V–) ................................5.5V
Input Voltage:
IN+, IN–, VOCM, SHDN (Note 2) ...................... V+ to V–
Input Current:
IN+, IN–, VOCM, SHDN (Note 2) ........................±10mA
Output Short-Circuit Duration (Note 3) ............ Indefinite
Output Current (Continuous):
(OUTF+, OUTF–) DC + ACRMS ...........................±40mA
Operating Temperature Range (Note 4).. –40°C to 125°C
Specified Temperature Range (Note 5) .. –40°C to 125°C
Junction Temperature ........................................... 150°C
Storage Temperature Range................... –65°C to 150°C
V–
UD PACKAGE
16-LEAD (3mm s 3mm) PLASTIC QFN
TJMAX = 150°C, θJA = 68°C/W, θJC = 4.2°C/W
EXPOSED PAD (PIN 17) IS V–, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
SPECIFIED TEMPERATURE RANGE
LTC6404CUD-1#PBF
LTC6404CUD-1#TRPBF
LCLW
16-Lead (3mm × 3mm) Plastic QFN
0°C to 70°C
LTC6404IUD-1#PBF
LTC6404IUD-1#TRPBF
LCLW
16-Lead (3mm × 3mm) Plastic QFN
–40°C to 85°C
LTC6404HUD-1#PBF
LTC6404HUD-1#TRPBF
LCLW
16-Lead (3mm × 3mm) Plastic QFN
–40°C to 125°C
LTC6404CUD-2#PBF
LTC6404CUD-2#TRPBF
LCLX
16-Lead (3mm × 3mm) Plastic QFN
0°C to 70°C
LTC6404IUD-2#PBF
LTC6404IUD-2#TRPBF
LCLX
16-Lead (3mm × 3mm) Plastic QFN
–40°C to 85°C
LTC6404HUD-2#PBF
LTC6404HUD-2#TRPBF
LCLX
16-Lead (3mm × 3mm) Plastic QFN
–40°C to 125°C
LTC6404CUD-4#PBF
LTC6404CUD-4#TRPBF
LCLY
16-Lead (3mm × 3mm) Plastic QFN
0°C to 70°C
LTC6404IUD-4#PBF
LTC6404IUD-4#TRPBF
LCLY
16-Lead (3mm × 3mm) Plastic QFN
–40°C to 85°C
LTC6404HUD-4#PBF
LTC6404HUD-4#TRPBF
LCLY
16-Lead (3mm × 3mm) Plastic QFN
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
6404f
2
LTC6404
LTC6404 DC ELECTRICAL CHARACTERISTICS +The l denotes
the specifications which apply over
–
the full operating temperature range, otherwise specifications are at TA = 25°C. V = 3V, V = 0V, VCM = VOCM = VICM = Mid-Supply,
VSHDN = OPEN, RL = OPEN, RBAL = 100k (See Figure 1). For the LTC6404-1: RI = 100Ω, RF = 100Ω. For the LTC6404-2: RI = 100Ω,
RF = 200Ω. For the LTC6404-4: RI = 100Ω, RF = 402Ω, unless otherwise noted. VS is defined (V+ – V–). VOUTCM = (VOUT+ + VOUT–)/2.
VICM is defined (VIN+ + VIN–)/2. VOUTDIFF is defined (VOUT+ – VOUT–). VINDIFF = (VINP – VINM)
SYMBOL
VOSDIFF
PARAMETER
Differential Offset Voltage (Input Referred)
ΔVOSDIFF/ΔT Differential Offset Voltage Drift (Input Referred)
Input Bias Current (Note 6)
IB
Input Bias Current Drift (Note 6)
ΔIB/ΔT
CONDITIONS
VS = 2.7V to 5.25V
VS = 2.7V to 5.25V
MIN
TYP
±0.5
1
MAX
±2
UNITS
mV
μV/°C
–60
–23
0.01
0
μA
μA/°C
±1
1000
3
1
1.5
3
±10
μA
kΩ
kΩ
pF
nV/√Hz
pA/√Hz
l
VS = 2.7V to 5.25V
VS = 2.7V to 5.25V
l
VS = 2.7V to 5.25V
Common Mode
Differential Mode
l
IOS
RIN
Input Offset Current (Note 6)
Input Resistance
CIN
en
in
enVOCM
Input Capacitance
Differential Input Referred Noise Voltage Density
Input Noise Current Density
Input Referred Common Mode Noise Voltage
Density
VICMR
(Note 7)
CMRRI
(Note 8)
Input Signal Common Mode Range
Input Common Mode Rejection Ratio
(Input Referred) ΔVICM/ΔVOSDIFF
VS = 3V, ΔVCM = 0.75V
VS = 5V, ΔVCM = 1.25V
60
60
nV/√Hz
nV/√Hz
nV/√Hz
V
V
dB
dB
CMRRIO
(Note 8)
PSRR
(Note 9)
PSRRCM
(Note 9)
Output Common Mode Rejection Ratio
(Input Referred) ΔVOCM/ΔVOSDIFF
Differential Power Supply Rejection
(ΔVS/ΔVOSDIFF)
Output Common Mode Power Supply Rejection
(ΔVS/ΔVOSCM)
VS = 5V, ΔVOCM = 1V
66
dB
GCM
BAL
VOSCM
f = 1MHz
f = 1MHz
f = 1MHz, Referred to VOCM Pin
LTC6404-1
LTC6404-2
LTC6404-4
VS = 3V
VS = 5V
9
10.5
27
l
l
0
0
1.6
3.6
VS = 2.7V to 5.25V
l
60
94
dB
VS = 2.7V to 5.25V
LTC6404-1
LTC6404-2
LTC6404-4
l
l
l
50
50
40
63
63
51
dB
dB
dB
Common Mode Gain (ΔVOUTCM/ΔVOCM)
VS = 5V, ΔVOCM = 1V
LTC6404-1
LTC6404-2
LTC6404-4
l
l
l
1
1
0.99
V/V
V/V
V/V
Common Mode Gain Error
VS = 5V, ΔVOCM = 1V
LTC6404-1
LTC6404-2
LTC6404-4
l
l
l
ΔVOUTDIFF = 2V, Single-Ended Input
LTC6404-1
LTC6404-2
LTC6404-4
Output Balance (ΔVOUTCM/ΔVOUTDIFF)
Common Mode Offset Voltage (VOUTCM – VOCM)
ΔVOUTDIFF = 2V, Differential Input
LTC6404-1
LTC6404-2
LTC6404-4
VS = 2.7V to 5.25V
LTC6404-1
LTC6404-2
LTC6404-4
–0.6
–0.6
–1.6
–0.125
–0.25
–1
0.1
0.1
–0.4
%
%
%
l
l
l
–60
–60
–53
–40
–40
–40
dB
dB
dB
l
l
l
–66
–66
–66
–40
–40
–40
dB
dB
dB
l
l
l
±10
±20
±40
±25
±50
±100
mV
mV
mV
6404f
3
LTC6404
LTC6404 DC ELECTRICAL CHARACTERISTICS +The l denotes
the specifications which apply over
–
the full operating temperature range, otherwise specifications are at TA = 25°C. V = 3V, V = 0V, VCM = VOCM = VICM = Mid-Supply,
VSHDN = OPEN, RL = OPEN, RBAL = 100k (See Figure 1). For the LTC6404-1: RI = 100Ω, RF = 100Ω. For the LTC6404-2: RI = 100Ω,
RF = 200Ω. For the LTC6404-4: RI = 100Ω, RF = 402Ω, unless otherwise noted. VS is defined (V+ – V–). VOUTCM = (VOUT+ + VOUT–)/2.
VICM is defined (VIN+ + VIN–)/2. VOUTDIFF is defined (VOUT+ – VOUT–). VINDIFF = (VINP – VINM)
SYMBOL
ΔVOSCM/ΔT
PARAMETER
Common Mode Offset Voltage Drift
VOUTCMR
(Note 7)
Output Signal Common Mode Range
(Voltage Range for the VOCM Pin)
RINVOCM
Input Resistance, VOCM Pin
VMID
VOUT
Voltage at the VOCM Pin
Output Voltage High, Either Output Pin (Note 10)
Output Voltage Low, Either Output Pin (Note 10)
ISC
Output Short-Circuit Current, Either Output Pin
(Note 11)
AVOL
VS
IS
Large-Signal Voltage Gain
Supply Voltage Range
Supply Current (LTC6404-1)
Supply Current (LTC6404-2)
Supply Current (LTC6404-4)
ISHDN
Supply Current in Shutdown (LTC6404-1)
Supply Current in Shutdown (LTC6404-2)
Supply Current in Shutdown (LTC6404-4)
CONDITIONS
VS = 2.7V to 5.25V
LTC6404-1
LTC6404-2
LTC6404-4
VS = 3V
LTC6404-1
LTC6404-2
LTC6404-4
VS = 5V
LTC6404-1
LTC6404-2
LTC6404-4
LTC6404-1
LTC6404-2
LTC6404-4
VS = 3V
VS = 3V, IL = 0mA
VS = 3V, IL = 5mA
VS = 3V, IL = 20mA
VS = 5V, IL = 0mA
VS = 5V, IL = 5mA
VS = 5V, IL = 20mA
VS = 3V, IL = 0mA
VS = 3V, IL = –5mA
VS = 3V, IL = –20mA
VS = 5V, IL = 0mA
VS = 5V, IL = –5mA
VS = 5V, IL = –20mA
VS = 2.7V
VS = 3V
VS = 5V
VS = 3V
VS = 2.7V, VSHDN = VS – 0.6V
VS = 3V, VSHDN = VS – 0.6V
VS = 5V, VSHDN = VS – 0.6V
VS = 2.7V, VSHDN = VS – 0.6V
VS = 3V, VSHDN = VS – 0.6V
VS = 5V, VSHDN = VS – 0.6V
VS = 2.7V, VSHDN = VS – 0.6V
VS = 3V, VSHDN = VS – 0.6V
VS = 5V, VSHDN = VS – 0.6V
VS = 2.7V, VSHDN = VS – 2.1V
VS = 3V, VSHDN = VS – 2.1V
VS = 5V, VSHDN = VS – 2.1V
VS = 2.7V, VSHDN = VS – 2.1V
VS = 3V, VSHDN = VS – 2.1V
VS = 5V, VSHDN = VS – 2.1V
VS = 2.7V, VSHDN = VS – 2.1V
VS = 3V, VSHDN = VS – 2.1V
VS = 5V, VSHDN = VS – 2.1V
MIN
TYP
MAX
±10
±20
±20
UNITS
μV/°C
μV/°C
μV/°C
l
l
l
1.1
1.1
1.1
2
2
1.7
V
V
V
l
l
l
4
4
3.7
32
20
10
V
V
V
l
l
l
1.1
1.1
1.1
15
8
4
l
1.45
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
±35
±40
±55
l
2.7
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
23.5
14
7
1.5
325
360
480
460
500
650
120
140
200
175
200
285
±60
±65
±85
90
27.2
27.3
27.8
29.7
29.8
30.4
30.0
30.2
31.0
0.22
0.25
0.35
0.22
0.25
0.35
0.28
0.30
0.50
1.55
550
600
750
700
750
1000
230
260
350
320
350
550
5.25
35.5
35.5
36.5
38.5
38.5
39.5
39
39
40
1
1
2
1
1
2
1.2
1.2
2.4
kΩ
kΩ
kΩ
V
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mA
mA
mA
dB
V
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
6404f
4
LTC6404
LTC6404 DC ELECTRICAL CHARACTERISTICS +The l denotes
the specifications which apply over
–
the full operating temperature range, otherwise specifications are at TA = 25°C. V = 3V, V = 0V, VCM = VOCM = VICM = Mid-Supply,
VSHDN = OPEN, RL = OPEN, RBAL = 100k (See Figure 1). For the LTC6404-1: RI = 100Ω, RF = 100Ω. For the LTC6404-2: RI = 100Ω,
RF = 200Ω. For the LTC6404-4: RI = 100Ω, RF = 402Ω, unless otherwise noted. VS is defined (V+ – V–). VOUTCM = (VOUT+ + VOUT–)/2.
VICM is defined (VIN+ + VIN–)/2. VOUTDIFF is defined (VOUT+ – VOUT–). VINDIFF = (VINP – VINM)
SYMBOL
VIL
VIH
RSHDN
tON
tOFF
PARAMETER
SHDN Input Logic Low
SHDN Input Logic High
SHDN Pin Input Impedance
Turn-On Time
Turn-Off Time
CONDITIONS
VS = 2.7V to 5V
VS = 2.7V to 5V
VS = 5V, VSHDN = 2.9V to 0V
VS = 3V, VSHDN = 0.5V to 3V
VS = 3V, VSHDN = 3V to 0.5V
MIN
TYP
MAX
V+ – 2.1
66
750
300
94
l
l
l
V+ – 0.6
38
UNITS
V
V
kΩ
ns
ns
LTC6404-1 AC ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply
over the full operating temperature range, otherwise specifications are at TA = 25°C. V+ = 3V, V– = 0V, VCM = VOCM = VICM = Mid-Supply,
VSHDN = OPEN, RI = 100Ω, RF = 100Ω, RL = 200Ω (See Figure 2) unless otherwise noted. VS is defined (V+ – V–).
VOUTCM = (VOUT+ + VOUT–)/2. VICM is defined as (VIN+ + VIN–)/2. VOUTDIFF is defined as (VOUT+ – VOUT–). VINDIFF = (VINP – VINM).
SYMBOL
SR
GBW
PARAMETER
Slew Rate
Gain-Bandwidth Product
f3dB
HDSEIN
–3dB Frequency (See Figure 2)
10MHz Distortion
HDDIFFIN
IMD10M
OIP310M
tS
NF
f3dBFILTER
10MHz Distortion
Third-Order IMD at 10MHz
f1 = 9.5MHz, f2 = 10.5MHz
OIP3 at 10MHz (Note 12)
Settling Time
2V Step at Output
Noise Figure, RS = 50Ω
Differential Filter 3dB Bandwidth (Note 13)
CONDITIONS
VS = 3V to 5V
VS = 3V to 5V, RI = 100Ω, RF = 499Ω,
fTEST = 500MHz
VS = 3V to 5V
VS = 3V, VOUTDIFF = 2VP-P
Single-Ended Input
2nd Harmonic
3rd Harmonic
VS = 3V, VOUTDIFF = 2VP-P
Differential Input
2nd Harmonic
3rd Harmonic
VS = 3V, VOUTDIFF = 2VP-P
1% Settling
0.1% Settling
0.01% Settling
f = 10MHz
l
MIN
TYP
450
500
MAX
UNITS
V/μs
MHz
300
600
MHz
–88
–91
dBc
dBc
–102
–91
–93
dBc
dBc
dBc
50
10
13
17
13.4
dBm
ns
ns
ns
dB
88.5
MHz
6404f
5
LTC6404
LTC6404-2 AC ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply
over the full operating temperature range, otherwise specifications are at TA = 25°C. V+ = 3V, V– = 0V, VCM = VOCM = VICM = Mid-Supply,
VSHDN = OPEN, RI = 100Ω, RF = 200Ω, RL = 200Ω (See Figure 2) unless otherwise noted. VS is defined (V+ – V–).
VOUTCM = (VOUT+ + VOUT–)/2. VICM is defined as (VIN+ + VIN–)/2. VOUTDIFF is defined as (VOUT+ – VOUT–). VINDIFF = (VINP – VINM).
SYMBOL
SR
GBW
PARAMETER
Slew Rate
Gain-Bandwidth Product
f3dB
HDSEIN
–3dB Frequency (See Figure 2)
10MHz Distortion
HDDIFFIN
IMD10M
OIP310M
tS
NF
f3dBFILTER
10MHz Distortion
Third-Order IMD at 10MHz
f1 = 9.5MHz, f2 = 10.5MHz
OIP3 at 10MHz (Note 12)
Settling Time
2V Step at Output
Noise Figure, RS = 50Ω
Differential Filter 3dB Bandwidth (Note 13)
CONDITIONS
VS = 3V to 5V
VS = 3V to 5V, RI = 100Ω, RF = 499Ω,
fTEST = 500MHz
VS = 3V to 5V
VS = 3V, VOUTDIFF = 2VP-P
Single-Ended Input
2nd Harmonic
3rd Harmonic
VS = 3V, VOUTDIFF = 2VP-P
Differential Input
2nd Harmonic
3rd Harmonic
VS = 3V, VOUTDIFF = 2VP-P
l
MIN
TYP
700
900
300
600
MHz
–95
–96
dBc
dBc
–98
–99
–100
dBc
dBc
dBc
53
9
12
15
10
88.5
dBm
ns
ns
ns
dB
MHz
1% Settling
0.1% Settling
0.01% Settling
f = 10MHz
MAX
UNITS
V/μs
MHz
LTC6404-4 AC ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply
over the full operating temperature range, otherwise specifications are at TA = 25°C. V+ = 3V, V– = 0V, VCM = VOCM = VICM = Mid-Supply,
VSHDN = OPEN, RI = 100Ω, RF = 402Ω, RL = 200Ω (See Figure 2) unless otherwise noted. VS is defined (V+ – V–).
VOUTCM = (VOUT+ + VOUT–)/2. VICM is defined as (VIN+ + VIN–)/2. VOUTDIFF is defined as (VOUT+ – VOUT–). VINDIFF = (VINP – VINM).
SYMBOL
SR
GBW
PARAMETER
Slew Rate
Gain-Bandwidth Product
f3dB
HDSEIN
–3dB Frequency (See Figure 2)
10MHz Distortion
HDDIFFIN
IMD10M
OIP310M
tS
NF
f3dBFILTER
10MHz Distortion
Third-Order IMD at 10MHz
f1 = 9.5MHz, f2 = 10.5MHz
OIP3 at 10MHz (Note 12)
Settling Time
2V Step at Output
Noise Figure, RS = 50Ω
Differential Filter 3dB Bandwidth (Note 13)
CONDITIONS
VS = 3V to 5V
VS = 3V to 5V, RI = 100Ω, RF = 499Ω,
fTEST = 500MHz
VS = 3V to 5V
VS = 3V, VOUTDIFF = 2VP-P
Single-Ended Input
2nd Harmonic
3rd Harmonic
VS = 3V, VOUTDIFF = 2VP-P
Differential Input
2nd Harmonic
3rd Harmonic
VS = 3V, VOUTDIFF = 2VP-P
1% Settling
0.1% Settling
0.01% Settling
f = 10MHz
l
MIN
TYP
1200
1700
MAX
UNITS
V/μs
MHz
300
530
MHz
–97
–98
dBc
dBc
–100
–101
–101
dBc
dBc
dBc
54
8
11
14
8
88.5
dBm
ns
ns
ns
dB
MHz
6404f
6
LTC6404
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The inputs IN+, IN– are protected by a pair of back-to-back diodes.
If the differential input voltage exceeds 1.4V, the input current should be
limited to less than 10mA. Input pins (IN+, IN–, VOCM and SHDN) are also
protected by steering diodes to either supply. If the inputs should exceed
either supply voltage, the input current should be limited to less than
10mA.
Note 3: A heat sink may be required to keep the junction temperature
below the absolute maximum rating when the output is shorted
indefinitely. Long-term application of output currents in excess of the
absolute maximum ratings may impair the life of the device.
Note 4: The LTC6404C/LTC6404I are guaranteed functional over the
operating temperature range –40°C to 85°C. The LTC6404H is guaranteed
functional over the operating temperature range –40°C to 125°C.
Note 5: The LTC6404C is guaranteed to meet specified performance from
0°C to 70°C. The LTC6404C is designed, characterized, and expected
to meet specified performance from –40°C to 85°C but is not tested or
QA sampled at these temperatures. The LTC6404I is guaranteed to meet
specified performance from –40°C to 85°C. The LTC6404H is guaranteed
to meet specified performance from –40°C to 125°C.
Note 6: Input bias current is defined as the average of the input currents
flowing into Pin 6 and Pin 15 (IN– and IN+). Input offset current is defined
as the difference of the input currents flowing into Pin 15 and Pin 6
(IOS = IB+ – IB–)
Note 7: Input common mode range is tested using the test circuit of
Figure 1 by measuring the differential gain with a ±1V differential output
with VICM = mid-supply, and with VICM at the input common mode range
limits listed in the Electrical Characteristics table, verifying the differential
gain has not deviated from the mid-supply common mode input case
by more than 1%, and the common mode offset (VOSCM) has not
deviated from the zero bias common mode offset by more than ±15mV
(LTC6404-1), ±20mV (LTC6404-2) or ±40mV (LTC6404-4).
The voltage range for the output common mode range is tested using the
test circuit of Figure 1 by applying a voltage on the VOCM pin and testing at
both mid-supply and at the Electrical Characteristics table limits to verify
that the the common mode offset (VOSCM) has not deviated by more than
±15mV (LTC6404-1), ±20mV (LTC6404-2) or ±40mV (LTC6404-4).
Note 8: Input CMRR is defined as the ratio of the change in the input
common mode voltage at the pins IN+ or IN– to the change in differential
input referred voltage offset. Output CMRR is defined as the ratio of the
change in the voltage at the VOCM pin to the change in differential input
referred voltage offset. These specifications are strongly dependent on
feedback ratio matching between the two outputs and their respective
inputs, and is difficult to measure actual amplifier performance. (See “The
Effects of Resistor Pair Mismatch” in the Applications Information section
of this data sheet. For a better indicator of actual amplifier performance
independent of feedback component matching, refer to the PSRR
specification.
Note 9: Differential power supply rejection (PSRR) is defined as the ratio
of the change in supply voltage to the change in differential input referred
voltage offset. Common mode power supply rejection (PSRRCM) is
defined as the ratio of the change in supply voltage to the change in the
common mode offset, VOUTCM – VOCM.
Note 10: This parameter is pulse tested. Output swings are measured as
differences between the output and the respective power supply rail.
Note 11: This parameter is pulse tested. Extended operation with the
output shorted may cause junction temperatures to exceed the 125°C limit
and is not recommended. See Note 3 for more details.
Note 12: Since the LTC6404 is a voltage feedback amplifier with low
output impedance, a resistive load is not required when driving an ADC.
Therefore, typical output power is very small. In order to compare the
LTC6404 with amplifiers that require 50Ω output loads, output swing of
the LTC6404 driving an ADC is converted into an “effective” OIP3 as if the
LTC6404 were driving a 50Ω load.
Note 13: The capacitors used to set the filter pole might have up to ±15%
variation. The resistors used to set the filter pole might have up to ±12%
variation.
6404f
7
LTC6404
LTC6404-1 TYPICAL PERFORMANCE CHARACTERISTICS
Active Supply Current vs
Temperature
30
Shutdown Supply Current vs
Temperature
29
VCM = VOCM = MID-SUPPLY
0.6
VS = 5V
27
26
0.4
VOSDIFF (mV)
VS = 2.7V
ICC (mA)
VS = 3V
0.3
VS = 3V
0.2
0.2
0
–0.2
–0.4
VS = 2.7V
–0.6
0.1
25
5 REPRESENTATIVE UNITS
VCM = VOCM = MID-SUPPLY
VS = 3V
0.8
0.4
VS = 5V
28
ICC (mA)
1.0
0.5
VCM = VOCM = MID-SUPPLY
Differential Voltage Offset (Input
Referred) vs Temperature
–0.8
24
–75 –50 –25
0
–75 –50 –25
0 25 50 75 100 125 150
TEMPERATURE (°C)
64041 G01
6
SHDN Supply Current vs Supply
Voltage and Temperature
0.5
30
VCM = VOCM =
MID-SUPPLY
+
25 SHDN = V
4
TA = 125°C
TA = 105°C
TA = 90°C
TA = 75°C
TA = 50°C
TA = 25°C
TA = –10°C
TA = –45°C
TA = –60°C
0.4
20
ICC (mA)
2
0
–2
TA = 125°C
TA = 105°C
TA = 90°C
TA = 75°C
TA = 50°C
TA = 25°C
TA = –10°C
TA = –45°C
TA = –60°C
15
10
–4
–6
5
–8
–10
–75 –50 –25
0
0
0 25 50 75 100 125 150
TEMPERATURE (°C)
ICC (mA)
VOSCM (mV)
64041 G03
Active Supply Current vs Supply
Voltage and Temperature
5 REPRESENTATIVE UNITS
VCM = VOCM = MID-SUPPLY
VS = 3V
8
0 25 50 75 100 125 150
TEMPERATURE (°C)
64041 G02
Common Mode Voltage Offset vs
Temperature
10
–1.0
–75 –50 –25
0 25 50 75 100 125 150
TEMPERATURE (°C)
1
3
2
VSUPPLY (V)
4
0.3
0.2
0.1
VCM = VOCM = MID-SUPPLY
SHDN = V–
0
0
5
1
2
3
VSUPPLY (V)
64041 G05
4
5
64041 G06
64041 G04
30
VCM = VOCM = MID-SUPPLY
VS = 3V
–5
25
–10
20
TA = 125°C
TA = 105°C
TA = 90°C
TA = 75°C
TA = 50°C
TA = 25°C
TA = –10°C
TA = –45°C
TA = –60°C
–15
–20
–25
–30
0
0.5
1.5
2.5
1.0
2.0
SHDN PIN VOLTAGE (V)
3.0
64041 G07
ICC (mA)
SHDN PIN CURRENT (μA)
0
Supply Current vs SHDN Pin
Voltage and Temperature
Small-Signal Frequency
Response
5
VCM = VOCM = MID-SUPPLY
VS = 3V
0
GAIN (dB)
SHDN Pin Current vs SHDN Pin
Voltage and Temperature
TA = 125°C
TA = 105°C
TA = 90°C
TA = 75°C
TA = 50°C
TA = 25°C
TA = –10°C
TA = –45°C
TA = –60°C
15
10
5
0
0
0.5
1.0
1.5
2.0
2.5
SHDN PIN VOLTAGE (V)
3.0
VS = 3V
VS = 5V
CF = 0pF
CF = 1.8pF
–5
–10
–15 UNFILTERED OUTPUTS
VCM = VOCM = MID-SUPPLY
TA = 25°C
RF = RI = 100Ω, CF IN PARALLEL WITH RF
–20
10
100
1000
FREQUENCY (MHz)
64041 G08
64041 G09
6404f
8
LTC6404
LTC6404-1 TYPICAL PERFORMANCE CHARACTERISTICS
Small-Signal Frequency Response
vs Gain Setting Resistor Values
and Supply Voltage
5
10
0
5
Small-Signal Frequency
Response vs Temperature
10
CLOAD = 10pF
TA = –45°C
5
RF = RI = 100Ω
0
GAIN (dB)
RF = RI = 200Ω
–10
RF = RI = 499Ω
–15
VS = 3V
VS = 5V
–20
UNFILTERED OUTPUTS
–25 VCM = VOCM = MID-SUPPLY
TA = 25°C
VS = 3V AND VS = 5V
–30
10
100
FREQUENCY (MHz)
1000
0
CLOAD = 5pF
CLOAD = 0pF
–5
UNFILTERED OUTPUTS
–10 VCM = VOCM = MID-SUPPLY
TA = 25°C
RF = RI = 100Ω
–15 VS = 3V AND VS = 5V
RLOAD = 200Ω,
(EACH OUTPUT TO GROUND)
–20
10
100
FREQUENCY (MHz)
1000
Large-Signal Step Response
TA = 25°C
FILTERED
DIFFERENTIAL
OUTPUT
–10
–15
TA = 90°C
–20
TA = 25°C
TA = –45°C
–25 FILTERED OUTPUT
= MID-SUPPLY
V =V
–30 RCM= R =OCM
F
I 100Ω
VS = 3V AND VS = 5V
–35
10
100
FREQUENCY (MHz)
1.0
0.5
VINDIFF
VOUTDIFF
0
–0.5
VCM = VOCM = MID-SUPPLY
RF = RI = 100Ω
–1.5
1000
0
VOUTDIFF
0
–0.25
3
6
9
TIME (ns)
12
0
15
Distortion vs Input Common Mode
Voltage
–80
–90
HD2
HD3
–100
VS = 3V
RF = RI = 100Ω
–50 V = 2V
IN
P-P
fIN = 10MHz
–60
DIFFERENTIAL
INPUT
SINGLE-ENDED
–70
INPUT
–80
–100
–110
HD3
–120
0.1
–110
1.0
10
FREQUENCY (MHz)
HD2
–90
HD2
100
64041 G16
9
6
TIME (ns)
12
Distortion vs Output Amplitude
VCM = VOCM = MID-SUPPLY
–40 VS = 3V
TA = 25oC
C = 0pF
–50 F
RF = RI = 1007
V = FULLY DIFFERENTIAL INPUT
–60 IN
fIN = 10MHz
–70
–80
HD3
–90
HD2
HD3
15
–30
HD2, HD3 (dBc)
DIFFERENTIAL INPUT
SINGLE-ENDED INPUT
HD2, HD3 (dBc)
–70
3
64041 G15
–40
–60
VCM = VOCM = MID-SUPPLY
RF = RI = 100Ω
–0.50
64041 G14
–40
VCM = VOCM = MID-SUPPLY
VS = 3V
VOUTDIFF = 2VP-P
RF = RI = 100Ω
VINDIFF
0.25
–1.0
Distortion vs Frequency
HD2, HD3 (dBc)
Small-Signal Step Response
0.50
64041 G13
–50
1000
64041 G12
VOUTDIFF (OUT+ – OUT–) (V)
GAIN (dB)
–5
UNFILTERED OUTPUTS
–15 VCM = VOCM = MID-SUPPLY
RF = RI = 100Ω
VS = 3V AND VS = 5V
–20
10
100
FREQUENCY (MHz)
1.5
VOUTDIFF (OUT+ – OUT–) (V)
0
TA = 90°C
64041 G11
Small-Signal Frequency
Response vs Temperature
UNFILTERED DIFFERENTIAL
OUTPUT
TA = 25°C
–5
–10
64041 G10
5
GAIN (dB)
–5
GAIN (dB)
Small-Signal Frequency
Response vs CLOAD
HD2
–100
HD3
–110
0
0.5
1.0
1.5
2.0
2.5
3.0
DC COMMON MODE INPUT (AT IN+ AND IN– PINS) (V)
64041 G17
0
1
2
3
4
VOUTDIFF (VP-P)
5
6
64041 G18
6404f
9
LTC6404
LTC6404-1 TYPICAL PERFORMANCE CHARACTERISTICS
VCM = VOCM = 1.7V
VS = 3.3V
RF = RI = 100Ω
VIN = 2VP-P DIFFERENTIAL
fSAMPLE = 105Msps
10MHz, 4092 POINT FFT
FUNDAMENTAL = –1dBFS
HD2 = –98.8dBc
HD3 = –90.2dBc
–20
–40
–70
–80
–60
HD2
–80
HD3
–100
0
VCM = VOCM = 1.5V
VS = 3V
RF = RI = 100Ω
VIN = 2VP-P DIFFERENTIAL
fSAMPLE = 105Msps
10MHz, 65536 POINT FFT
FUNDAMENTAL = –1dBFS
HD2 = –90.7dBc
HD3 = –86.6dBc
–20
–40
(dB)
0
VCM = VOCM = MID-SUPPLY
–40 VS = 3V
TA = 25°C
RF = RI = 100Ω
–50
VIN = SINGLE-ENDED INPUT
f = 10MHz
–60 IN
(dB)
HD2, HD3 (dBc)
–30
–60
–80
–90
–100
LTC6404-1 Driving LTC2207
16-Bit ADC
LTC6404-1 Driving LTC2207
16-Bit ADC
Distortion vs Output Amplitude
HD9 HD2
HD3
HD7
HD5
HD2
–100
HD8
HD9
HD4
HD3
HD7 HD4
HD5
–120
–110
–120
0
1
2
3
VOUTDIFF (VP-P)
4
5
0
10
20
30
40
FREQUENCY (MHz)
64041 G19
NOISE FIGURE (dB)
VOLTAGE NOISE DENSITY (nV/√Hz)
COMMON MODE
0.1
1
10
FREQUENCY (MHz)
20
30
40
FREQUENCY (MHz)
50
64041 G21
28
DIFFERENTIAL INPUT
REFERRED
1
0.01
10
LTC6404-1 Noise Figure vs
Frequency
VCM = VOCM = MID-SUPPLY
VS = 3V
TA = 25°C
RF = RI = 100Ω
10
0
64041 G20
Voltage Noise Density vs
Frequency
100
50
VCM = VOCM = MID-SUPPLY
V = 3V
24 T S = 25°C
A
SEE FIGURE 2 CIRCUIT
20
16
12
8
4
100
1000
0
10
100
FREQUENCY (MHz)
1000
64041 G22
64041 G23
6404f
10
LTC6404
LTC6404-2 TYPICAL PERFORMANCE CHARACTERISTICS
Active Supply Current vs
Temperature
33
Shutdown Supply Current vs
Temperature
1.0
0.5
VCM = VOCM = MID-SUPPLY
32
Differential Voltage Offset (Input
Referred) vs Temperature
VCM = VOCM = MID-SUPPLY
0.6
0.4
VS = 5V
VS = 5V
0.4
30
VS = 2.7V
VOSDIFF (mV)
ICC (mA)
ICC (mA)
31
VS = 3V
0.3
VS = 3V
0.2
0
–0.2
0.2
29
VS = 2.7V
–0.4
–0.6
0.1
28
5 REPRESENTATIVE UNITS
VCM = VOCM = MID-SUPPLY
VS = 3V
0.8
–0.8
27
–75 –50 –25
0
–75 –50 –25
0 25 50 75 100 125 150
TEMPERATURE (°C)
64042 G01
TA = 125°C
TA = 105°C
TA = 90°C
TA = 75°C
TA = 50°C
TA = 25°C
TA = –10°C
TA = –45°C
TA = –60°C
VCM = VOCM = MID-SUPPLY
SHDN = V+
35
0.4
30
0
–2
TA = 125°C
TA = 105°C
TA = 90°C
TA = 75°C
TA = 50°C
TA = 25°C
TA = –10°C
TA = –45°C
TA = –60°C
20
15
–4
10
–6
5
–8
–10
–75 –50 –25
0
0 25 50 75 100 125 150
TEMPERATURE (°C)
0
1
2
3
VSUPPLY (V)
4
64042 G03
0.1
0
5
10
–30
0
0.5
1.5
2.5
1.0
2.0
SHDN PIN VOLTAGE (V)
3.0
64042 G07
2
3
VSUPPLY (V)
4
5
64042 G06
CF = 0pF
CF = 1pF
20
GAIN (dB)
ICC (mA)
VS = 3V
VS = 5V
5
25
–10
–25
1
Small-Signal Frequency
Response
VCM = VOCM = MID-SUPPLY
VS = 3V
30
TA = 125°C
TA = 105°C
TA = 90°C
TA = 75°C
TA = 50°C
TA = 25°C
TA = –10°C
TA = –45°C
TA = –60°C
VCM = VOCM = MID-SUPPLY
SHDN = V–
0
15
35
–5
–20
0.2
Supply Current vs SHDN Pin
Voltage and Temperature
VCM = VOCM = MID-SUPPLY
VS = 3V
–15
0.3
64042 G05
SHDN Pin Current vs SHDN Pin
Voltage and Temperature
0
ICC (mA)
25
2
ICC (mA)
VOSCM (mV)
SHDN Supply Current vs Supply
Voltage and Temperature
0.5
40
5 REPRESENTATIVE UNITS
VCM = VOCM = MID-SUPPLY
VS = 3V
4
SHDN PIN CURRENT (μA)
64042 G03
Active Supply Current vs Supply
Voltage and Temperature
10
6
0 25 50 75 100 125 150
TEMPERATURE (°C)
64042 G02
Common Mode Voltage Offset
(Input Referred) vs Temperature
8
–1.0
–75 –50 –25
0 25 50 75 100 125 150
TEMPERATURE (°C)
TA = 125°C
TA = 105°C
TA = 90°C
TA = 75°C
TA = 50°C
TA = 25°C
TA = –10°C
TA = –45°C
TA = –60°C
15
10
5
0
0
0.5
1.0
1.5
2.0
2.5
SHDN PIN VOLTAGE (V)
3.0
64042 G08
0
–5
–10 UNFILTERED OUTPUTS
VCM = VOCM = MID-SUPPLY
–15 TA = 25°C
RI = 100Ω, RF = 200Ω,
CF IN PARALLEL WITH RF
–20
10
100
FREQUENCY (MHz)
1000
64042 G09
6404f
11
LTC6404
LTC6404-2 TYPICAL PERFORMANCE CHARACTERISTICS
Small-Signal Frequency
Response vs CLOAD
Small-Signal Frequency Response
vs Gain Setting Resistor Values
25
RI = 100Ω, RF = 200Ω
CLOAD = 5pF
15
5
GAIN (dB)
RI = 200Ω, RF = 402Ω
0
RI = 499Ω, RF = 1k
–5
VS = 3V
VS = 5V
–10
UNFILTERED OUTPUTS
–20 VCM = VOCM = MID-SUPPLY
TA = 25°C
VS = 3V AND VS = 5V
–25
10
100
FREQUENCY (MHz)
1000
5
10
CLOAD = 0pF
5
UNFILTERED OUTPUTS
VCM = VOCM = MID-SUPPLY
T = 25°C
–5 RA = 100Ω, R = 200Ω
I
F
VS = 3V AND VS = 5V
–10 R
LOAD = 200Ω,
(EACH OUTPUT TO GROUND)
–15
10
100
FREQUENCY (MHz)
0
1000
64042 G10
FILTERED GAIN (dB)
0
FILTERED
DIFFERENTIAL
OUTPUT
–10
TA = 90°C
TA = 25°C
–15
TA = –45°C
–20
VCM = VOCM = MID-SUPPLY
–25 RI = 100Ω, RF = 200Ω
VS = 3V
–30
10
100
FREQUENCY (MHz)
VINDIFF
0
–0.5
–1.0
VCM = VOCM = MID-SUPPLY
RI = 100Ω, RF = 200Ω
–1.5
0
1000
6
9
TIME (ns)
3
12
HD2
–100
–110
–120
–130
–140
0.1
HD3
–0.50
–0.75 VCM = VOCM = MID-SUPPLY
RI = 100Ω, RF = 200Ω
–1.00
0
3
9
6
TIME (ns)
–80
HD2
–100
–110
64042 G16
15
64042 G15
Distortion vs Output Amplitude
VS = 3V
–50 VCM = VOCM = MID-SUPPLY
RI = 100Ω, RF = 200Ω
–60 VIN = DIFFERENTIAL INPUT
fIN = 10MHz
HD3
100
12
–40
VS = 3V
VCM = VOCM = MID-SUPPLY
–50 R = 100Ω, R = 200Ω
I
F
VIN = 1VP-P
–60 fIN = 10MHz
DIFFERENTIAL INPUT
SINGLE-ENDED INPUT
–70
–90
HD2
HD3
1
10
FREQUENCY (MHz)
–0.25
HD2, HD3 (dBc)
DIFFERENTIAL INPUT
SINGLE-ENDED INPUT
VINDIFF
0
–40
HD2, HD3 (dBc)
HD2, HD3 (dBc)
–90
0.25
Distortion vs Input Common Mode
Voltage
VCM = VOCM = MID-SUPPLY
VS = 3V
VOUTDIFF = 2VP-P
RF = 100Ω, RI = 200Ω
–80
15
VOUTDIFF
0.50
64042 G14
–40
–70
0.75
0.5
Distortion vs Frequency
–60
Small-Signal Step Response
1.0
64042 G13
–50
1000
1.00
VOUTDIFF
TA = 25°C
–5
UNFILTERED OUTPUTS
–5 VCM = VOCM = MID-SUPPLY
TA = 25°C
RI = 100Ω, RF = 200Ω
–10 VS = 3V AND VS = 5V
RLOAD = 200Ω,
(EACH OUTPUT TO GROUND)
–15
10
100
FREQUENCY (MHz)
Large-Signal Step Response
UNFILTERED DIFFERENTIAL
OUTPUT
5
TA = 90°C
0
64042 G12
1.5
VOUTDIFF (OUT+ – OUT–) (V)
10
TA = 25°C
64042 G11
Small-Signal Frequency
Response vs Temperature
15
TA = –45°C
10
VOUTDIFF (OUT+ – OUT–) (V)
10
15
CLOAD = 10pF
20
GAIN (dB)
15
GAIN (dB)
Small-Signal Frequency
Response vs Temperature
–70
HD3
–80
HD2
–90
–100
–110
HD3
HD2
–120
0
0.5
1.0
1.5
2.0
2.5
DC COMMON MODE INPUT (AT IN+ AND IN– PINS) (V)
64042 G17
0
1
2
3
4
VOUTDIFF (VP-P)
5
6
64042 G18
6404f
12
LTC6404
LTC6404-2 TYPICAL PERFORMANCE CHARACTERISTICS
0
VS = 3.3V
VOUTDIFF = 2VP-P
VCM = VOCM = 1.25V
RI = 1007, RF = 2007
10.1MHz, 16184 POINT FFT
fSAMPLE = 105Msps
FUNDAMENTAL = –1dBFS
HD2 = –92.4dBc
HD3 = –93.02dBc
–20
–40
–70
(dB)
HD2, HD3 (dBc)
VS = 3V
–50 VCM = VOCM = MID-SUPPLY
RI = 100Ω, RF = 200Ω
–60 VIN = SINGLE-ENDED INPUT
fIN = 10MHz
–80
HD2
–60
HD2
HD3
HD7
–100
HD3
VS = 3.3V
VINDIFF = 1VP-P
FULLY DIFFERENTIAL
VOUTDIFF = 2VP-P
VCM = VOCM = 1.25V
RI = 100Ω, RF = 200Ω
16184 POINT FFT
fSAMPLE = 105Msps
TONE1, TONE2 = –7dBFS
IM3U IM3U = –106.8dBc
IM3L = –107.7dBc
–20
–40
–60
–80 IM3L
–80
–100
–110
0
(dB)
–40
–90
LTC6404-2 Driving LTC2207
16-Bit ADC (Two Tones)
LTC6404-2 Driving LTC2207
16-Bit ADC (Single Tone)
Distortion vs Output Amplitude
HD4
HD5
–100
–120
–120
–120
2
3
4
VOUTDIFF (VP-P)
5
6
0
10
20
30
40
FREQUENCY (MHz)
50
64042 G19
Voltage Noise Density vs
Frequency
100
28
24
COMMON MODE
10
DIFFERENTIAL INPUT
REFERRED
0.1
1
10
FREQUENCY (MHz)
10
20
30
40
FREQUENCY (MHz)
50
64042 G21
LTC6404-2 Noise Figure vs
Frequency
VS = 3V
VCM = VOCM = MID-SUPPLY
RI = 100Ω, RF = 200Ω
TA = 25°C
1
0.01
0
64042 G20
NOISE FIGURE (dB)
1
VOLTAGE NOISE DENSITY (nV/√Hz)
0
VCM = VOCM = MID-SUPPLY
VS = 3V
TA = 25°C
SEE FIGURE 2 CIRCUIT
20
16
12
8
4
100
1000
0
10
100
FREQUENCY (MHz)
1000
64042 G22
64042 G23
6404f
13
LTC6404
LTC6404-4 TYPICAL PERFORMANCE CHARACTERISTICS
Active Supply Current vs
Temperature
33
Shutdown Supply Current vs
Temperature
Differential Voltage Offset (Input
Referred) vs Temperature
1.0
0.7
VCM = VOCM = MID-SUPPLY
VCM = VOCM = MID-SUPPLY
32
0.6
VS = 5V
VS = 5V
0.5
30
VS = 2.7V
0.4
VOSDIFF (mV)
VS = 3V
ICC (mA)
0.4
VS = 3V
0.3
VS = 2.7V
29
0.2
–0.4
0.1
27
–75 –50 –25
–0.8
0
–75 –50 –25
0 25 50 75 100 125 150
TEMPERATURE (°C)
40
5 REPRESENTATIVE UNITS
VCM = VOCM = MID-SUPPLY
VS = 3V
SHDN Supply Current vs Supply
Voltage and Temperature
0.7
VCM = VOCM =
MID-SUPPLY
SHDN = V+
35
TA = 125°C
TA = 105°C
TA = 90°C
TA = 75°C
TA = 50°C
TA = 25°C
TA = –10°C
TA = –45°C
TA = –60°C
0.6
30
20
0.5
25
10
ICC (mA)
VOSCM (mV)
64044 G03
Active Supply Current vs Supply
Voltage and Temperature
50
30
0
–10
TA = 125°C
TA = 105°C
TA = 90°C
TA = 75°C
TA = 50°C
TA = 25°C
TA = –10°C
TA = –45°C
TA = –60°C
20
15
–20
10
–30
5
–40
–50
–75 –50 –25
0
0 25 50 75 100 125 150
TEMPERATURE (°C)
1
0
2
3
VSUPPLY (V)
4
0.3
0.2
0.1
VCM = VOCM = MID-SUPPLY
SHDN = V+
0
1
0
2
3
4
64044 G06
Supply Current vs SHDN Pin
Voltage and Temperature
35
VCM = VOCM = MID-SUPPLY
VS = 3V
Small-Signal Frequency
Response
20
VCM = VOCM = MID-SUPPLY
VS = 3V
30
5
VSUPPLY (V)
64044 G05
SHDN Pin Current vs SHDN Pin
Voltage and Temperature
–5
0.4
5
64044 G04
0
0 25 50 75 100 125 150
TEMPERATURE (°C)
64044 G02
Common Mode Voltage Offset
(Input Referred) vs Temperature
40
–1.0
–75 –50 –25
0 25 50 75 100 125 150
TEMPERATURE (°C)
64044 G01
VS = 3V
VS = 5V
15
25
CF = 0pF
10
–10
TA = 125°C
TA = 105°C
TA = 90°C
TA = 75°C
TA = 50°C
TA = 25°C
TA = –10°C
TA = –45°C
TA = –60°C
–15
–20
–25
0
0.5
1.0
1.5
2.0
SHDN PIN VOLTAGE (V)
2.5
3.0
64044 G07
20
GAIN (dB)
CF = 1pF
ICC (mA)
SHDN PIN CURRENT (μA)
0
–0.6
28
–30
0.2
–0.2
ICC (mA)
ICC (mA)
31
5 REPRESENTATIVE UNITS
VCM = VOCM = MID-SUPPLY
VS = 3V
0.8
0.6
TA = 125°C
TA = 105°C
TA = 90°C
TA = 75°C
TA = 50°C
TA = 25°C
TA = –10°C
TA = –45°C
TA = –60°C
15
10
5
5
0
–5
–10
–15
0
0
0.5
2.0
1.5
2.5
1.0
SHDN PIN VOLTAGE (V)
3.0
64044 G08
VCM = VOCM = MID-SUPPLY
RI = 100Ω, RF = 402Ω,
CF IN PARALLEL WITH RF
10
100
FREQUENCY (MHz)
1000
64044 G09
6404f
14
LTC6404
LTC6404-4 TYPICAL PERFORMANCE CHARACTERISTICS
Small-Signal Frequency
Response vs CLOAD
Small-Signal Frequency Response
vs Gain Setting Resistor Values
20
CLOAD = 10pF
20
15
RI = 200Ω, RF = 800Ω
0
VS = 3V
VS = 5V
VCM = VOCM = MID-SUPPLY
VS = 3V AND VS = 5V
CLOAD = 0pF
5
0
VS = 3V
VS = 5V
VCM = VOCM = MID-SUPPLY
RI = 100Ω, RF = 402Ω
VS = 3V AND VS = 5V
–5
–10
–15
100
FREQUENCY (MHz)
1000
10
100
FREQUENCY (MHz)
TA = 25°C
TA = –45°C
TA = 90°C
–15
VCM = VOCM = MID-SUPPLY
–20 RI = 100Ω, RF = 402Ω
VS = 3V
–25
100
10
FREQUENCY (MHz)
VOUTDIFF
VOUTDIFF
1.5
1.0
VINDIFF
0.5
0
–0.5
–1.5
VCM = VOCM = MID-SUPPLY
VS = 3V
RI = 100Ω, RF = 402Ω
–2.0
–2.5
1000
VCM = VOCM = MID-SUPPLY
VS = 3V
VOUT = 2VP-P
RI = 100Ω, RF = 402Ω
3
0
9
6
TIME (ns)
–80
–90
HD2
–100
–130
0.1
HD3
12
VCM = VOCM = MID-SUPPLY
VS = 3V
RI = 100Ω, RF = 402Ω
–0.50
–0.75
0
15
3
–70
DIFFERENTIAL INPUT
SINGLE-ENDED INPUT
HD2
–90
–60
VCM = VOCM = MID-SUPPLY
VS = 3V
RI = 100Ω, RF = 402Ω
fIN = 10MHz
–70
DIFFERENTIAL INPUT
SINGLE-ENDED INPUT
–50
–80
–80
HD3
HD3
–90
HD2
–100
HD2
–110
1
10
FREQUENCY (MHz)
100
64044 G16
15
12
Distortion vs Output Amplitude
–40
–100
HD3
6
9
TIME (ns)
64044 G15
HD3
HD2
–110
–120
–60
VCM = VOCM = MID-SUPPLY
VS = 3V
RI = 100Ω, RF = 402Ω
fIN = 10MHz
–50
HD2, HD3 (dBc)
HD2, HD3 (dBc)
–40
DIFFERENTIAL INPUT
SINGLE-ENDED INPUT
VINDIFF
0
Distortion vs Input Common Mode
Voltage
–40
–70
0.25
64044 G14
Distortion vs Frequency
–60
0.50
–0.25
–1.0
64044 G13
–50
Small-Signal Step Response
VOUTDIFF (OUT+ – OUT–) (V)
VOUTDIFF (OUT+ – OUT–) (V)
FILTERED GAIN (dB)
FILTERED
DIFFERENTIAL OUTPUT
1000
0.75
2.0
5
–10
TA = 90°C
0
Large-Signal Step Response
10
–5
TA = 25°C
64044 G12
2.5
UNFILTERED DIFFERENTIAL
OUTPUT AT 25°C
0
5
64044 G11
Small-Signal Frequency
Response vs Temperature
15
TA = –45°C
VCM = VOCM = MID-SUPPLY
–10 R = 100Ω, R = 402Ω
I
F
VS = 3V AND VS = 5V
–15
10
100
FREQUENCY (MHz)
1000
64044 G10
20
10
–5
HD2, HD3 (dBc)
10
10
GAIN (dB)
GAIN (dB)
GAIN (dB)
RI = 140Ω, RF = 562Ω
5
–15
15
CLOAD = 5pF
15
10
–10
20
25
RI = 100Ω, RF = 402Ω
–5
Small-Signal Frequency
Response vs Temperature
HD3
HD2
–110
–120
0.5
1.0
2.0
2.5
0
1.5
DC COMMON MODE INPUT (AT IN+ AND IN– PINS) (V)
64044 G17
–120
0
1
2
4
3
VOUTDIFF (VP-P)
5
6
64044 G18
6404f
15
LTC6404
LTC6404-4 TYPICAL PERFORMANCE CHARACTERISTICS
LTC6404-4 Driving LTC2207
16-Bit ADC (Two Tones)
LTC6404-4 Driving LTC2207
16-Bit ADC (Single Tone)
0
–40
–60
–80
VS = 3.3V
VOUTDIFF = 2VP-P
VCM = VOCM = 1.4V
RI = 100Ω, RF = 402Ω
64k POINT FFT
fSAMPLE = 105Msps
9.5MHz, 10.5MHz = –7dBFS
IMD3L = –100.8dBc
IMD3U = –102dBc
–20
AMPLITUDE (dBFS)
–20
AMPLITUDE (dBFS)
0
VS = 3.3V
VOUTDIFF = 2VP-P
VCM = VOCM = 1.25V
RI = 100Ω, RF = 402Ω
10.1MHz, 64k POINT FFT
fSAMPLE = 105Msps
FUNDAMENTAL = –1dBFS
HD2 = –98.9dBc
HD3 = –99.6dBc
–100
–120
–40
–60
–80
IMD3L
IMD3U
–100
–120
–140
–140
10
0
20
30
40
50
10
0
FREQUENCY (MHz)
20
30
40
64044 G19
64044 G20
LTC6404-4 Noise Figure vs
Frequency
Voltage Noise Density vs
Frequency
28
VCM = VOCM = MID-SUPPLY
VS = 3V
RI = 100Ω, RF = 402Ω
TA = 25°C
COMMON MODE
10
DIFFERENTIAL INPUT
REFERRED
0.1
1
10
FREQUENCY (MHz)
24
NOISE FIGURE (dB)
VOLTAGE NOISE DENSITY (nV/√Hz)
100
1
0.01
50
FREQUENCY (MHz)
VCM = VOCM = MID-SUPPLY
VS = 3V
TA = 25°C
SEE FIGURE 2 CIRCUIT
20
16
12
8
4
100
1000
64044 G21
0
10
100
FREQUENCY (MHz)
1000
64044 G22
PIN FUNCTIONS
SHDN (Pin 1): When SHDN is floating or directly tied to
V+, the LTC6404 is in the normal (active) operating mode.
When Pin 1 is pulled a minimum of 2.1V below V+, the
LTC6404 enters into a low power shutdown state. See
Applications Information for more details.
V+, V– (Pins 2, 10, 11 and Pins 3, 9, 12): Power Supply
Pins. Three pairs of power supply pins are provided to keep
the power supply inductance as low as possible to prevent
degradation of amplifier 2nd harmonic performance. See
the Layout Considerations section for more detail.
VOCM (Pin 4): Output Common Mode Reference Voltage.
The voltage on VOCM sets the output common mode
voltage level (which is defined as the average of the voltages on the OUT+ and OUT– pins). The VOCM pin is the
midpoint of an internal resistive voltage divider between
the supplies, developing a (default) mid-supply voltage
potential to maximize output signal swing. In general, the
VOCM pin can be overdriven by an external voltage reference capable of driving the input impedance presented
by the VOCM pin. On the LTC6404-1, the VOCM pin has a
input resistance of approximately 23.5k to a mid-supply
6404f
16
LTC6404
PIN FUNCTIONS
potential. On the LTC6404-2, the VOCM pin has a input
resistance of approximately 14k. On the LTC6404-4, the
VOCM pin has a input resistance of approximately 7k. The
VOCM pin should be bypassed with a high quality ceramic
bypass capacitor of at least 0.01μF, (unless you are using
split supplies, then connect directly to a low impedance,
low noise ground plane) to minimize common mode noise
from being converted to differential noise by impedance
mismatches both externally and internally to the IC.
that the continuous (DC + ACRMS) output current be limited
to under 50mA.
OUTF+, OUTF– (Pins 8, 13): Filtered Output Pins. These
pins have a series 50Ω resistor connected between the
filtered and unfiltered outputs and three 12pF capacitors.
Both OUTF+ and OUTF– have 12pF to V–, plus an additional
12pF differentially between OUTF+ and OUTF–. This filter
creates a differential lowpass frequency response with
a –3dB bandwidth of 88.5MHz. For long-term device
reliability, it is recommended that the continuous (DC +
ACRMS) output current be limited to under 40mA.
NC (Pins 5, 16): No Connection. These pins are not connected internally.
OUT+, OUT– (Pins 7, 14): Unfiltered Output Pins. Besides
driving the feedback network, each pin can drive an additional 50Ω to ground with typical short-circuit current
limiting of ±65mA. Each amplifier output is designed to
drive a load capacitance of 10pF. This basically means
the amplifier can drive 10pF from each output to ground
or 5pF differentially. Larger capacitive loads should be
decoupled with at least 25Ω resistors in series with each
output. For long-term device reliability, it is recommended
IN+, IN– (Pins 15, 6): Noninverting and Inverting Input Pins
of the Amplifier, Respectively. For best performance, it is
highly recommended that stray capacitance be kept to an
absolute minimum by keeping printed circuit connections
as short as possible, and if necessary, stripping back nearby
surrounding ground plane away from these pins.
Exposed Pad (Pin 17): Tie the pad to V– (Pins 3, 9, and 12).
If split supplies are used, do not tie the pad to ground.
BLOCK DIAGRAM
16
15
NC
V+
14
IN+
V–
V–
1
V+
2
50Ω
2 • RVOCM
V–
V–
V+
VOCM
2 • RVOCM
12pF V+
50Ω
–
12pF
V–
4
V–
12
V– V+
11
+
VOCM
V–
3
V+
12pF
V+
V+
V+
66k
SHDN
OUTF–
V–
V+
V+
13
OUT–
V+
10
V– V–
9
V–
V–
V–
V+
V–
5
NC
6
IN–
V+
V+
7
OUT+
8
OUTF+
6404 BD
IC
2 • RVOCM
47k
LTC6404-1
28k
LTC6404-2
14k
LTC6404-4
6404f
17
LTC6404
APPLICATIONS INFORMATION
VIN+
RI
IL
VOUT–
RF
+
VOUTF–
VINP
–
16
NC
15
14
IN+
OUT–
13
SHDN
12pF
SHDN
VSHDN
50Ω
V+
V+
2
0.1μF
+
3
12pF
V+
VOCM
V–
V–
–
V–
VOCM
0.1μF
VOUTCM
0.1μF
10
V–
12pF
V–
0.1μF
5
NC
VINM
6
IN–
VIN–
RI
7
OUT+
VOUT+
RF
0.1μF
OUTF+
8
RBAL
V–
9
0.01μF
0.1μF
V+
V+
4
+
RBAL
V–
V– V+
11
50Ω
VOCM
–
V–
12
1
V+
VCM
OUTF–
LTC6404
VOUTF+
IL
6404 F01
Figure 1. DC Test Circuit
0.01μF
RI
VIN+
VOUT–
RF
100Ω
0.01μF
VOUTF–
16
NC
15
IN+
14
OUT–
13
SHDN
VIN
–
•
•
VSHDN
1
50Ω
V+
V+
V+
2
0.1μF
V–
+
V–
V–
4
5
RI
NC
6
VIN–
IN–
RF
7
OUT+
VOUT+
8
50Ω
0.1μF
V–
0.1μF
V–
0.1μF
OUTF+
VOUTF+
0.1μF
MINI-CIRCUITS
TCM4-19
V+
9
0.01μF
0.01μF
0.1μF
V+
10
50Ω
12pF
V–
V– V +
11
V+
–
V–
3
12pF
VOCM
VOCM
VOCM
V–
12
•
+
12pF
SHDN
•
50Ω
MINI-CIRCUITS
TCM4-19
OUTF–
LTC6404
100Ω
0.01μF
6404 F02
Figure 2. AC Test Circuit (–3dB BW testing)
6404f
18
LTC6404
APPLICATIONS INFORMATION
Functional Description
The LTC6404 is a small outline, wide band, low noise,
and low distortion fully-differential amplifier with accurate
output phase balancing. The LTC6404 is optimized to drive
low voltage, single-supply, differential input 14-bit to 18-bit
analog-to-digital converters (ADCs). The LTC6404’s output
is capable of swinging rail-to-rail on supplies as low as
2.7V, which makes the amplifier ideal for converting ground
referenced, single-ended signals into DC level-shifted
differential signals in preparation for driving low voltage,
single-supply, differential input ADCs. Unlike traditional
op amps which have a single output, the LTC6404 has
two outputs to process signals differentially. This allows
for two times the signal swing in low voltage systems
when compared to single-ended output amplifiers. The
balanced differential nature of the amplifier also provides
even-order harmonic distortion cancellation, and less
susceptibility to common mode noise (e.g., power supply
noise). The LTC6404 can be used as a single-ended input
to differential output amplifier, or as a differential input to
differential output amplifier.
The LTC6404’s output common mode voltage, defined
as the average of the two output voltages, is independent
of the input common mode voltage, and is adjusted by
applying a voltage on the VOCM pin. If the pin is left open,
there is an internal resistive voltage divider that develops
a potential halfway between the V+ and V– pins. Whenever
this pin is not hard tied to a low impedance ground plane,
it is recommended that a high quality ceramic capacitor is
used to bypass the VOCM pin to a low impedance ground
plane (See Layout Considerations in this document). The
LTC6404’s internal common mode feedback path forces
accurate output phase balancing to reduce even order
harmonics, and centers each individual output about the
potential set by the VOCM pin.
VOUTCM = VOCM =
VOUT + + VOUT –
2
The outputs (OUT+ and OUT–) of the LTC6404 are capable
of swinging rail-to-rail. They can source or sink up to approximately 65mA of current.
Additional outputs (OUTF+ and OUTF–) are available that
provide filtered versions of the OUT+ and OUT– outputs. An
on-chip single pole RC passive filter band limits the filtered
outputs to a –3dB frequency of 88.5MHz. The user has a
choice of using the unfiltered outputs, the filtered outputs,
or modifying the filtered outputs to adjust the frequency
response by adding additional components.
In applications where the full bandwidth of the LTC6404 is
desired, the unfiltered outputs (OUT+ and OUT–) should be
used. The unfiltered outputs OUT+ and OUT– are designed
to drive 10pF to ground (or 5pF differentially). Capacitances
greater than 10pF will produce excess peaking, and can
be mitigated by placing at least 25Ω in series with each
output pin.
Input Pin Protection
The LTC6404’s input stage is protected against differential
input voltages which exceed 1.4V by two pairs of backto-back diodes connected in anti-parallel series between
IN+ and IN– (Pins 6 and 15). In addition, the input pins
have steering diodes to either power supply. If the input
pair is overdriven, the current should be limited to under
10mA to prevent damage to the IC. The LTC6404 also has
steering diodes to either power supply on the VOCM and
SHDN pins (Pins 4 and 1), and if forced to voltages which
exceed either supply, they too, should be current-limited
to under 10mA.
SHDN Pin
If the SHDN pin (Pin 1) is pulled 2.1V below the positive supply, circuitry is activated which powers down
the LTC6404. The pin will have the Thevenin equivalent
impedance of approximately 66kΩ to V+. If the pin is left
unconnected, an internal pull-up resistor of 150k will
keep the part in normal active operation. Care should
be taken to control leakage currents at this pin to under
1μA to prevent inadvertently putting the LTC6404 into
shutdown. In shutdown, all biasing current sources are
shut off, and the output pins, OUT+ and OUT–, will each
appear as open collectors with a non-linear capacitor in
parallel and steering diodes to either supply. Because of
the non-linear capacitance, the outputs still have the ability
to sink and source small amounts of transient current if
driven by significant voltage transients. The inputs (IN+,
and IN–) appear as anti-parallel diodes which can conduct
6404f
19
LTC6404
APPLICATIONS INFORMATION
if voltage transients at the input exceed 1.4V. The inputs
also have steering diodes to either supply. The turn-on and
turn-off time between the shutdown and active states is
typically less than 1μs.
of single ended signals to differential output signals to
drive differential input ADCs.
Effects of Resistor Pair Mismatch
In the circuit of Figure 3, it is possible the gain setting
resistors will not perfectly match. Assuming infinite open
loop gain, the differential output relationship is given by
the equation:
General Amplifier Applications
As levels of integration have increased and correspondingly, system supply voltages decreased, there has been
a need for ADCs to process signals differentially in order
to maintain good signal to noise ratios. These ADCs are
typically supplied from a single supply voltage which
can be as low as 3V (2.7V min), and will have an optimal
common mode input range near mid-supply. The LTC6404
makes interfacing to these ADCs easy, by providing both
single-ended to differential conversion as well as common mode level shifting. The front page of this data sheet
shows a typical application. Referring to Figure 1, the gain
to VOUTDIFF from VINM and VINP is:
VOUTDIFF = VOUT + – VOUT – ≈
VOUTDIFF = VOUT + – VOUT – ≅
Δβ
Δβ
• VINCM –
•V
β AVG
β AVG OCM
where:
RI2 ⎞
1 ⎛ RI1
β AVG = • ⎜
+
2 ⎝ RI1 + RF1 RI2 + RF 2 ⎟⎠
RF is the average of RF1, and RF2, and RI is the average
of RI1, and RI2.
RF
• ( VINP – VINM )
RI
βAVG is defined as the average feedback factor (or gain)
from the outputs to their respective inputs:
Note from the above equation, the differential output voltage (VOUT+ – VOUT–) is completely independent of input
and output common mode voltages, or the voltage at
the common mode pin. This makes the LTC6404 ideally
suited for pre-amplification, level shifting and conversion
RI2
Δβ is defined as the difference in feedback factors:
Δβ =
RI2
RI1
–
RI2 + RF 2 RI1 + RF1
RF2
VOUT–
VOUTF–
+
VINP
16
–
NC
15
IN+
14
OUT–
13
SHDN
OUTF–
LTC6404
V–
12
SHDN
VSHDN
1
V– V+
11
V+
V+
2
0.1μF
V–
V+
+
3
V+
VOCM
V–
V–
VOCM
VVOCM
–
VINM
+
V–
0.1μF
4
0.1μF
0.1μF
V–
V–
9
0.01μF
5
RI1
NC
6
IN–
RF1
7
OUT+
8
0.1μF
OUTF+
VOUTF+
0.1μF
V+
V+
10
–
V–
RF
•V
+
RI INDIFF
6404 F03
VOUT+
Figure 3. Basic Differential Amplifier with Feedback Resistor Pair Mismatch
6404f
20
LTC6404
APPLICATIONS INFORMATION
VINCM is defined as the average of the two input voltages
VINP, and VINM (also called the source-referred input common mode voltage):
1
VINCM = • ( VINP + VINM )
2
and VINDIFF is defined as the difference of the input
voltages:
VINDIFF = VINP – VINM
When the feedback ratios mismatch (Δβ), common mode
to differential conversion occurs.
Setting the differential input to zero (VINDIFF = 0), the degree of common mode to differential conversion is given
by the equation:
VOUTDIFF = VOUT+ – VOUT –
Δβ
≈ ( VINCM – VOCM ) • β AVG VINDIFF = 0
⏐
In general, the degree of feedback pair mismatch is a
source of common mode to differential conversion of both
signals and noise. Using 1% resistors or better will mitigate
most problems, and will provide about 34dB worst-case of
common mode rejection. Using 0.1% resistors will provide
about 54dB of common mode rejection. A low impedance
ground plane should be used as a reference for both the
input signal source, and the VOCM pin. A direct short of
VOCM to this ground or bypassing the VOCM with a high
quality 0.1μF ceramic capacitor to this ground plane, will
further prevent common mode signals from being converted to differential.
There may be concern on how feedback ratio mismatch
affects distortion. Distortion caused by feedback ratio mismatch using 1% resistors or better is negligible. However,
in single supply level shifting applications where there is
a voltage difference between the input common mode
voltage and the output common mode voltage, resistor
mismatch can make the apparent voltage offset of the
amplifier appear higher than specified.
The apparent input referred offset induced by feedback
ratio mismatch is derived from the following equation:
VOSDIFF(APPARENT) ≈ (VICM – VOCM) • Δβ
Using the LTC6404-1 in a single supply application on a
single 5V supply with 1% resistors, and the input common
mode grounded, with the VOCM pin biased at mid-supply,
the worst-case DC offset can induce 25mV of apparent
offset voltage. With 0.1% resistors, the worst case apparent offset reduces to 2.5mV.
Input Impedance and Loading Effects
The input impedance looking into the VINP or VINM input
of Figure 1 depends on whether the sources VINP and
VINM are fully differential. For balanced input sources
(VINP = –VINM), the input impedance seen at either input
is simply:
RINP = RINM = RI
For single ended inputs, because of the signal imbalance
at the input, the input impedance increases over the balanced differential case. The input impedance looking into
either input is:
RINP = RINM =
RI
⎛ 1 ⎛ RF ⎞ ⎞
⎜ 1– 2 • ⎜ R + R ⎟ ⎟
⎝ I F ⎠⎠
⎝
Input signal sources with non-zero output impedances can
also cause feedback imbalance between the pair of feedback
networks. For the best performance, it is recommended
that the source’s output impedance be compensated for.
If input impedance matching is required by the source,
R1 should be chosen (see Figure 4):
R1 =
RINM • RS
RINM – RS
RINM
RS
VS
RI
RF
R1
R1 CHOSEN SO THAT R1 || RINM = RS
R2 CHOSEN TO BALANCE R1 || RS
RI
–
+
+
–
RF
6404 F04
R2 = RS || R1
Figure 4. Optimal Compensation for Signal Source Impedance
6404f
21
LTC6404
APPLICATIONS INFORMATION
With singled ended inputs, there is an input signal component to the input common mode voltage. Applying only
VINP (setting VINM to zero), the input common voltage is
approximately:
According to Figure 4, the input impedance looking into
the differential amp (RINM) reflects the single ended source
case, thus:
RINM =
RI
⎛ 1 ⎛ RF ⎞ ⎞
⎜ 1– 2 • ⎜ R + R ⎟ ⎟
⎝ I F ⎠⎠
⎝
VICM =
⎛ RF ⎞ VINP
VCM • ⎜
+
2
⎝ RF + RI ⎟⎠
R2 is chosen to balance R1 || RS:
R2 =
RI • RS
RI + RS
⎛ RF ⎞
•⎜
⎝ RF + RI ⎟⎠
Output Common Mode Voltage Range
The output common mode voltage is defined as the average of the two outputs:
Input Common Mode Voltage Range
The LTC6404’s input common mode voltage (VICM) is
defined as the average of the two input voltages, VIN+, and
VIN–. It extends from V– to 1.4V below V+. The operating
input common mode range depends on the circuit configuration (gain), VOCM and VCM (Refer to Figure 5). For
fully differential input applications, where VINP = –VINM,
the common mode input voltage is approximately:
VICM =
⎛ RI ⎞
VIN+ + VIN–
≈ VOCM • ⎜
+
2
⎝ RI + RF ⎟⎠
VOUTCM = VOCM =
VOUT + + VOUT –
2
The VOCM pin sets this average by an internal common
mode feedback loop which internally forces VOUT+ = –VOUT–.
The output common mode range extends from 1.1V above
V– to 1V below V+ (see the Electrical Characteristics table
for the LTC6404-4 output common mode voltage range).
The VOCM pin sits in the middle of a voltage divider which
sets the default mid-supply open circuit potential.
⎛ RI ⎞
VIN+ + VIN–
≈ VOCM • ⎜
+
2
⎝ RI + RF ⎟⎠
⎛ RF ⎞
VCM • ⎜
⎝ RF + RI ⎟⎠
RI
RF
VOUT–
VOUTF–
+
VINP
16
–
NC
15
IN+
14
OUT–
13
SHDN
OUTF–
LTC6404
V–
12
SHDN
VSHDN
1
V–
V+
V+
VCM
0.1μF
V–
V+
2
+
3
V+
VOCM
V–
V– V–
VOCM
VVOCM
–
4
0.01μF
5
NC
6
IN–
RI
RF
7
OUT+
8
0.1μF
V+
0.1μF
0.1μF
V–
9
VINM
+
0.1μF
V+
10
–
V–
V+
11
V–
0.1μF
OUTF+
6404 F05
VOUTF+
VOUT+
Figure 5. Circuit for Common Mode Range
6404f
22
LTC6404
APPLICATIONS INFORMATION
In single supply applications, where the LTC6404 is used
to interface to an ADC, the optimal common mode input
range to the ADC is often determined by the ADC’s reference. If the ADC makes a reference available for setting
the input common mode voltage, it can be directly tied
to the VOCM pin, but must be capable of driving the input
impedance presented by the VOCM as listed in the Electrical Characteristics Table. This impedance can be assumed
to be connected to a mid-supply potential. If an external
reference drives the VOCM pin, it should still be bypassed
with a high quality 0.01μF or larger capacitor to a low
impedance ground plane to filter any thermal noise and
to prevent common mode signals on this pin from being
inadvertently converted to differential signals.
Output Filter Considerations and Use
Filtering at the output of the LTC6404 is often desired to
provide either anti-aliasing or improved signal to noise
ratio. To simplify this filtering, the LTC6404 includes an
additional pair of differential outputs (OUTF+ and OUTF–)
which incorporate an internal lowpass filter network with
a –3dB bandwidth of 88.5MHz (Figure 6).
These pins each have a DC output impedance of 50Ω. Internal capacitances are 12pF to V– on each filtered output,
plus an additional 12pF capacitor connected differentially
between the two filtered outputs. This resistor/capacitor
combination creates filtered outputs that look like a series
50Ω resistor with a 36pF capacitor shunting each filtered
output to AC ground, providing a –3dB bandwidth of
88.5MHz, and a noise bandwidth of 139MHz. The filter
cutoff frequency is easily modified with just a few external
components. To increase the cutoff frequency, simply add 2
equal value resistors, one between OUT+ and OUTF+ and the
other between OUT– and OUTF– (Figure 7). These resistors,
in parallel with the internal 50Ω resistor, lower the overall
resistance and therefore increase filter bandwidth. For
example, to double the filter bandwidth, add two external
50Ω resistors to lower the series filter resistance to 25Ω.
The 36pF of capacitance remains unchanged, so filter
bandwidth doubles. Keep in mind, the series resistance
also serves to decouple the outputs from load capacitance.
The unfiltered outputs of the LTC6404 are designed to
drive 10pF to ground or 5pF differentially, so care should
be taken to not lower the effective impedance between
OUT+ and OUTF+ or OUT– and OUTF– below 25Ω.
To decrease filter bandwidth, add two external capacitors,
one from OUTF+ to ground, and the other from OUTF– to
ground. A single differential capacitor connected between
OUTF+ and OUTF– can also be used, but since it is being
driven differentially it will appear at each filtered output
as a single-ended capacitance of twice the value. To halve
the filter bandwidth, for example, two 36pF capacitors
could be added (one from each filtered output to ground).
Alternatively, one 18pF capacitor could be added between
the filtered outputs, again halving the filter bandwidth.
Combinations of capacitors could be used as well; a three
49.9Ω
LTC6404
LTC6404
14
OUT–
13
OUT–
13
50Ω
OUTF–
12pF
OUTF–
12pF
V–
12
50Ω
V–
12
V–
+
V–
+
FILTERED OUTPUT
(88.5MHz)
12pF
–
14
–
50Ω
–
12pF V V–
50Ω
–
12pF V V–
9
9
7
OUT+
FILTERED OUTPUT
(176MHz)
12pF
8
OUTF+
7
OUT+
8
OUTF+
6404 F07
49.9Ω
6404 F06
Figure 6. LTC6404 Internal Filter Topology
Figure 7. LTC6404 Filter Topology Modified for 2x Filter
Bandwidth (2 External Resistors)
6404f
23
LTC6404
APPLICATIONS INFORMATION
capacitor solution of 12pF from each filtered output to
ground plus a 12pF capacitor between the filtered outputs
would also halve the filter bandwidth (Figure 8).
LTC6404
14
OUT–
13
OUTF–
Noise Considerations
The LTC6404’s input referred voltage noise is on the
order of 1.5nV/√Hz. Its input referred current noise is on
the order of 3pA/√Hz. In addition to the noise generated
by the amplifier, the surrounding feedback resistors also
contribute noise. A noise model is shown in Figure 9.
The output noise generated by both the amplifier and the
feedback components is governed by the equation:
12pF
12pF
V–
12
50Ω
V–
2
+
12pF
–
⎛
⎛ RF ⎞ ⎞
2
⎜ eni • ⎜ 1+ R ⎟ ⎟ + 2 • (In • RF ) +
⎝
⎝
I ⎠⎠
FILTERED OUTPUT
(44.25MHz)
12pF
eno =
50Ω
–
12pF V V–
12pF
2
⎛
⎛ R ⎞⎞
2 • ⎜ enRI • ⎜ F ⎟ ⎟ + 2 • enRF 2
⎝ RI ⎠ ⎠
⎝
9
7
OUT+
8
OUTF+
6404 F08
A plot of this equation, and a plot of the noise generated
by the feedback components for the LTC6404 is shown
in Figure 10.
Figure 8. LTC6404 Filter Topology Modified for 1/2x Filter
Bandwidth (3 External Capacitors)
enRI22
RI2
RF2
enRF22
in+2
16
NC
15
14
IN+
OUT–
13
SHDN
OUTF–
LTC6404
V–
12
SHDN
1
V– V+
11
V+
V+
V+
2
+
V–
3
V+
VOCM
V–
V+
enof2
eno2
V– V–
2
encm
V+
10
–
V–
V–
VOCM
4
9
NC
5
6
IN–
7
OUT+
8
V–
OUTF+
6404 F09
in–2
eni2
enRI12
RI1
RF1
enRF12
Figure 9. Noise Model of the LTC6404
6404f
24
LTC6404
APPLICATIONS INFORMATION
Layout Considerations
100
TOTAL (AMPLIFIER AND
FEEDBACK NETWORK)
OUTPUT NOISE
nV/√Hz
10
FEEDBACK RESISTOR
NETWORK NOISE ALONE
1
0.1
10
100
1k
10k
RF = RI (Ω)
6404 F10
Figure 10. LTC6404-1 Output Spot Noise vs Spot Noise
Contributed by Feedback Network Alone
The LTC6404’s input referred voltage noise contributes the
equivalent noise of a 140Ω resistor. When the feedback
network is comprised of resistors whose values are less
than this, the LTC6404’s output noise is voltage noise
dominant (See Figure 10.):
⎛ R ⎞
eno ≈ eni • ⎜ 1+ F ⎟
⎝ RI ⎠
Because the LTC6404 is a very high speed amplifier, it is
sensitive to both stray capacitance and stray inductance.
Three pairs of power supply pins are provided to keep the
power supply inductance as low as possible to prevent
degradation of amplifier 2nd Harmonic performance. It is
critical that close attention be paid to supply bypassing. For
single supply applications (Pins 3, 9 and 12 grounded) it
is recommended that 3 high quality 0.1μF surface mount
ceramic bypass capacitor be placed between pins 2 and
3, between pins 11and 12, and between pins10 and 9 with
direct short connections. Pins 3, 9 and 10 should be tied
directly to a low impedance ground plane with minimal
routing. For dual (split) power supplies, it is recommended
that at least two additional high quality, 0.1μF ceramic
capacitors are used to bypass pin V+ to ground and V– to
ground, again with minimal routing. For driving large loads
(<200Ω), additional bypass capacitance may be needed for
optimal performance. Keep in mind that small geometry
(e.g. 0603) surface mount ceramic capacitors have a much
higher self resonant frequency than do leaded capacitors,
and perform best in high speed applications.
Lower resistor values (<100Ω) always result in lower noise
at the penalty of increased distortion due to increased loading of the feedback network on the output. Higher resistor
values (but still less than 400Ω) will result in higher output
noise, but improved distortion due to less loading on the
output. The optimal feedback resistance for the LTC6404
runs between 100Ω to 400Ω. Higher resistances are not
recommended.
Any stray parasitic capacitances to ground at the summing junctions IN+, and IN– should be kept to an absolute
minimum even if it means stripping back the ground plane
away from any trace attached to this node. This becomes
especially true when the feedback resistor network uses
resistor values >400Ω in circuits with RF = RI. Excessive
peaking in the frequency response can be mitigated by adding small amounts of feedback capacitance (0.5pF to 2pF)
around RF. Always keep in mind the differential nature of
the LTC6404, and that it is critical that the load impedances
seen by both outputs (stray or intended) should be as balanced and symmetric as possible. This will help preserve
the natural balance of the LTC6404, which minimizes the
generation of even order harmonics, and preserves the
rejection of common mode signals and noise.
The differential filtered outputs OUTF+ and OUTF– will have
a little higher spot noise than the unfiltered outputs (due to
the two 50Ω resistors which contribute 0.9nV/√Hz each),
but actually will provide superior Signal-to-Noise in noise
bandwidths exceeding 139MHz due to the noise-filtering
function the filter provides.
It is highly recommended that the VOCM pin be either hard
tied to a low impedance ground plane (in split supply
applications), or bypassed to ground with a high quality
ceramic capacitor whose value exceeds 0.01μF. This will
help stabilize the common mode feedback loop as well as
prevent thermal noise from the internal voltage divider and
Feedback networks consisting of resistors with values
greater than about 200Ω will result in output noise which
is resistor noise and amplifier current noise dominant.
eno ≈ 2 •
⎛
⎞
(In • RF )2 + ⎜⎝ 1+ RRF ⎟⎠ • 4 • k • T • RF
I
6404f
25
LTC6404
APPLICATIONS INFORMATION
other external sources of noise from being converted to
differential noise due to divider mismatches in the feedback
networks. It is also recommended that the resistive feedback networks be comprised of 1% resistors (or better)
to enhance the output common mode rejection. This will
also prevent VOCM referred common mode noise of the
common mode amplifier path (which cannot be filtered)
from being converted to differential noise, degrading the
differential noise performance.
Feedback factor mismatch has a weak effect on distortion.
Using 1% or better resistors should prevent mismatch
from impacting amplifier linearity. However, in single
supply level shifting applications where there is a voltage
difference between the input common mode voltage and
the output common mode voltage, resistor mismatch can
make the apparent voltage offset of the amplifier appear
worse than specified.
In general, the apparent input referred offset induced by
feedback factor mismatch is given by the equation:
VOSDIFF(APPARENT) ≈ (VINCM – VOCM) • Δβ
where
Δβ =
RI2
RI1
–
RI2 + RF 2 RI1 + RF1
VIN
2VP-P
100Ω
16
NC
15
IN+
14
OUT–
13
SHDN
OUTF–
LTC6404-1
V–
12
1
V– V+
11
V+
V+
2
0.1μF
+
V+
VOCM
V–
3
The LTC6404’s rail-to-rail output and fast settling time make
the LTC6404 ideal for interfacing to low voltage, single
supply, differential input ADCs. The sampling process of
ADCs create a sampling glitch caused by switching in the
sampling capacitor on the ADC front end which momentarily
“shorts” the output of the amplifier as charge is transferred
between the amplifier and the sampling cap. The amplifier
must recover and settle from this load transient before
this acquisition period ends for a valid representation of
the input signal. In general, the LTC6404 will settle much
more quickly from these periodic load impulses than
from a 2V input step, but it is a good idea to either use
the filtered outputs to drive the ADC (Figure 11 shows an
example of this), or to place a discrete R-C filter network
between the differential unfiltered outputs of the LTC6404
and the input of the ADC to help absorb the charge transfer
required during the ADC sampling process. The capacitance of the filter network serves as a charge reservoir
to provide high frequency charging during the sampling
process, while the two resistors of the filter network are
used to dampen and attenuate any charge kickback from
the ADC. The selection of the R-C time constant is trial
and error for a given ADC, but the following guidelines
are recommended: Choosing too large of a resistor in the
decoupling network (leaving insufficient settling time)
100Ω
SHDN
3.3V
Interfacing the LTC6404 to A/D Converters
V+
10
–
V–
V– V–
VOCM
4
CONTROL
VCM
2.2μF
0.1μF
LTC2207
3.3V
0.1μF
D15
•
•
D0
AIN+
AIN–
GND
3.3V
VDD
1μF
1μF
9
0.1μF
5
NC
100Ω
6
IN–
7
OUT+
8
OUTF+
6404 F11
100Ω
Figure 11. Interfacing the LTC6404-1 to a High Speed 105Msps ADC
6404f
26
LTC6404
APPLICATIONS INFORMATION
will create a voltage divider between the dynamic input
impedance of the ADC and the decoupling resistors.
Choosing too small of a resistor will possibly prevent the
resistor from properly damping the load transient caused
by the sampling process, prolonging the time required for
settling. 16-bit applications typically require a minimum
of 11 R-C time constants. It is recommended that the capacitor chosen have a high quality dielectric (for example,
C0G multilayer ceramic).
PACKAGE DESCRIPTION
UD Package
16-Lead Plastic QFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1691)
0.70 ±0.05
3.50 ± 0.05
1.45 ± 0.05
2.10 ± 0.05 (4 SIDES)
PACKAGE OUTLINE
0.25 ±0.05
0.50 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
3.00 ± 0.10
(4 SIDES)
BOTTOM VIEW—EXPOSED PAD
PIN 1 NOTCH R = 0.20 TYP
OR 0.25 × 45° CHAMFER
R = 0.115
TYP
0.75 ± 0.05
15
16
PIN 1
TOP MARK
(NOTE 6)
0.40 ± 0.10
1
1.45 ± 0.10
(4-SIDES)
2
(UD16) QFN 0904
0.200 REF
0.00 – 0.05
NOTE:
1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
0.25 ± 0.05
0.50 BSC
6404f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
27
LTC6404
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
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AV = 20dB, 90mA Supply Current, IMD3 = –65dBc at 300MHz
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AV = 26dB, 85mA Supply Current, IMD3 = –71dBc at 300MHz
LTC6401-8
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AV = 8dB, 45mA Supply Current, IMD3 = –80dBc at 140MHz
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AV = 20dB, 50mA Supply Current, IMD3 = –74dBc at 140MHz
LTC6401-26
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AV = 26dB, 45mA Supply Current, IMD3 = –72dBc at 140MHz
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LTC6406
3GHz Low Noise, Rail-to-Rail Input Differential ADC Driver
Low Noise: 1.6nV/√Hz, Low Power: 18mA
LT6600-2.5
Very Low Noise, Fully Differential Amplifier and 2.5MHz Filter
86dB S/N with 3V Supply, SO-8 Package
LT6600-5
Very Low Noise, Fully Differential Amplifier and 5MHz Filter
82dB S/N with 3V Supply, SO-8 Package
LT6600-10
Very Low Noise, Fully Differential Amplifier and 10MHz Filter
82dB S/N with 3V Supply, SO-8 Package
LT6600-15
Very Low Noise, Fully Differential Amplifier and 15MHz Filter
76dB S/N with 3V Supply, SO-8 Package
LT6600-20
Very Low Noise, Fully Differential Amplifier and 20MHz Filter
76dB S/N with 3V Supply, SO-8 Package
LTC6403-1
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10.8mA Supply Current, –95dB Distortion at 3MHz
6404f
28 Linear Technology Corporation
LT 0608 • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
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© LINEAR TECHNOLOGY CORPORATION 2008