Today ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems ! Operating Regions (continued) " " " Lec 8: September 18, 2015 MOS Transistor Operating Regions Part 2 " ! Drain Induced Barrier Lowering " 1 Penn ESE370 Fall2015 – Khanna Resistive Saturation Velocity Saturation Subthreshold Vth Penn ESE370 Fall2015 – Khanna 2 Channel Evolution - Increasing Vgs Last Time… 3 Penn ESE370 Fall2015 – Khanna Threshold ! Linear Region Voltage where strong inversion occurs # threshold voltage " " Vth ~= 2ϕF Engineer by controlling doping (NA) ! VGS>Vth and VDS small #N & φ F = φT ln% A ( $ ni ' COX = εOX tOX " € V2 % I DS = µ nCOX W $(VGS −Vth ) VDS − DS ' L # 2 & ( ) € Penn ESE370 Fall2015 – Khanna 4 Penn ESE370 Fall2015 – Khanna 5 Penn ESE370 Fall2015 – Khanna 6 1 Voltage along Channel ! Channel Field What does voltage along the channel look like? ! When voltage gap VG-Vx drops below Vth, drops out of inversion " What if VDS > VGS – Vth #VDS – VGS > Vth? " Upper limit on current, channel is “pinched off” VD −VS x = VT L VG −VS −VT V −V x= L = GS T L VD −VS VDS VG −V (x) = VG −VS + VDS > VGS −VT ⇒ x < L x=0 x=L VD −VS x L V −V VG −V (x) = VG −VS + D S x L V (x) = VS + Vd V(x) Vs x Penn ESE370 Fall2015 – Khanna 7 Penn ESE370 Fall2015 – Khanna Saturation ! MOSFET – IV Characteristics In saturation, VDS-effective=Vx= VGS-VT VDS <VGS -VTH " W %) V2 , IDS = µn COX $ '+(VGS − VT )VDS − DS . # L &* 2 ! VGS -Vth IDS Becomes: VDS ≥VGS -VTH 2 " W %) 2 (VGS − VT ) ,. IDS = µn COX $ '+(VGS − VT ) − # L &+* 2 .- € IDS = € 8 Penn ESE370 Fall2015 – Khanna 2 µn COX " W % $ ' (V − VT ) 2 # L & GS [ ] 9 Penn ESE370 Fall2015 – Khanna VDS 10 € Preclass 1 ! New Stuff What is electrical field in channel? Leff = 25nm,VDS = 1V Field = ! VDS Leff Velocity: v = F ⋅ µn ! ! Penn ESE370 Fall2015 – Khanna 11 Electron mobility: µn = 500cm / (V ⋅ s) What is electron velocity? Penn ESE370 Fall2015 – Khanna 2 12 2 Moving Charge Short Channel Field = !1$ I = # &V "R% v=µ⋅ ! ! I increases linearly in V What’s I? " " ! ! ΔQ/Δt Speed at which charge moves VDS , v = µn ⋅ F Leff VDS " µ n =$ Leff $# Leff ! " % ''VDS & ! Velocity increases linearly in V 13 Short Channel ! ! At what voltage do we hit the speed limit? (preclass 1d) " Vdsat = voltage at which velocity (current) saturates ~ 105m/s How does this relate to preclass 1b calculated velocity? Encounter velocity saturation when channel short " Modern processes, L is short enough to reach this region of operation Penn ESE370 Fall2015 – Khanna 15 Velocity Saturation ! 14 Limited by scattering effects " ! ! Increases with voltage There is a limit to how fast carriers can move " Penn ESE370 Fall2015 – Khanna Velocity Saturation Model assumes carrier velocity increases with field " Increases with voltage Are there limits to how fast things (including electrons) can move? What’s a moving electron? Penn ESE370 Fall2015 – Khanna ! Model assumes carrier velocity increases with field Penn ESE370 Fall2015 – Khanna 16 Velocity Saturation Once velocity saturates: ! W $( V2 + I DS = µ nCOX # &*(VGS −Vth ) VDS − DS " L %) 2 , ! V $ ( + V VDS = VDSAT ⇒ I DS = # µ n DSAT & COX W *(VGS −Vth ) − DSAT ) " L % 2 , ( + Lv V VDSAT ≈ SAT ⇒ I DS ≈ vsat COX W *(VGS −Vth ) − DSAT ) µn 2 , ! Penn ESE370 Fall2015 – Khanna 17 Long Channel Penn ESE370 Fall2015 – Khanna ! Short Channel 18 3 Velocity Saturation Velocity Saturation ! Once velocity saturates we can still increase current with parallelism " Penn ESE 370 Fall 2015 - Khanna 19 Effectively make a wider device Penn ESE370 Fall2015 – Khanna 20 Below Threshold ! Subthreshold ! Transition from insulating to conducting is nonlinear, but not abrupt Current does flow " 21 Penn ESE370 Fall2015 – Khanna Subthreshold Penn ESE370 Fall2015 – Khanna If VGS < Vth , ! W/L dependence follow from resistor behavior (parallel, series) " ! VGS −Vth $ # & " nkT /q % ! VDS $ $ ! # & #1− e"−kT /q % & (1+ λVDS ) # & " % ! Not shown explicitly in text λ is a channel-length modulation parameter " Defined empirically ! V −V $ ! VDS $ $ # & ! W $ # GS th & ! I DS = I S # & e" nkT /q % #1− e"−kT /q % & (1+ λVDS ) # & "L% " % Current is from the parasitic NPN BJT transistor when gate is unbiased and there is no conducting channel Penn ESE370 Fall2015 – Khanna 22 Subthreshold ! !W $ I DS = I S # & e "L% But exponentially dependent on VGS 23 Penn ESE370 Fall2015 – Khanna 24 4 Steady State ! ! ! Leakage What current flows in steady state? What causes (and determines) the magnitude of current flow? Which device? ! ! Penn ESE370 Fall2015 – Khanna 25 Subthreshold Slope ! Penn ESE370 Fall2015 – Khanna ! kT S = n$ ' ln(10) # q& " Exponent in VGS determines how steep the turnon is " % kT S = n$ ' ln(10) # q& Units: V/dec Every S Volts, IDS is scaled by factor of 10 " " € !W $ I DS = I S # & e "L% Units: V/dec Every S Volts, IDS is scaled by factor of 10 € ! VGS −Vth $ # & " nkT /q % ! VDS $ $ ! # & #1− e"−kT /q % & (1+ λVDS ) # & " % Penn ESE370 Fall2015 – Khanna ! n – depends on electrostatics " " " 27 IDS vs. VGS n=1 # S=60mV at Room Temp. (ideal) n=1.5 # S=90mV Single gate structure showing S=90-110mV Penn ESE370 Fall2015 – Khanna 28 IDS vs. VGS (Logscale) Penn ESE370 Fall2015 – Khanna 26 Subthreshold Slope Exponent in VGS determines how steep the turnon is " % " Call this steady-state current flow leakage Idsleak S 29 Penn ESE370 Fall2015 – Khanna (Logscale) 30 5 Subthreshold Slope ! ! If S=100mV and Vth=300mV, what is Ids(Vgs=300mV)/Ids(Vgs=0V) ? Threshold What if S=60mV? " kT % S = n$ ' ln(10) # q& ! V −V $ ! VDS $ $ # & ! W $ # GS th & ! I DS = I S # & e" nkT /q % #1− e"−kT /q % & (1+ λVDS ) # & € "L% " % Penn ESE370 Fall2015 – Khanna 31 Threshold ! ! ! 33 VDS impact ! In practice, VDS impacts state of channel Penn ESE370 Fall2015 – Khanna 34 VDS impact Increasing VDS, already depletes portions of channel ! ! Penn ESE370 Fall2015 – Khanna 32 VDS impact Describe VT as a constant Induce enough electron collection to invert channel Penn ESE370 Fall2015 – Khanna Penn ESE370 Fall2015 – Khanna 35 Increasing VDS, already depletes portions of channel Need less charge, less voltage to create inversion layer Penn ESE370 Fall2015 – Khanna 36 6 Drain-Induced Barrier Lowering (DIBL) DIBL Impact VT VDS Penn ESE370 Fall2015 – Khanna 37 In a Gate? ! " " ! Which device, has large Vds? " " " 39 In a Gate " Penn ESE370 Fall2015 – Khanna 40 PMOS VDS largest for off device " Easier to turn on # & V I DS ≈ ν sat COX W %VGS −Vth − DSAT ( $ 2 ' Speed of switching? Leakage? Penn ESE370 Fall2015 – Khanna ! VDS largest for output charging/discharging device Vin=Vdd ? Vin=Gnd ? How effect operation? " 38 In a Gate What does it impact most? " Penn ESE370 Fall2015 – Khanna ! Analagous phenomena to NMOS Signs different ! Reason based on oppositely charged carriers ! Easier to turn on Leak more " Negative Vth ! V −V $ ! VDS $ $ # & ! W $ # GS th & ! I DS = I S # & e" nkT /q % #1− e"−kT /q % & (1+ λVDS ) # & "L% " % Penn ESE370 Fall2015 – Khanna 41 Penn ESE370 Fall2015 – Khanna 42 7 Big Idea ! Admin 3 Regions of operation for MOSFET " " " " " ! Text 3.3.2 – highly recommend read Office Hours: M (Khanna), T (Giesen) HW4 due Wednesday ! Midterm 1 Review session on Thursday ! Midterm 1 Monday 9/28 ! Subthreshold Linear Saturation ! " Pinch Off Velocity Saturation, DIBL " Short channel " " " If you haven’t looked at it yet, you’re behind! 5pm? 6pm? 7pm? No Lecture Midterms from 2010, 2011, 2012, 2013, 2014 " " Penn ESE370 Fall2015 – Khanna 43 All online with and without answers Suggest start without answers Penn ESE370 Fall2015 – Khanna 44 8