Practical Applications of Boolean Satisfiability

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Practical Applications of Boolean Satisfiability

Joao Marques-Silva

School of Electronics and Computer Science

University of Southampton

Motivation – Many Uses of Satisfiability I

• Many (practical) applications:

– Formal methods:

Hardware model checking ; Software model checking; Termination analysis of term-rewrite systems; Test pattern generation (testing of software & hardware); etc.

– Artificial intelligence:

Planning ; Knowledge representation; Games (n-queens, sudoku, social golpher’s, etc.)

– Bioinformatics:

Haplotype inference ; Pedigree checking; Maximum quartet consistency; etc.

– Design automation:

Equivalence checking ; Delay computation; Fault diagnosis; Noise analysis; etc.

– Security:

Cryptanalysis; Inversion attacks on hash functions; etc.

– Computationally hard problems:

Graph coloring; Traveling salesperson; etc.

– Mathematical problems:

◮ van der Waerden numbers; etc.

Motivation – Many Uses of Satisfiability II

• Core engine for (many) other problem domains:

– Extensions of Satisfiability :

0-1 Integer Linear Programming

Quantified Boolean Formulas

Model counting

Maximum Satisfiability

Satisfiability Modulo Theories

– Integration with theorem provers

HOL; Isabelle; ...

• In this talk:

– Boolean Satisfiability and extensions

– Modeling with Satisfiability and extensions

– Representative applications of Satisfiability

Outline

What is Boolean Satisfiability?

Extensions of SAT

Modeling with SAT

Practical Applications

Combinational Equivalence Checking (CEC)

Automatic Test Pattern Generation (ATPG)

Boolean Satisfiability

• Boolean formula ϕ is defined over a set of propositional variables x

1 , . . . , x n

, using the standard propositional connectives

→ , ↔ , and parenthesis

¬ , ∧ , ∨ ,

– The domain of propositional variables is { 0

,

1 }

– Example: ϕ

( x

1 , . . . , x

3

) = (( ¬ x

1

∧ x

2

) ∨ x

3

) ∧ ( ¬ x

2

∨ x

3

)

• Conjunctive normal form (CNF) formula ϕ

: conjunction of disjunctions ( clauses ) of literals , where a literal is a variable or its complement

– Example: ϕ

( x

1 , . . . , x

3

) = ( ¬ x

1

∨ x

2

) ∧ ( ¬ x

2

∨ x

3

)

• Boolean satisfiability (SAT):

– Find an assignment to the variables x

1 , . . . , x n such that ϕ

( x

1 , . . . , x n

) = 1, or prove that no such assignment exists

• SAT is an NP-complete decision problem

[Cook’71]

Example: Graph Coloring

• Is it possible to assign one of K colors to each of the vertices of graph G = ( V

,

E ) such that adjacent vertices are assigned different colors

Valid coloring Invalid coloring

• SAT model:

– Given N = | V | vertices and K colors, create N × K variables: x ij

= 1 iff vertex i is assigned color j ; 0 otherwise

– For each edge ( u

, v ), require different assigned colors to u and v :

1 ≤ j ≤ K

,

( ¬ x uj

∨ ¬ x vj

)

– Each vertex is assigned

1 ≤ exactly i ≤ N

, one color:

K j =1 x ij

= 1

Outline

What is Boolean Satisfiability?

Extensions of SAT

Modeling with SAT

Practical Applications

Combinational Equivalence Checking (CEC)

Automatic Test Pattern Generation (ATPG)

Well-Known Extensions of SAT

• Consider extended constraints

– Pseudo-Boolean formulas (PBS/PBO) :

Linear inequalities over Boolean variables w/o or w/ cost function

– Also known as 0-1 Integer Linear Programming

• Maximize number of satisfied clauses

– ( Weighted ) ( Partial ) Maximum Satisfiability

• Quantify the variables

– Quantified Boolean Formulas (QBF) :

Boolean formulas w/ variables existentially or universally quantified

• Decidable fragments of FOL

– Satisfiability Modulo Theories

– Decision procedures for a number of theories exist

Linear Integer Arithmetic; Difference Arithmetic; Uninterpreted

Functions; ...

• Some extensions promising; still far from the impact of SAT solvers

Minimum Vertex Cover

• The problem:

– Graph G = ( V

,

E )

– Vertex cover U ⊆ V , such that for all edges ( v i v j

∈ U .

, v j

), either v

– Minimum vertex cover: vertex cover U of minimum size i

∈ U or

• Partial MaxSAT formulation:

– Associate x i otherwise v i with each

∈ V − U .

v i

∈ V , such that x i

= 1 iff v i

∈ U ,

– Must satisfy (i.e.

hard ) clauses: ( x i

∨ x j

) for each edge ( v

– Preferable to satisfy (i.e.

soft ) clauses: ( ¬ x i i , v j

)

) for each vertex v i

∈ E

I.e. give preference not to include vertices in U v

2 v

3 v

1 ϕ H

= { ( x

1

∨ x

2

)

,

( x

1

∨ x

3

)

,

( x

1

∨ x

4

) } ϕ

S

= { ( ¬ x

1

)

,

( ¬ x

2

)

,

( ¬ x

3

)

,

( ¬ x

4

) } v

4

Outline

What is Boolean Satisfiability?

Extensions of SAT

Modeling with SAT

Practical Applications

Combinational Equivalence Checking (CEC)

Automatic Test Pattern Generation (ATPG)

Representing Boolean Circuits / Formulas I

Satisfiability problems can be defined on Boolean circuits/formulas

Can represent circuits/formulas as CNF formulas

– For each (simple) gate, CNF formula encodes the consistent assignments to the gate’s inputs and output

[Tseitin’68]

Given z = OP( x

, y ) , represent in CNF z ↔ OP( x

, y )

– CNF formula for the circuit is the conjunction of CNF formula for each gate ϕ ϕ c t

= (

= ( a

¬ r

∨ c ) t )

( b

(

¬ s c

) t

)

(

¬

( a r

∨ ¬

∨ s b ∨ ¬

∨ ¬ t ) c ) a b r s t c

Representing Boolean Circuits / Formulas II

a b c a b c ϕ c

(a,b,c)

0 0 0

0 0 1

0

1

0 1 0

0 1 1

1 0 0

0

1

0

1 0 1

1 1 0

1 1 1

1

1

0 ϕ c

= ( a ∨ c ) ∧ ( b ∨ c ) ∧ ( ¬ a ∨ ¬ b ∨ ¬ c )

Representing Boolean Circuits / Formulas III

• CNF formula for the circuit is the conjunction of the CNF formula for each gate

– Can specify objectives with additional clauses a b x c y d z = 1?

ϕ

= ( a ∨ x ) ∧ ( b ∨ x ) ∧ ( ¬ a ∨ ¬ b ∨ ¬ x ) ∧

( x ∨ ¬ y ) ∧ ( c ∨ ¬ y ) ∧ ( ¬ x ∨ ¬ c ∨ y ) ∧

( ¬ y ∨ z ) ∧ ( ¬ d ∨ z ) ∧ ( y ∨ d ∨ ¬ z ) ∧

( z )

• Note: z = d ∨ ( c ∧ ( ¬ ( a ∧ b )))

– No distinction between Boolean circuits and formulas

Representing AtLeast, AtMost and Equals Constraints

How to represent in CNF the constraint

P

N j =1 x j

≥ 1 ?

– Standard solution: ( x

1

. . .

∨ x

N

)

How to represent in CNF the constraint

P

N j =1 x ij

≤ 1 ?

– Naive solution: ∀ j

1

=1

..

N

∀ j

2

= j

1

+1

..

N

( ¬ x ij

1

∨ ¬ x ij

2

)

Number of clauses grows quadratically with N

– More compact (e.g. linear) solutions possible

How to represent in CNF the constraint

P

N j =1 x ij

= 1 ?

– Standard solution: one AtMost 1 and one AtLeast 1 constraints

• Additional constraints:

P

N j =1 x j

≥ k ;

P

N j =1 a j x j

≥ k ;

P

N j =1 x j

≤ k

P

N j =1 a j x j

≤ k

Example of CNF Encoding

• Encode

P n j =1 x j

≤ 1 with sequential counter :

V x

1

1

< i

< n s

1

((

)

¬

∧ x i

( ¬

∨ x s n i

∨ ¬ s n

1

)

) ∧ ( ¬ s i

1

∨ s i

) ∧ ( ¬ x i

∨ ¬ s i

1

))

– If x j

= 1, all s i variables assigned

All other x variables take value 0

– If all x j

= 0, can find consistent assignment to s i variables

– O ( n ) clauses ; O ( n ) auxiliary variables

Outline

What is Boolean Satisfiability?

Extensions of SAT

Modeling with SAT

Practical Applications

Combinational Equivalence Checking (CEC)

Automatic Test Pattern Generation (ATPG)

Successful SAT Applications

• Combinational equivalence checking (CEC)

• Automatic test pattern generation (ATPG)

• Hardware model checking (BMC)

• AI Planning

• Haplotyping

(see paper)

(see paper)

(see paper)

The CEC Problem

Combinational circuit C

A

, with n inputs and m outputs

Combinational circuit C

B

, with n inputs and m outputs

• Are the two circuits equivalent?

– A complicated problem formulation:

Are the outputs equivalent for all input values?

– A simpler alternative:

Are there (at least one) input values that distinguish outputs of the two circuits?

Solving CEC with a

Miter x

1

Circuit A y

1 x n

Circuit B y m w

1 o = 1?

w m

• Can easily be represented in CNF, and solved with SAT solver

– Note: CEC is a difficult problem, and more sophisticated techniques are often used

The ATPG Problem

• Digital integrated circuits can exhibit defects

Physical defects are modeled as logical faults

Most often used fault model: single stuck-at fault model

– Circuit lines stuck-at a fixed logic value

◮ sa-0 : Fixed at 0 sa-1 : Fixed at 1

• Example: a b v c x x sa−0 d x’ y w

– Fault x stuck-at 0 causes line x to be fixed at value 0 z

Solving ATPG with a

Miter x

1 y

1

Good circuit x n y m

Faulty circuit w

1 o = 1?

w m

• Can easily be represented in CNF, and solved with SAT solver

– Note 1: Simplistic model; actual SAT formulation significantly more complex

– Note 2: Dedicated algorithms can be competitive with SAT

Example

Miter

for ATPG

a b v c v c d y x w d x = 0 y w z

Good z

Faulty o = 1 ?

Conclusions

• Overview of practical uses of SAT

– Techniques for modeling computational problems with SAT

– Brief survey of SAT extensions

– Representative SAT applications

Paper describes several additional applications

• The future of SAT and SAT extensions

– Steady improvements to core algorithms (SAT, PB, MaxSAT, SMT, etc.)

See results of recent competitions, SAT, PB, etc.

– Increasing number of practical applications

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