AOD420
N-Channel Enhancement Mode Field Effect Transistor
General Description
Features
The AOD420 uses advanced trench technology to
provide excellent RDS(ON) and low gate charge. This
device is suitable for use as a load switch or in PWM
applications.
VDS (V) = 30V
ID = 10A (VGS = 10V)
RDS(ON) < 28mΩ (VGS = 10V)
RDS(ON) < 42mΩ (VGS = 4.5V)
-RoHS Compliant
-Halogen Free*
100% UIS Tested!
100% Rg Tested!
TO-252
D-PAK
Top View
D
Bottom View
D
G
S
S
G
S
G
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Symbol
Drain-Source Voltage
VDS
Gate-Source Voltage
VGS
TC=25°C
Continuous Drain
Current G
Maximum
30
Units
V
±20
V
10
TC=100°C
ID
10
IDM
30
Avalanche Current C
IAR
15
A
Repetitive avalanche energy L=0.1mH C
TC=25°C
EAR
36
mJ
Pulsed Drain Current
C
Power Dissipation
B
TC=100°C
Power Dissipation
A
TA=70°C
TA=25°C
Thermal Characteristics
Parameter
Maximum Junction-to-Ambient
Maximum Junction-to-Ambient
Maximum Junction-to-Case
B
60
PD
2.5
TJ, TSTG
A
t ≤ 10s
Steady-State
Steady-State
Alpha & Omega Semiconductor, Ltd.
W
1.6
-55 to 175
Symbol
A
W
30
PDSM
Junction and Storage Temperature Range
A
RθJA
RθJC
Typ
16.7
40
1.9
°C
Max
25
50
2.5
Units
°C/W
°C/W
°C/W
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AOD420
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
STATIC PARAMETERS
Drain-Source Breakdown Voltage
BVDSS
IDSS
Zero Gate Voltage Drain Current
Conditions
Min
ID=250µA, VGS=0V
30
5
Gate-Body leakage current
VDS=0V, VGS= ±20V
Gate Threshold Voltage
VDS=VGS ID=250µA
1
On state drain current
VGS=4.5V, VDS=5V
40
VGS=10V, ID=10A
100
nA
3
V
21
28
31
40
42
A
Static Drain-Source On-Resistance
VGS=4.5V, ID=7A
32.5
gFS
Forward Transconductance
VDS=5V, ID=10A
15.6
VSD
Diode Forward Voltage
IS=1A,VGS=0V
0.75
IS
Maximum Body-Diode Continuous Current
TJ=125°C
DYNAMIC PARAMETERS
Input Capacitance
Ciss
Output Capacitance
Reverse Transfer Capacitance
Rg
Gate resistance
710
VGS=0V, VDS=15V, f=1MHz
mΩ
1
V
10
A
850
pF
120
1.1
mΩ
S
pF
72
VGS=0V, VDS=0V, f=1MHz
µA
1.8
RDS(ON)
Crss
Units
1
TJ=55°C
IGSS
Coss
Max
V
VDS=24V, VGS=0V
VGS(th)
ID(ON)
Typ
pF
3.6
Ω
SWITCHING PARAMETERS
Qg(10V) Total Gate Charge
14.4
18
nC
Qg(4.5V) Total Gate Charge
7
8.4
nC
Qgs
Gate Source Charge
Qgd
Gate Drain Charge
tD(on)
Turn-On DelayTime
tr
Turn-On Rise Time
tD(off)
Turn-Off DelayTime
tf
Turn-Off Fall Time
VGS=10V, VDS=15V, ID=10A
VGS=10V, VDS=15V, RL=1.5Ω,
RGEN=3Ω
2.6
nC
2.7
nC
5.6
ns
2.4
ns
15.6
ns
2.2
ns
trr
Body Diode Reverse Recovery Time
IF=10A, dI/dt=100A/µs
13.4
Qrr
Body Diode Reverse Recovery Charge IF=10A, dI/dt=100A/µs
4.4
21
ns
nC
A: The value of R θJA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =25°C. The
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any a given application
depends on the user's specific board design, and the maximum temperature fo 175°C may be used if the PCB allows it.
B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C: Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C.
D. The R θJA is the sum of the thermal impedence from junction to case R θJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max.
F. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with T A=25°C. The SOA
curve provides a single pulse rating.
G. The maximum current rating is limited by bond-wires.
*This device is guaranteed green after data code 8X11 (Sep 1ST 2008).
Rev5: Oct 2008
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Alpha & Omega Semiconductor, Ltd.
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AOD420
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
50
20
10V
5V
7V
40
VDS=5V
16
4.5V
30
12
ID(A)
ID (A)
4V
125°C
8
20
VGS=3.5V
10
25°C
4
3.0V
0
0
0
1
2
3
4
1.5
5
2
50
3.5
4
1.8
Normalized On-Resistance
45
40
RDS(ON) (mΩ )
3
VGS(Volts)
Figure 2: Transfer Characteristics
VDS (Volts)
Fig 1: On-Region Characteristics
35
VGS=4.5V
30
25
20
VGS=10V
15
10
ID=10A
1.6
VGS=10V
1.4
VGS=4.5V
1.2
1
0.8
0
5
10
15
20
0
ID (A)
Figure 3: On-Resistance vs. Drain Current and
Gate Voltage
25
50
75
100
125
150
175
Temperature (°C)
Figure 4: On-Resistance vs. Junction
Temperature
60
1.0E+01
1.0E+00
50
ID=10A
1.0E-01
40
IS (A)
RDS(ON) (mΩ )
2.5
125°C
125°C
1.0E-02
25°C
30
25°C
1.0E-03
20
1.0E-04
1.0E-05
10
2
4
6
8
10
VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
Alpha & Omega Semiconductor, Ltd.
0.0
0.2
0.4
0.6
0.8
1.0
VSD (Volts)
Figure 6: Body-Diode Characteristics
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AOD420
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
1000
10
VDS=15V
ID=10A
800
Capacitance (pF)
VGS (Volts)
8
6
4
2
600
400
Coss
0
0
4
8
12
16
0
Qg (nC)
Figure 7: Gate-Charge Characteristics
100.0
5
10
15
20
25
VDS (Volts)
Figure 8: Capacitance Characteristics
30
60
RDS(ON)
limited
1ms
10ms
10.0
100µs
0.1s
1s
1.0
10s
TJ(Max)=150°C
TA=25°C
1
10
1
20
0.1
1
10
100
1000
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-toAmbient (Note F)
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
D=Ton/T
TJ,PK =TA+PDM.ZθJA.RθJA
RθJA=50°C/W
30
0
0.001
100
VDS (Volts)
10
40
10
DC
0.1
0.1
TJ(Max)=150°C
TA=25°C
50
Power (W)
ID (Amps)
Crss
200
0
Zθ JA Normalized Transient
Thermal Resistance
Ciss
0.01
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
0.1
PD
0.01
Ton
Single Pulse
0.001
0.00001
0.0001
0.001
0.01
0.1
1
T
10
100
1000
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Alpha & Omega Semiconductor, Ltd.
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AOD420
Gate Charge Test Circuit & Waveform
Vgs
Qg
10V
+
+ Vds
VDC
-
Qgs
Qgd
VDC
DUT
-
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
Vds
DUT
Vgs
90%
+ Vdd
VDC
-
Rg
10%
Vgs
Vgs
td(on)
tr
td(off)
ton
tf
toff
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
2
EAR= 1/2 LIAR
Vds
BVDSS
Vds
Id
+ Vdd
Vgs
Vgs
I AR
VDC
-
Rg
Id
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Q rr = - Idt
Vds +
DUT
Vds -
Isd
Vgs
Ig
Alpha & Omega Semiconductor, Ltd.
Vgs
L
Isd
+ Vdd
t rr
dI/dt
I RM
Vdd
VDC
-
IF
Vds
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