LT6558 - Linear Technology

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LT6558
550MHz, 2200V/µs Gain of 1,
Single Supply Triple Video
Amplifier with Input Bias Control
FEATURES
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DESCRIPTION
–3dB Small-Signal Bandwidth: 550MHz
–3dB 2VP-P Large-Signal Bandwidth: 400MHz
Slew Rate: 2200V/µs
Fixed Gain of 1, No External Resistors Required
AC Coupling with Programmable DC Input Bias
Output Swings to 0.8V of Supply Rails
Full Video Swing with 5V Single Supply
Differential Gain: 0.02%
Differential Phase: 0.02°
Enable/Shutdown Pin
High Output Current: ±90mA
Supply Range: 3V to 7.5V
Operating Temperature Range: –40°C to 85°C
Available in 16-Lead SSOP and 5mm × 3mm DFN
Packages
APPLICATIONS
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The LT®6558 is a high speed triple video amplifier with an
internal fixed gain of 1 and a programmable DC input bias
voltage. This amplifier features a 400MHz 2VP-P signal
bandwidth, 2200V/µs slew rate and a unique ability to drive
heavy output loads to 0.8V of the supply rails, making the
LT6558 ideal for a single 5V supply, wideband video application. With just one resistor, the inputs of all three amplifiers
can be programmed to a common voltage level, simplifying
and reducing the need for external circuitry in AC-coupled
applications. Without the programming resistor, the input
bias circuit becomes inactive, allowing the use of an external
clamp circuit or direct coupled input.
The LT6558 has separate power supply and ground pins for
each amplifier to improve channel separation and to ease
power supply bypassing. The LT6558 provides uncompromised performance in many high speed applications
where a low voltage, single supply is required.
The LT6558 is available in 16-lead SSOP and 5mm × 3mm
DFN packages.
LCD Video Projectors
RGB HD Video Amplifiers
Coaxial Cable Drivers
Low Supply ADC Drivers
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
AC-Coupled Triple Video Driver
BCV
EN
GND
LT6558
V+
Fast Large-Signal Transient Response
5V
158Ω
5
22µF
IN R
+
–
220µF
OUT R
4
V+ R
GND R
5V
22µF
IN G
IN G
+
–
220µF
OUT G
V+ G
GND G
RL*
5V
22µF
IN B
IN B
GND B
+
–
VS = 5V
VIN = 2VP-P
RL = 150Ω
RL*
OUTPUT (V)
IN R
3
2
1
0
–10 –8 –6 –4 –2 0 2
TIME (ns)
220µF
OUT B
4
6
8
10
6558 TA01b
V+ B
5V
RL*
6558 TA01a
*50Ω OR GREATER FOR RL
6558f
1
LT6558
ABSOLUTE MAXIMUM RATINGS
(Note 1)
Total Supply Voltage (VS+ to GND) ...........................7.5V
Input Current........................................................±10mA
Output Current (Note 2) .......................................±90mA
Output Short-Circuit Duration (Note 2) ............ Indefinite
Operating Temperature Range (Note 3) ... –40°C to 85°C
Specified Temperature Range (Note 4) .... –40°C to 85°C
Junction Temperature
SSOP ................................................................ 150°C
DFN................................................................... 125°C
Storage Temperature Range
SSOP ................................................. –65°C to 150°C
DFN.................................................... –65°C to 125°C
Lead Temperature (Soldering, 10 sec)
SSOP ................................................................ 300°C
PACKAGE/ORDER INFORMATION
TOP VIEW
TOP VIEW
EN
1
GND
2
IN R
3
GND R
4
IN G
5
GND G
6
IN B
7
GND B
16 BCV
G = +1
15
V+
14 OUT R
G = +1
13 V+ R
12 OUT G
G = +1
8
11
V+ G
10 OUT B
9
V+ B
EN
1
GND
2
IN R
3
GND R
4
16 BCV
17
G = +1
15 V+
14 OUT R
G = +1
13 V+ R
12 OUT G
IN G
5
GND G
6
IN B
7
10 OUT B
GND B
8
9
G = +1
11 V+ G
V+ B
DHC PACKAGE
16-LEAD (5mm × 3mm) PLASTIC DFN
TJMAX = 125°C, θJA = 40°C/W
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
GN PACKAGE
16-LEAD PLASTIC SSOP
TJMAX = 150°C, θJA = 110°C/W
ORDER PART NUMBER
GN PART MARKING
ORDER PART NUMBER
DHC PART MARKING*
LT6558CGN
LT6558IGN
6558
6558I
LT6558CDHC
LT6558IDHC
6558
6558
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VS = 5V, RL = 150Ω to VS/2, VEN = 0.4V, RBCV = open, unless
otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
VOS
Input Offset Voltage
VIN = 2.5V
IIN
Input Current
RIN
Input Resistance
CIN
Input Capacitance
VIN = 2.5V
VIN = 2V to 3V, BCV (Pin 16) Open
f = 1MHz
MIN
TYP
MAX
●
12
15
45
55
mV
mV
●
35
45
70
100
µA
µA
●
200
150
UNITS
450
400
kΩ
kΩ
1.4
pF
6558f
2
LT6558
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VS = 5V, RL = 150Ω to VS/2, VEN = 0.4V, RBCV = open, unless
otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
AV ERR
Gain Error
VIN = 1.5V to 3.5V
AV MATCH
Gain Match Between Channels
VIN(DC)
Input Voltage Bias
PSRR
Power Supply Rejection Ratio
VOL
Output Voltage Swing Low
VOH
Output Voltage Swing High
IS
Supply Current per Amplifier
MIN
VIN = 1.5V to 3.5V
RBCV = 158Ω
VS = 4V to 6V, VIN = 1.25V
TYP
MAX
UNITS
●
±0.7
±0.9
±2.0
±2.5
%
%
●
±0.02
±0.05
±1.5
±2.5
%
%
3
3.5
V
V
●
2.0
1.5
2.5
2.8
●
42
38
50
47
0.8
0.9
●
●
Total Supply Current (Disabled)
VEN = 0.4V, RL = ∞, Includes IS of V+
(Pin 15)
VEN = Open, RL = ∞
IEN
Enable Pin Current
ISC
Short-Circuit Current
SR
Slew Rate
VOUT = 1.25V to 3.75V (Note 5)
–3dB BW
–3dB Bandwidth
VEN = 0.4V
4.1
4.0
dB
dB
0.9
1.0
4.2
4.1
V
V
V
V
●
22.5
25.0
24
28
mA
mA
●
10
10
450
1000
µA
µA
●
–250
–300
–125
–150
µA
µA
●
±60
±40
±90
±80
mA
mA
1200
2200
V/µs
VOUT = 2VP-P
400
MHz
VOUT = 0.2VP-P
550
MHz
100
MHz
350
MHz
0.1dB BW
Gain Flatness ±0.1dB Bandwidth
VOUT = 2VP-P
FPBW
Full Power Bandwidth
VOUT = 2VP-P (Note 6)
XTalk
All Hostile Crosstalk
f = 10MHz, VOUT = 2VP-P
f = 100MHz, VOUT = 2VP-P
–80
–55
dB
dB
tS
Settling Time
To 1%, VOUT = 1.5V to 3.5V
To 0.1%
4
7
ns
ns
tr, tf
Rise Time, Fall Time
10% to 90%, VOUT = 1.5V to 3.5V
875
ps
ΔG
Differential Gain
NTSC Signal
0.02
%
ΔΦ
Differential Phase
NTSC Signal
0.02
Deg
HD2
2nd Harmonic Distortion
f = 10MHz, VOUT = 2VP-P
–75
dBc
HD3
3rd Harmonic Distortion
f = 10MHz, VOUT = 2VP-P
–79
dBc
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: A heat sink may be required to keep the junction temperature
below the Absolute Maximum Rating.
Note 3: The LT6558C is guaranteed functional over the temperature range
of –40°C and 85°C.
Note 4: The LT6558C is guaranteed to meet specified performance from
0°C to 70°C. The LT6558C is designed, characterized and expected to
190
meet specified performance from –40°C to 85°C but is not tested or
QA sampled at these temperatures.The LT6558I is guaranteed to meet
specified performance from –40°C to 85°C.
Note 5: Slew rate is 100% production tested on the R channel and
measured on the rising edge of the output signal. The slew rate of the
falling edge and of the G and B channels is guaranteed through design and
characterization.
Note 6: Large-signal bandwidth is calculated from slew rate:
FPBW = SR/(π • VP-P)
6558f
3
LT6558
TYPICAL PERFORMANCE CHARACTERISTICS
Gain Error Distribution
Gain Error Matching Distribution
60
VS = 5V
∆VOUT = 2V
60 R = 150Ω
L
40
30
20
10
1.01
50
40
30
0.97
10
0.96
Supply Current per Amplifier
vs Temperature
VOUT = VS/2
40
40
30
30
20
15
10
5
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
25
100
125
Supply Current per Amplifier
vs EN Voltage
VS = 5V
VOUT = VS/2
VS = 5V
35 VOUT = VS/2
VEN = 0V
30
25
0
50
75
TEMPERATURE (°C)
6558 G03
35
SUPPLY CURRENT (mA)
0.95
–50 –25
–0.2 –0.1
0
0.1
0.2
0.3
GAIN ERROR, BETWEEN CHANNELS (%)
6558 G02
Supply Current per Amplifier
vs Supply Voltage
25
20
15
10
TA = 125°C
TA = 25°C
20
TA = –55°C
10
5
0
0
1
2
3
4
5
6
SUPPLY VOLTAGE (V)
0
–50
7
0
–25
0
25
50
75
TEMPERATURE (°C)
6558 G04
40
–20
35
OFFSET VOTLAGE (mV)
TA = 125°C
TA = 25°C
–60
–80
TA = –55°C
–100
–120
–140
0
1
4
2
3
ENABLE PIN VOLTAGE (V)
5
6558 G07
4
2
3
ENABLE PIN VOLTAGE (V)
400
VS = 5V
VIN = 2.5V
VS = 5V
300
30
25
20
15
10
0
–50
5
Input Bias Current
vs Input Voltage
200
TA = 25°C
TA = 125°C
100
0
TA = –55°C
–100
–200
–300
5
–160
1
6558 G06
Offset Voltage vs Temperature
VS = 5V
–40
0
125
INPUT BIAS CURRENT (µA)
0
100
6558 G05
EN Pin Current vs EN Pin Voltage
ENABLE PIN CURRENT (µA)
0.99
0.98
6558 G01
40
1.00
20
0
–0.3
–0.5
–0.9
–0.8
–0.7
–0.6
GAIN ERROR, INDIVIDUAL CHANNEL (%)
VS = 5V
VOUT = 2VP-P
RLOAD = 150Ω
1.02
GAIN (V)
PERCENT OF UNITS (%)
PERCENT OF UNITS (%)
VS = 5V
∆VOUT = 2V
50 RL = 150Ω
0
–1.0
Voltage Gain vs Temperature
1.03
70
–400
–25
50
0
25
75
TEMPERATURE (°C)
100
125
6558 G08
0
1
2
3
INPUT VOLTAGE (V)
4
5
6558 G09
6558f
4
LT6558
TYPICAL PERFORMANCE CHARACTERISTICS
Output Voltage Swing
vs Load Current (Output High)
5
5.0
VS = 5V
RLOAD = 150Ω TO VS/2
OUTPUT VOLTAGE SWING (V)
OUTPUT VOLTAGE (V)
TA = 25°C
TA = –55°C
3
2
1
0
0
1
2
3
INPUT VOLTAGE (V)
4
2.5
VS = 5V
VIN = 4.5V
TA = 125°C
4
4.5
TA = 125°C
4.0
TA = 25°C
TA = –55°C
3.5
3.0
0
1.5
TA = 25°C
TA = 125°C
0.5
0
10 20 30 40 50 60 70 80 90 100
LOAD CURRENT (mA)
10 20 30 40 50 60 70 80 90 100
LOAD CURRENT (mA)
6558 G12
Bias Control Voltage
vs Temperature
80
5.0
VS = 5V
VS = 5V
RBCV = 158Ω
BIAS CONTROL VOLTAGE (mV)
4.5
4.0
INPUT VOLTAGE (V)
2.0
TA = –55°C
1.0
Input Bias Voltage vs Temperature
3.0
INPUT VOLTAGE (V)
2.0
6558 G11
Input Bias Voltage vs Resistance
at BCV Pin
2.5
VS = 5V
VIN = 0V
0
2.5
5
6558 G10
3.5
Output Voltage Swing
vs Load Current (Output Low)
OUTPUT VOLTAGE SWING (V)
Output Voltage vs Input Voltage
3.5
3.0
2.5
2.0
1.5
1.0
1.5
VS = 5V
RBCV = 158Ω
70
60
50
40
30
0.5
1.0
120
140
160 180 200 220
BVC-RESISTANCE (Ω)
240
0
–50 –25
260
0
50
25
75
TEMPERATURE (°C)
100
6558 G13
3
VOUT = 200mVP-P
2
GAIN (dB)
1
0
VOUT = 2VP-P
–1
0.2
1
0.1
0
–1
–2
–3
–3
–4
–4
10
100
FREQUENCY (MHz)
1000
6558 G16
0
–0.1
–0.2
–0.3
IN-R
IN-G
IN-B
–5
1
VS = 5V
0.4 VOUT = 2VP-P
RL = 150Ω
0.3
2
–2
–5
Gain Flatness vs Frequency
VS = 5V
VOUT = 2VP-P
RL = 150Ω
4
125
0.5
GAIN (dB)
3
GAIN (dB)
5
100
6558 G15
Frequency Response of Three
Amplifiers
VS = 5V
RL = 150Ω
4
0
50
25
75
TEMPERATURE (°C)
6558 G14
Frequency Response
5
20
–50 –25
125
1
IN-R
IN-G
IN-B
–0.4
–0.5
10
100
FREQUENCY (MHz)
1000
6558 G17
1
10
100
FREQUENCY (MHz)
1000
6558 G18
6558f
5
LT6558
TYPICAL PERFORMANCE CHARACTERISTICS
Frequency Response with
Capacitive Loads
5
2.00
DELAY (ns)
1
0
CL = 0pF
–1
VS = 5V
–40 VOUT = 2VP-P
RL = 150Ω
–50
1.50
CL = 4.7pF
2
GAIN (dB)
1.75
CL = 8.2pF
–30
VS = 5V
VOUT = 2VP-P
RL = 150Ω
AMPLITUDE (dB)
VS = 5V
4 VOUT = 200mVP-P
RL = 150Ω
3
Crosstalk Between Amplifiers
vs Frequency
Large-Signal Group Delay
1.25
1.00
0.75
RBCV = 158Ω
–2
–80
–90
–4
0.25
–100
–5
0
–110
10
100
FREQUENCY (MHz)
1
1000
10
100
FREQUENCY (MHz)
1
1000000
100000
1000
100
10
1
0.1
0.01
60
VS = 5V
10000
RBCV = 158Ω
1000
1
10
FREQUENCY (MHz)
100
1000
100
0.01
0.1
1
10
FREQUENCY (MHz)
100
6558 G22
30
20
0
0.001
1000
Distortion vs Frequency
DISTORTION (dBc)
30
40
50
60
HD2
40
50
60
70
80
100
110
110
0.1
1
10
FREQUENCY (MHz)
HD2
90
HD3
100
120
0.01
100
Distortion vs Frequency
30
90
10
0
VS = 5V
10 V
OUT = 1VP-P
20 RL = 150Ω
80
0.1
1
FREQUENCY (MHz)
6558 G24
VS = 5V
10 V
OUT = 2VP-P
20 RL = 150Ω
70
0.01
6558 G23
0
DISTORTION (dBc)
40
10
ENABLE
0.1
VS = 5V
50
100000
REJECTION RATIO (dB)
INPUT IMPEDANCE (Ω)
10000
1000
Power Supply Rejection Ratio vs
Frequency
RBCV = OPEN
DISABLE
10
100
FREQUENCY (MHz)
6558 G21
Input Impedance vs Frequency
VS = 5V
R TO G
B TO G
6558 G20
Output Impedance vs Frequency
1000000
TYPICAL
CHANNEL TO CHANNEL
1
1000
6558 G19
OUTPUT IMPEDANCE (Ω)
–70
0.50
–3
WORST CASE
CHANNEL TO CHANNEL
–60
100
6558 G25
120
0.01
HD3
0.1
1
10
FREQUENCY (MHz)
100
6558 G26
6558f
6
LT6558
TYPICAL PERFORMANCE CHARACTERISTICS
Enable/Disable Response
Input Noise Spectral Density
VS = 5V
VIN = 2.5V
VEN(DISABLE)
100
en
10
10
5
VS = 5V
VOUT = 2VP-P
RL = 150Ω
4
VOLTAGE (V)
+in
100
6
1000
INPUT CURRENT NOISE (pA/√Hz)
INPUT VOLTAGE NOISE (nV/√Hz)
1000
3
VOUT
2
1
0
VEN(ENABLE)
1
0.01
0.1
1
10
FREQUENCY (kHz)
–1
0
100
0
0.4
0.8
6558 G27
VS = 5V
VIN = 100mVP-P
RL = 150Ω
2.60
OUTPUT (V)
OUTPUT (V)
2.4 2.6
Small-Signal Transient Response
2.65
VS = 5V
VIN = 2VP-P
RL = 150Ω
4
2.0
6558 G28
Large-Signal Transient Response
5
1.6
1.2
TIME (µs)
3
2
2.55
2.50
1
2.45
0
0
2
4
6
8 10 12 14 16 18 20
TIME (ns)
6558 G29
0
2
4
6
8 10 12 14 16 18 20
TIME (ns)
6558 G30
PIN FUNCTIONS
⎯E⎯N (Pin 1): Enable Control Pin. The part is enabled when
this pin is pulled low. An internal pull-up resistor of 40k
will turn the part off if this pin is unconnected.
IN G (Pin 5): Green Channel Input. This pin has a nominal impedance of 450kΩ with input bias circuit inactive,
Pin 16 open.
GND (Pin 2): Ground Reference for Enable Pin (Pin 1)
and Bias Control Voltage Pin (Pin 16). This pin must be
connected externally to ground.
GND G (Pin 6): Ground of Green Channel Amplifier. This
pin is not internally connected to other ground pins and
must be connected externally to ground.
IN R (Pin 3): Red Channel Input. This pin has a nominal
impedance of 450kΩ with input bias circuit inactive,
Pin 16 open.
IN B (Pin 7): Blue Channel Input. This pin has a nominal
impedance of 450kΩ with input bias circuit inactive,
Pin 16 open.
GND R (Pin 4): Ground of Red Channel Amplifier. This pin
is not internally connected to other ground pins and must
be connected externally to ground.
GND B (Pin 8): Ground of Blue Channel Amplifier. This
pin is not internally connected to other ground pins and
must be connected externally to ground.
6558f
7
LT6558
PIN FUNCTIONS
V+ B (Pin 9): Positive Supply Voltage of Blue Channel
Amplifier. This pin is not internally connected to other
supply voltage pins and must be externally connected to
the supply voltage bus with proper bypassing. For best
performance, see Power Supply Considerations.
OUT B (Pin 10): Blue Channel Output.
V+ G (Pin 11): Positive Supply Voltage of Green Channel
Amplifier. This pin is not internally connected to other
supply voltage pins and must be externally connected to
the supply voltage bus with proper bypassing. For best
performance, see Power Supply Considerations.
the supply voltage bus with proper bypassing. For best
performance, see Power Supply Considerations.
OUT R (Pin 14): Red Channel Output.
V+ (Pin 15): Positive Supply Voltage of Control Circuitry.
This pin is not internally connected to other supply voltage
pins and must be externally connected to supply voltage
bus with proper bypassing. For best performance, see
Power Supply Considerations.
OUT G (Pin 12): Green Channel Output.
BCV (Pin 16): Bias Control Voltage. A resistor connected
between Pin 16 and Pin 2 (GND) will generate a DC voltage
bias at the inputs of the three amplifiers for AC coupling
application, see Programmable Input Bias.
V+ R (Pin 13): Positive Supply Voltage of Red Channel
Amplifier. This pin is not internally connected to other
supply voltage pins and must be externally connected to
Exposed Pad (Pin 17, DFN Package): Ground. This pad
must be soldered to PCB and is internally connected to
GND (Pin 2).
APPLICATIONS INFORMATION
Power Supply Considerations
The LT6558 is optimized to provide full video signal swing
output when operated from a standard 5V single supply.
Due to the supply current involved in ultrahigh slew rate
amplifiers like the LT6558, selection of the lowest workable
supply voltage is recommended to minimize heat generation and simplify thermal management. Temperature rise
at the internal devices (TJ) must be kept below 150°C
(SSOP package) or 125°C (DFN package), and can be
estimated from the ambient temperature (TA) and power
dissipation (PD) as follows:
TJ = TA + PD • 40°C/W for DFN package
or
TJ = TA + PD • 110°C/W for SSOP package
where PD = (IS + 0.5 • IO) • VS(TOTAL)
The latter equation assumes (conservatively) that the output
swing is small relative to the supply and RMS load current
(IO) is bidirectional (as with AC coupling).
The grounds are separately pinned for each amplifier to
minimize crosstalk.
Operation from split supplies can be accomplished by
connecting the LT6558 ground pins to the negative rail.
With dual supplies, recommended voltages range from
nominal ±2.5V to ±3.3V.
The ultrahigh frequency (UHF) operating range of the
LT6558 requires that careful printed circuit layout practices be followed to obtain maximum performance. Trace
lengths between power pins and bypass capacitors should
be minimized (<0.1 inch) and one or more dedicated
ground planes should be employed to minimize parasitic
inductance. Poor layout or breadboarding methods can
seriously impact amplifier stability, frequency response
and crosstalk performance. A 2.2µF and a 10µF bypass
capacitor is recommended for the LT6558 supply bus,
plus a 10nF high frequency bypass capacitor at each
individual power pin.
6558f
8
LT6558
APPLICATIONS INFORMATION
Programmable Input Bias
The LT6558 contains circuitry that provides a user-programmed bias voltage to the inputs of all three amplifier
sections. The internal biasing feature is designed to minimize external component count in AC-coupled applications, but may be defeated if external biasing is desired.
Figure 1 shows the simplified equivalent circuit feeding
the noninverting input of each amplifier. A programming
resistor from Pin 16 to GND (Pin 2) establishes the nominal
V+
V
I = PIN16
RSET
no-signal amplifier input bias condition according to the
following relationship:
VBIAS(IN) =
VPIN16 • 9.1k
RSET
where VPIN16 = 0.044V typical.
For single 5V supply operation, a 158Ω programming
resistor is generally optimal. In applications that demand
maximum amplifier linearity, or if external biasing is
preferred (in DC-coupled applications, for example), the
internal biasing circuitry may be disabled by leaving Pin
16 open. With BCV (Pin 16) open, input loading is approximately 450kΩ.
Shutdown Control
2.5k
IN
9.1k
6558 F01
Figure 1. Simplified Programmable Input Bias Circuit Diagram
V+
40k
BIAS
CIRCUITRY
EN
6558 F02
The LT6558 may be placed into a shutdown mode, where
all three amplifier sections are deactivated and power supply draw is reduced to approximately 10µA. When the EN
pin is left open, an internal 40k pull-up resistor brings the
pin to V+ and the part enters the shutdown mode. Pulling
the pin more than approximately 1.5V below V+ will enable the LT6558 (see Figure 2 for equivalent circuit). The
pull-down current required to activate the part is typically
125µA. In most applications, the EN pin is simply connected to ground (for continuous operation) or driven
directly by a CMOS-level logic gate (see Figure 3 for
examples). Response time is typically 50ns for enabling,
and 1µs for shutdown. In shutdown mode, the feedback
resistors remain connected between the output pins and
the individual ground (or V– connected) pins.
Figure 2. Simplified Shutdown Circuit Diagram
V+
V+
1
LT6558
EN
DISABLE
1
EN
DISABLE
LT6558
2
2
6558 F03
(3a) Open Drain or Open Collector
(3b) CMOS Gate with Shared Supply
Figure 3. Suitable Shutdown Pin Drive Circuits
6558f
9
LT6558
SIMPLIFIED SCHEMATIC
(Single Amplifier Section)
V+
EN
BIAS
IN
V+
V+
OUT
V+
6558 SS
PACKAGE DESCRIPTION
GN Package
16-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
.189 – .196*
(4.801 – 4.978)
.045 ±.005
16 15 14 13 12 11 10 9
.254 MIN
.009
(0.229)
REF
.150 – .165
.229 – .244
(5.817 – 6.198)
.0165 ± .0015
.150 – .157**
(3.810 – 3.988)
.0250 BSC
RECOMMENDED SOLDER PAD LAYOUT
1
.015 ± .004
× 45°
(0.38 ± 0.10)
.007 – .0098
(0.178 – 0.249)
.0532 – .0688
(1.35 – 1.75)
2 3
4
5 6
7
8
.004 – .0098
(0.102 – 0.249)
0° – 8° TYP
.016 – .050
(0.406 – 1.270)
NOTE:
1. CONTROLLING DIMENSION: INCHES
INCHES
2. DIMENSIONS ARE IN
(MILLIMETERS)
.008 – .012
(0.203 – 0.305)
TYP
.0250
(0.635)
BSC
GN16 (SSOP) 0204
3. DRAWING NOT TO SCALE
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
6558f
10
LT6558
PACKAGE DESCRIPTION
DHC Package
16-Lead Plastic DFN (5mm × 3mm)
(Reference LTC DWG # 05-08-1706)
0.65 ±0.05
3.50 ±0.05
1.65 ±0.05
2.20 ±0.05 (2 SIDES)
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC
4.40 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.115
TYP
5.00 ±0.10
(2 SIDES)
R = 0.20
TYP
3.00 ±0.10
(2 SIDES)
9
0.40 ± 0.10
16
1.65 ± 0.10
(2 SIDES)
PIN 1
TOP MARK
(SEE NOTE 6)
PIN 1
NOTCH
(DHC16) DFN 1103
8
0.200 REF
1
0.25 ± 0.05
0.50 BSC
0.75 ±0.05
4.40 ±0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
6558f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
LT6558
TYPICAL APPLICATION
DC-Coupled Split Supply Operation
1
2
BCV
EN
GND
LT6558
3
IN Pr
+
–
4
5
IN Pb
7
8
–2.5V
15
14
V+
+
–
6
IN Y
V+
16
+
–
OUT_Pr
75Ω
75Ω
OUT_Pb
75Ω
11
10
V+
75Ω
13
12
V+
2.5V
75Ω
9
OUT_Y
75Ω
6558 TA02
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6558f
12 Linear Technology Corporation
LT 0906 • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2006
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