74
CHAPTER 4
INSTANTANEOUS SYMMETRICAL
COMPONENT THEORY
4.1
INTRODUCTION
This chapter deals with instantaneous symmetrical components
theory for current and voltage compensation. The technique was introduced
by Fortescue. It is applied to resolve an unbalanced three-phase system of
voltages and currents into three balanced systems of voltages and currents.
The operation of control circuit is explained using analytical computations.
The steady state and dynamic operation of control circuit in different load
current and/or utility voltages conditions is studied through simulation results.
It does not need phase lock loop or complicate computations.
The analytical analysis and simulation results are presented to study
the operation of control circuit in dynamic and steady state cases. The
symmetrical component theory originally defined for steady-state analysis of
three phase unbalanced systems. A three-phase four-wire distribution system
supplying an unbalanced and nonlinear load is considered for simulation
study. The detailed simulation results using MATLAB are presented to
support the proposed compensation strategy.
4.2
COMPUTATION OF REFERENCE CURRENT
The effectiveness of an active power filter depends basically on the
design characteristics of the current controller, the method implemented to
generate the reference template and the modulation technique used. The
75
control scheme of a shunt active power filter must calculate the current
reference waveform for each phase of the inverter, maintain the dc voltage
constant, and generate the inverter gating signals. Also the compensation
effectiveness of an active power filter depends on its ability to follow the
reference signal calculated to compensate the distorted load current with a
minimum error and time delay.
i sa
3-Phase
4-Wire AC
Mains
isb
isc
ila
ilb
ilc
iln
iln
icc
icb
ica
Lf,R f
S1
S3
ila
ilb
ilc
Linear/
Non-Linear
Loads
iln
S5
Cdc +
-
icn
V dc
S4
S6
+
-
S2
DSTATCOM
Figure 4.1 Schematic diagram of shunt active power filter
Active filters are widely employed in distribution system to reduce
the harmonics. Various topologies of active filters have been proposed for
harmonic mitigation. The schematic diagram of shunt active power filter
topology is shown in Figure 4.1. The shunt active power filter based on
Voltage Source Inverter (VSI) structure is an attractive solution to harmonic
current problems. The shunt active filter is a PWM voltage source inverter
that is connected in parallel with the load. Active filter injects harmonic
current into the AC system with the same amplitude but with opposite phase
as that of the load. The principal components of the APF are the VSI, DC
energy storage device, coupling inductance and the associated control circuits.
76
The power system is configured with four wires. The AC source is
connected to a set of non-linear loads. Voltages Vsa, Vsb,Vsc and current Ila, Ilb,
Ilc indicate the phase voltages and currents at the load side respectively. Iln is
the neutral current of the load side. The APF consists of three principal parts,
a three phase full bridge voltage source inverter, a DC side capacitor and the
coupling inductance Lf. The capacitor is used to store energy and the
inductance is used to reduce the ripple present in the harmonic current
injected by the active power filter. The shunt active filter generates the
compensating currents to compensate the load currents Ila, Ilb, Ilc so as to
make the current drawn from the source (Isa, Isb, Isc) as sinusoidal and
balanced. The performance of the active filter mainly depends on the
technique used to compute the reference current and the control system used
to inject the desired compensation current into the line. In this chapter, the
instantaneous symmetrical components theory is used to determine the current
references (Ifa*, Ifb*, Ifc*).
The primary goals of DSTATCOM are to cancel the effect of poor
load power factor such that the current drawn from the source has a near unity
power factor and to cancel the effect of harmonic contents in loads such that
the current drawn from the source is nearly sinusoidal. In addition, it can also
eliminate dc offset in loads.
The reference current for DSTATCOM is calculated by
instantaneous symmetrical component theory. It is assumed that source
voltages are balanced and are given by
vsa
sin t
vsb sin( t 120 )
vsc sin( t 120 )
(4.1)
77
The symmetrical component theory originally defined for steady
state analysis of 3-phase unbalanced systems. This transformation is the result
of multiplying the transformation matrix by the phasor representation of
unbalanced 3-phase system.
1
1
1
a2
A= 1
a
1 a2
where,
a
e
(4.2)
a
j2
3
V0
V1
V2
1
1
Vsa
1 a
1 a2
a2
a
Vsb
1
1
3
(4.3)
Vsc
The V0 , V1 and V2 stand for phasor presentation of zero, positive
and negative sequence components of phase-neutral voltage in the phase “a”,
respectively. The Vsa , Vsb and Vsc stands for phasor presentation of voltages
of phases a, b and c, respectively. The first part of control strategy of shunt
active filter is based on computing of instantaneous positive sequence of load
side currents and utility side voltages using instantaneous symmetrical
component theory.
The objective of compensation is to provide balanced supply
current such that zero sequence component is zero. We therefore have
i sa i sb i sc 0
(4.4)
This guarantees that zero sequence current flowing through the
neutral is zero in a three phase four wire system.
78
vsa1
1
vsa a v sb a 2 vsc
3
(4.5)
The angle of the vector is then given by
v sa1 tan
3
3
v
v
2 sb 2 sc
1
1
v sa 2 v sb 2 vsc
1
tan
3
2
1
v sb vsc
3
2
v sa
(4.6)
If we now assume that the phase of the vector isa1 lags that of vsa1 by
an angle
, we get
2
vsa a vsb a v sc
2
isa a isb a isc
(4.7)
Substituting the values of a and a2 ,Equation (4.7) can be expanded as
( v sa
1
1
3
v
v ) j ( v sb v sc )
2 sb 2 sc
2
(isa
1
1
3
i
i ) j 2 (isb isc )
2 sb 2 sc
(4.8)
Equating the angles, we can write from the above equation
1
tan k1 k 2
1
tan k 3 k 4
(4.9)
where
k1
3
v vsb
2 sa
k3
3
i i
2 sa sb
,
,
k2
k4
( v sa
(isa
1
vsb
2
1
i
2 sb
1
v sc)
2
1
i )
2 sc
79
Using the formula
tan
tan
1 tan tan
tan(
Equation (4.9) can be expanded as
k1
k2
tan
tan
1
k3
k4
(k 3
1
) tan
k4
k3
k 4 tan
(4.10)
Solving the above equation we get
v sb vsc 3 v sa i sa
v sc vsa 3 vsb isb
vsa vsb 3 v sc isc 0
(4.11)
where
tan
3
(4.12)
When the power factor angle is assumed to be zero, Equation (4.12)
implies that the instantaneous reactive power supplied by the source is zero.
On the other hand, when this angle is non-zero, the source supplies a reactive
power that is equal to times the instantaneous power.
The instantaneous power in a balanced three-phase circuit is
constant while for an unbalanced circuit it has a double frequency component
in addition to a dc value. In addition, the presence of harmonics adds to the
oscillating component of the instantaneous power .The objective of the
compensator is to supply the oscillating component such that the source
supplies the average value of the load power. Therefore,
v sa i sa v sb i sb v sc i sc p lav
(4.13)
80
where plav is the average power drawn by the load. Since the harmonic
component in the load does not require any real power, the source only
supplies the real power required by the load. Combining equations (4.4),
(4.11) and (4.13),
1
vsb
1
3 vsa
vsc
vsc
1
3 vsb
vsa
vsa
vsa
vsb
v sb
vsc
isa
0
3 vsc isb
0
isc
(4.14)
plav
Assuming that the current are tracked without error, the Kirchoffs
current law(KCL) at PCC can be written in terms of the reference currents as,
ifk ilk isk
(4.15)
where k=a, b, c.
Substituting the above equation in Equation (4.14) and solving
ifa
ila
ifb
ilb
ifc
ilc
vsa
vsb
2
sa
v
vsb
2
sb
v
vsc
2
sa
2
sb
v
v
vsc
vsa
v
2
sa
2
sb
v
vsc
2
v sc
v sa
2
v sc
vsb
2
vsc
plav
plav
(4.16)
p lav
By using these Equation (4.16), reference compensator currents are
calculated.
4.3
MODELING OF SHUNT ACTIVE FILTER
From the schematic diagram of compensated system given in
Figure 4.1.
81
The loop equation for phase ‘a’(Upper loop) is,
difa
Lf
difa
dt
dt
+R f i fa +vsa -vc1 =0
=- R f
i fa -
Lf
vsa
vc1
+
Lf
(4.17)
Lf
The loop equation for phase ‘a’(Lower loop) is,
di
di
di
fa
fa
fb
di
fc
dt
dt
dt
=-
=-
=-
dt =-
R
R
R
R
f
f
f
f
L
L
L
L
i fa
f
i fa
f
i fb
f
f
ifc -
vsa
L
-
v c2
f
L
(4.18)
f
vsa
- v
v
+ Sa c1 -Sa c2
L
L
L
f
f
f
v
sb
- v
v
+ S c1 -Sb c2
L
b
L
L
f
f
f
vsc
- v
v
c1 -Sc c3
+
S
c
L
L
L
f
f
f
(4.19)
(4.20)
(4.21)
Capacitor Currents i1 and i2 is given by,
C
C
dvc1
dv
c1
dt
= -i1 = - Sa i +S i +Sci
fa b fb
fc
Sa i +Sb i +Sc i
fa
fb
fc
dt = i 2
(4.22)
(4.23)
Then defining a state vector of the state space equation is given as,
xT = i
fa
i
fb
i
fc
v
c1
v
c2
(4.24)
82
Combining the Equations (4.19) to (4.23), we get,
i fa
-
Rf
Lf
i fb
d/dt i fc
0
=
vc1
vc2
0
-
Rf
0
- Sa
0
C
-
Sa
Lf
- Sb
C
-
C
Sb
-
-
0
Sa
0
Sb
Rf
- Sc
Lf
C
Sc
Lf
- Sa
Lf
-
Lf
- Sb
Lf
-
Lf
- Sc
Lf
0
0
0
0
i fa
- 1
i fb
i fc
v c1
v c2
+
0
0
v sa
0
-1
0
0
0
v sb
v sc
Lf
Lf
- 1
Lf
-
C
Sc
C
(4.25)
4.3.1
Switching Control of DSTATCOM
The shunt component of UPQC can be controlled in two ways,
a)
Tracking the shunt converter reference current, when the shunt
converter current is used as feedback control variable. The
load current is sensed and the shunt compensator reference
current is calculated from it. The reference current is
determined by calculating the active fundamental component
of the load current and subtracting it from the load current.
This control technique involves both the shunt active filter and
load current measurements.
b)
Tracking the supply current, when the supply current is used
as the feedback variable. In this case the shunt active filter
ensures that the supply reference current is tracked. Thus, the
supply reference current is calculated rather than the current
injected by the shunt active filter. The supply current is often
required to be sinusoidal and in phase with the supply voltage.
83
Since the waveform and phase of the supply current is known, only
its amplitude needs to be determined. Also, when used with a hysteresis
current controller, this control technique involves only the supply current
measurement. Thus, this is a simpler to implement method. Therefore it has
been used in the UPQC simulation model.
4.3.2
DC Voltage Control Using PI Controller
In Figure 4.1, assume S and S1 are the status of the switch in top
and bottom half of an inverter leg. The switch status, S=1 and S1=0 implies
that the top switch of the inverter leg is closed and it connects the inverter leg
to Vc1=Vdc while the bottom switch in the same leg is open. Similarly for S=0
and S1=1, the bottom switch connects the inverter leg to Vc2= -Vdc and the
top switch in the inverter leg is open.
Therefore, through the inverter
switching arrangements the inverter supplies a voltage + Vdc. We now have to
choose the control signal S=1 or 0 and S1=0 or 1, such that appropriate
inverter connection is achieved. DC voltage control using PI controller is
shown in Figure 4.2.Any deviation of the capacitor voltage from the reference
is due to losses. The PI controller loops draws the loss from the ac system to
hold the voltage constant.
Figure 4.2 DC voltage control using PI controller
84
Different current control techniques are applied for tracking the
reference current. They are sampled error control, hysteresis band control,
sliding mode controller, linear quadratic regulator, deadbeat controller and
pole shift controller. From the number of current-control techniques, the
hysteresis control appears to be the most preferable for shunt active filter
applications. Therefore, in the UPQC simulation model a hysteresis controller
has been used. The advantages of using a hysteresis controller are simpler
implementation, enhanced system stability, increased reliability and response
speed.
In hysteresis control, the controlled current is monitored and is
forced to track the reference within the hysteresis band. The inverter switches
are made to change their states at instances when the controlled current
touches the upper or lower limit of the hysteresis band. The controlled current
is forced to decrease when it reaches the upper limit and to increase when it
reaches the lower limit.
By alternately reversing the polarity of the dc capacitor the
controlled current is forced to alternately increase or decrease within the
hysteresis band following the reference current. The narrower the hysteresis
band (smaller values of h) the more accurate is the tracking, but this also
results in higher switching frequency.
If the current references are assumed to be composed from zero
sequence components, the line currents will return through the ac neutral
wire.In the “split capacitor” inverter topology, the current of each phase to
flow either through or through and to return through the ac neutral wire. The
currents can flow in both directions through the switches and capacitors.
85
When rises and decreases, but not with equal ratio because the
positive and negative values are different and depend on the instantaneous
values of the ac phase voltages. The inverse occurs when the dc voltage
variation depends also on the shape of the current reference and the hysteresis
bandwidth. Therefore, the total dc voltage, as well as the voltage difference
will oscillate not only at the switching frequency, but also at the
corresponding frequency of that is being generated by the VSI. The switches
are controlled asynchronously to ramp the current through the inductor up and
down so that it follows the reference.
When the current through the inductor exceeds the upper hysteresis
limit a negative voltage is applied by the inverter to the inductor. This causes
the current in the inductor to decrease. Once the current reaches the lower
hysteresis limit a positive voltage is applied by the inverter to the inductor and
this causes the current to increase and the cycle repeats.
If a dynamic offset level is added to both limits of the Hysteresis
band, it is possible to control the capacitor voltage difference and to keep it
within an acceptable tolerance margin. Normally 5 % of the load current is
taken as Hysteresis-band width. Hysteresis current controller derives the
switching signals of the inverter power switches (IGBTs). The current
controllers of the three phases are designed to operate independently. Each
current controller determines the switching signals to its inverter bridge. The
switching logic for phase a,b and c is formulated as follows.
For Phase a:
If ifa > (ifa* + hb) then upper switch is OFF & lower switch is ON.
If ifa < (ifa* - hb) then upper switch is ON & lower switch is OFF.
86
For Phase b:
If ifb > (ifb* + hb) then upper switch is OFF & lower switch is ON
If ifb < (ifb * - hb) then upper switch is ON & lower switch is OFF
For Phase c:
If ifc > (ifc* + hb) then upper switch is OFF & lower switch is ON
If ifc < (ifc * - hb) then upper switch is ON & lower switch is OFF
where ‘hb’ is the width of the hysteresis band around the reference current.
4.4
COMPUTATION OF REFERENCE VOLTAGE
The series component of UPQC is controlled to inject the
appropriate voltage between the point of common coupling (PCC) and load,
such that the load voltages become balanced, distortion free and have the
desired magnitude. Theoretically the injected voltages can be of any arbitrary
magnitude and angle. However, the power flow and device rating are
important issues that have to be considered when determining the magnitude
and the angle of the injected voltage. Figure 4.3 shows schematic diagram of
a series-compensated distribution system.
In UPQC-Q the injected voltage is maintained 90 degree in advance
with respect to the supply current, so that the series compensator consumes no
active power in steady state. In second case UPQC-P the injected voltage is in
phase with both the supply voltage and current, so that the series compensator
consumes only the active power, which is delivered by the shunt compensator
through the dc link.
87
In the case of quadrature voltage injection UPQC-Q the series
compensator requires additional capacity, while the shunt compensator VA
rating is reduced as the active power consumption of the series compensator is
minimised and it also compensates for a part of the load reactive power
demand. In UPQC-P, the series compensator does not compensate for any
part of the reactive power demand of the load, and it has to be entirely
compensated by the shunt compensator. Also the shunt compensator must
provide the active power injected by the series compensator. Thus, in this case
the VA rating of the shunt compensator increases. The reference voltage for
DVR is calculated by using instantaneous symmetrical component theory.
Zsa
vsa
isa
vsb
Three-Phase
Three-Wire
Nonlinear
Loads
Zsb
isb
Zsc
vsc
isc
Cr
Cr
Cr
Lr
Lr
AF Sh
Lr
Cd
Figure 4.3 Schematic diagram of a series-compensated distribution system
Let the source voltages in phase a,b and c are represented by Vsa,
Vsb and Vsc. The source is connected to the DVR by a feeder with an
88
impedance of R+jX. The DVR is represented by voltage sources vfa, vfb and vfc.
Using Kirchoffs voltage law at PCC we get,
Vt V f
(4.26)
Vl
where vl is the load voltage, vt is the voltage at the PCC, and vf is the voltage
injected by the series filter. The instantaneous symmetrical components for isa,
isb and isc are defined as,
ia 0
ia 012
1
3
ia1
1
1
1
a
1 a
ia 2
2
1 isa
a 2 isb
a
(4.27)
isc
For balanced currents the component ia0 is equal to zero,and the
component ia1 is complex conjugate of ia2. The same transformation is applied
for voltages.
The main aim of the DVR is to make the load voltage a strictly
positive sequence. Furthermore, the DVR must not supply or absorb any real
power. To force vl to be positive sequence vf must cancel the zero-and
negative-sequence components of vt. Here the DVR must operate in zero
power mode,
Plav
Ptav
Vta I sa
Vtb I sb
V tc I sc
(4.28)
where ptav is the average value of the instantaneous power entering the
terminal and plav is the instantaneous power supplied to the load.
Equation (4.28) can be rewritten as,
p
v a 0ia 0
v a 2 ia1
v a 1ia 2
(4.29)
89
Since the desired load voltages are balanced sinusoids and the
currents flowing through the series compensator are also balanced
(shunt compensator action), the instantaneous UPQC output power is constant
and this must be equal to the average power entering the UPQC (losses are
neglected).
Let us denote the phasor load voltage as
Vl
(4.30)
V1
Since the load voltage is strictly positive sequence, the average
power to the load is also positive sequence. Therefore,
Plav
V1 Il 1 cos(
V f*0
Vt *0 ,V f*1
(4.31)
)
Therefore,
V1
Vt1 ,V f*2
Vt 2
(4.32)
An inverse symmetrical component transformation of above
equation produces the reference phasor voltages of the DVR. The
instantaneous phase voltages then can be obtained from the phasor voltages.
Once the instantaneous load voltages are obtained, the reference series filter
voltages are obtained using the following expression,
Vf
Vl Vt
(4.33)
In the case when the UPQC-P control strategy is applied, the
injected voltage is in phase with the supply voltage. Hence, the load voltage is
in phase with the supply voltage and there is no need for calculating the angle
of the reference load voltage. Thus, the reference load voltage is determined
by multiplying the reference magnitude (which is constant) with the
sinusoidal template phase-locked to the supply voltage. Then, the reference
series filter voltage is obtained using the Equation (4.33).
90
Comparing the techniques for calculating the reference voltage of
the series compensator, presented above, it can be concluded that the UPQC-P
algorithm has the simplest implementation (it involves very little
computation). In the UPQC-P case the voltage rating of the series
compensator is considerably reduced. Also, the UPQC-Q compensation
technique does not work in the case when the load is purely resistive.
Therefore, the UPQC-P control strategy has been used in the UPQC
simulation model.
4.5
MODELING OF SERIES ACTIVE FILTER
The basic purpose of the DVR is to inject a set of three phase
voltages such that the voltage vl at the critical load terminal is balanced with a
pre-specified magnitude and phase angle.
Figure 4.4 Single-phase equivalent circuit of DVR
91
Let this voltage be denoted by vl, then applying Kirchoffs Voltage
Law(KVL), the DVR reference voltage vk is given by
Vk Vl Vt
(4.34)
Once the reference voltage is generated, it is tracked in a Hysteresis
band state feedback control. Consider the DVR single-phase equivalent circuit
shown in Figure 4.4. In this Figure, the inverter output voltage is represented
by the dc voltage (vdc) times the switching function u =1. Also, the
transformer leakage inductance is denoted by Ld and Rd represents the
switching losses.
Defining the system state vector as
xT = v
k
i
d
, the state space
equation of the system is,
.
x =Ax+Bu c +Di
(4.35)
l2
where, uc is the continuous-time equivalent of u and
1
0
A=
- 1
4.5.1
C
k
R
L
- d
d
L
0
B=
- 1
v
- dc
d
D=
L
d
C
k
(4.36)
0
Switching Control of DVR
In the state feedback control, uc is given by
u c =-K x-x
ref
(4.37)
92
where, K is the feedback gain matrix and xref contains the references of the
state vector. The inverter switching logic is then
If uc >h, then u=+1,
If uc <h, then u=-1,
where, h is a small positive constant that defines the Hysteresis band.
4.6
MODELING OF UPQC
The equivalent circuit of the UPQC compensated system is shown
in Figure 4.5. The inductance Lf represents the leakage inductance of the
shunt transformer and similarly the inductance Ld is the leakage inductance of
the series transformer.
Figure 4.5 Equivalent circuit of the UPQC compensated system
The switching losses of an inverter and the copper loss of the
connecting transformer are represented by a resistance Rf and Rd. The iron
losses of the transformer are neglected. The load is assumed to be an RL load
93
characterized by R1 and L1. The voltage sources Vdc1 and Vdc2 are the voltage
Vdc across the d.c. storage capacitor multiplied by the switch function of the
shunt and series inverters respectively. The purpose of UPQC control is to
determine these switch functions.
Let us define the following state vector,
x T = i1 i 2
i3
i4
vt
(4.38)
vd
The state-space equation of the circuit then can be written as,
x
Ax B1VS
R
(4.39)
B2U
0
L
0
0
0
1
0
1
0
Rf
0
0
R1
0
0
0
Lf
L1
A
1
1
C1
0
0
Vdc
L
0
u
0
0
0
0
u1
u2
1
0
1
B1
1
C1
B2
1
0
Rd
Ld
0
C1
1
C2
C2
L
Lf
L1
0
0
0
0
1
0
0
0
0
Ld
0
Lf
0
0
0
0
Vdc
Ld
0
0
0
0
1 Vdc1
Vdc Vdc 2
(4.40)
94
In general the control variables are injected current if, inserted
voltage vd, the terminal voltage vt along with the two capacitor currents.
Furthermore, the presence of the load current in the state variable feedback is
undesirable as the load may change at any time. We must therefore perform a
suitable state transformation such that all the pertinent signals appear as state
variables. One suitable transformation is given by
if
z
ic1
vs
1
1
0
1
1
0 0 0
1 0 0 0
is
0
1
0
0
0
0
0 1 0
0 0 0
ic 2
vd
0
0
0
0
1 1 0 0
0 0 0 1
(4.41)
The state equation can be transformed into,
Z
4.6.1
PAP 1 Z
PB1VS
PB2U
(4.42)
Switching control of UPQC
Assuming that we have full control over u, an infinite time Linear
Quadratic Regulator(LQR) is designed. The control law is defined as,
u = -K(z-zref)
(4.43)
where zref is the desired state vector.
The control signal computed so far using the LQR is a continuous
signal. In practice the control signal u is the switching decision of the VSI of
the UPQC and is thus constrained to be + 1. The switching is then based on
u = -hys(K(Z-Zref))
(4.44)
95
Here the hys function is defined for a small limit around zero.
If u >lim then hys(u)=1
Else if u <lim then hys(u)=-1
The selection of lim determines the switching frequency while
tracking the reference. This switching control gives good convergence to the
tracking band as well as good stability of tracking.
4.6.2
Voltage Control of the DC Bus
For a voltage source inverter the dc voltage needs to be maintained
at a certain level to ensure the dc-ac power transfer. Because of the switching
and other power losses inside UPQC, the voltage level of the dc capacitor will
be reduced if it is not compensated. Thus, the dc link voltage control unit is
meant to keep the average dc bus voltage constant and equal to a given
reference value. The dc link voltage control is achieved by adjusting the small
amount of real power absorbed by the shunt inverter. This small amount of
real power is adjusted by changing the amplitude of the fundamental
component of the reference current. The ac source provides some active
current to recharge the dc capacitor. Thus, in addition to reactive and
harmonic components, the reference current of the shunt active filter has to
contain some amount of active current as compensating current. This active
compensating current flowing through the shunt active filter regulates the dc
capacitor voltage.
Usually a PI controller is used for determining the magnitude of
this compensating current from the error between the average voltage across
the dc capacitor and the reference voltage. The PI controller estimates the Ploss
component and determines the duty cycle of the chopper to maintain the
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capacitor voltage at a prespecified set reference voltage. The PI controller has
a simple structure and fast response. Thus, a PI controller has been used for dc
link voltage control in the UPQC simulation model. The set values are taken
approximately 1.3 times the peak AC voltage of the source voltage for
compensator to work satisfactorily.
4.7
SIMULATION RESULTS
This section presents the details of the simulation carried out to
demonstrate the effectiveness of the proposed control strategy for the active
filter for harmonic current filtering, reactive power compensation, load
current balancing, load voltage compensation and neutral current elimination.
In the proposed work, the reference compensator currents and voltages are
generated using the instantaneous symmetrical component theory to achieve
the load current compensation and reactive power compensation. The
switching control of the voltage source inverter based on hysteresis current
controller used in the DSTATCOM and DVR is presented. The switching
harmonics due to the VSI of the DSTATCOM and DVR are eliminated. The
simulation results before and after the compensation is presented.
The test system consists of a three phase supply connected to a set
of non-linear loads namely, a 3-phase diode-bridge rectifier with RL load.
The values of the circuit elements used in the simulation are given in
Table 4.1. The simulation was conducted under unbalanced distorted source
conditions. The comprehensive simulation results are presented below.
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Table 4.1 System parameters of UPQC
System parameters
Specifications
System frequency
50 Hz
Dc link capacitance
C1=4400 F,C2=4400 F
Dc-link voltage
600V
Non-Linear Load
R =20 ohms,
L=15 mH,
2.6 KVA
Shunt Inverter Filter
L=5.5 mH ,
C=12 µF
Series Inverter Filter
L=5.5 mH ,
C=12 µF
Switching Frequency
9730 Hz
PWM Control
Hysteresis control
Coupling transformer
3.3 KVA
4.7.1
Compensation of current harmonics
Figure 4.6 shows the simulation results of the system with the
proposed approach. Figure.4.6 (a) shows the waveforms of the source
voltages before compensation. The source voltage is intentionally assumed to
be much distorted with 7th harmonic and 13th harmonics to better show the
behavior of the active filter under severe conditions. The Total harmonic
Distortion (THD) of the distorted three-phase load voltages are 41.51%,
35.17% and 40.36% respectively. Figure.4.6 (b) shows the waveforms of the
load voltages before compensation Figure.4.6(c) shows the waveforms of the
load voltages after compensation using series active filter .
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The THD of load voltages in phase A, B and C has reduced to
5.98%, 5.17% and 5.86 % respectively. After the installation of the UPQC,
the three phase load voltage is balanced and sinusoidal and it is in phase with
the supply voltage. The resulting THD, showing the successful performance
of the proposed control approach. The reached THD is sufficiently close to
the acceptable level suggested by IEEE-519 standards.
Figure. 4.6 (a) Source Voltages before Compensation
Figure. 4.6 (b) Load Voltages before Compensation
Figure 4.6 (c) Load Voltages after Compensation with UPQC
4.7.2
Compensation of Load Voltage
Figure.4.7(a) shows the waveforms of the load currents before
compensation using shunt active filter. In this case the simplest control system
that is a hysteresis controller for the shunt compensator is used. There is a
hysteresis controlled Inverter in each phase accompanied by a High Pass
Filter (HPF) to suppress the high frequency ripples introduced by the inverter.
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Figure. 4.7(b) shows the Compensating current of shunt active
filter. Figure.4.7(c) shows the waveforms of the source currents after
compensation using shunt active filter The THD of the distorted three-phase
line currents (Ia, Ib & Ic ) are 37.35%, 28.12% and 33.74% respectively. The
THD of current in phase A, B and C has reduced to 5.12%, 4.66% and 4.98%
respectively. The reached THD is sufficiently close to the acceptable level
suggested by IEEE-519 standards.
Figure 4.7 (a) Load current before Compensation
Figure 4.7 (b) Compensating current
Figure 4.7 (c) Source current after Compensation
After the installation of the UPQC, the three phase source current is
balanced and sinusoidal and it is in phase with the supply voltage. Source
delivers constant real power and zero reactive power to the load which
indicates that the source side power factor is maintained at unity.
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4.8
CONCLUSION
A new control strategy for UPQC is presented. This method is easy
to implement and it has reasonable dynamic response. The control strategy
generates reference compensating currents of shunt active filter and reference
compensating voltages of series active filter in such a manner that the source
side currents and load side voltages become sinusoidal and balanced in
various power quality conditions. The analytical expressions and simulation
results explain the circuit operation and the validity of presented method.