Fundamentals of
Fast Pulsed IV
Measurement
Alan Wadsworth
Agilent Technologies
© Agilent Technologies, 2014
Agenda for Today
• Parametric Test: Some Perspective
• Overview of Fast Pulsed Measurement Solutions
• Practical High-Speed Measurement Issues
• High Speed Measurement Examples
• Summary and Conclusions
Page 2
PARAMETRIC TEST: A PERSPECTIVE
Page 3
Parametric Test Measures 4 Basic Device Types:
Transistors
Diodes
Resistors
Capacitors
Most measurements are either current versus voltage (I-V)
or capacitance versus voltage (C-V) measurements.
Page 4
What is a Source/Measure Unit?
Simplified Equivalent Circuit:
Voltage Source
Ammeter
Voltmeter
A
V
Circuit
Common
Current Source
Consider how many rack & stack instruments you would have to
combine together to get equivalent functionality!
Page 5
What Does Parametric Test Involve?
Semiconductor parametric test involves the measurement of voltage
and current very accurately and very quickly. It also involves the
measurement of capacitance.
SMU 1
Id
SMU 4
SMU2
SMU 3
MOSFETs have 4 terminals:
4 SMUs  Magic Number!
Page 6
DC Versus Fast (Transient) IV Measurement
DC Measurement (Milliseconds)
Fast I/V Measurement
(Microseconds and below)
• Dynamic measurement
• Must make measurement during the
transient response
• Trade-offs must be made between speed
and accuracy
Transient Response
Wait time for DC Measurement
Measurement Value
• Basically “static” measurement
• Can wait for the system to settle down
before making the measurement
• Long measurement times allow sufficient
averaging / integration time for high
accuracy
Minimum Averaging
Wait time for Fast
IV Measurement
Long Averaging
(DC)
Time
Page 7
Why Is High-Speed Measurement Becoming
Critical to Parametric Test?
• Lower operating voltages
• Some phenomena (such as NBTI/PBTI) have more impact
than in the past due to smaller operating margins
• Expanded use of new and exotic materials
• Some materials (SOI, high-k gate dielectrics) are more
sensitive to heating effects or experience other issues
requiring fast pulsed measurement
• Random telegraph signal noise (RTN)
• As lithographies shrink, MOSFET drain current variations due
to RTN can affect the stability of SRAM cells
• RTN measurement requires fast (nanosecond) sampling rates
• Circuits and devices are operating hotter
• High temperatures generally exacerbate the above effects
 Fast measurement is necessary to obtain the accurate device parameters
Page 8
OVERVIEW OF FAST PULSED
MEASUREMENT SOLUTIONS
Page 9
What is a Pulsed IV Measurement?
•
•
IV measurement made using pulses (not DC signals)
Pulse widths can vary from milliseconds to nanoseconds
DC IV measurement
Apply voltage
(or current)
Pulsed IV measurement
Measure current
(or voltage)
Spot
Time
Pulse width
Pulse period
Sweep
 Measurement can be slow.
 Timing dependency is low.
 Measurement must be relatively fast.
 Timing dependency is high.
 Pulse widths vary from ms to ns
 Different equipment is needed depending on
the pulse width requirements
Page 10
How Much Bandwidth is Needed?
A pulse (square wave) is the superposition of sine waves (odd harmonics).
• The base line frequency is determined by pulse period.
• The practical maximum frequency is determined by the width and transition time.
• The DC components only determine the pulse offset.
2 .5 E- 0 1
1.2E+00
2 .0 E- 0 1
1.0E+00
1 .5 E- 0 1
=
6.0E-01
4.0E-01
2.0E-01
0.0E+00
5 .0 E- 0 2
0 .0 E+ 0 0
- 5 .0 E- 0 2
- 1 .0 E- 0 1
-2.0E-01
0.E+00
1 .0 E- 0 1
Amplitude
Amplitude
8.0E-01
- 1 .5 E- 0 1
5.E-09
1.E-08
Time (sec)
2.E-08
2.E-08
- 2 .0 E- 0 1
- 2 .5 E- 0 1
0
10 ns pulse width
2 ns edges
100 s period
1 E- 0 8
2 E- 0 8
3 E- 0 8
4 E- 0 8
Time ( Se c )
5 E- 0 8
6 E- 0 8
Can easily need a system with GHz
of bandwidth!
Page 11
Using Standard SMUs for Pulsed Measurement
 Easy extension from DC measurement.
 Can make pulsed IV measurements down to
500 μs using the same DC measurement setup
 Intrinsic hardware based timing control for
pulse width, period and wait time parameters.
 Three standard SMU modules are supported
on the B1500A device analyzer.
Vd
Id
Vg
 B1510A High Power SMU (200V/1A, 10fA resolution)
 B1511B Medium Power SMU (100V/0.1A, 10fA resolution)
 B1517A High resolution SMU (100V/0.1A, 1fA)
SMU module
Note:
1. Measurement range and DUT impedance may limit the achievable pulse width.
2. Trade-offs need to be made between effective resolution and pulse speed.
Page 12
50 μs Pulsing Using Medium Current SMU (MCSMU)
 Specialized SMU supporting 50 μs pulsing
(10 times faster than other SMUs)
 Power output of 30 V@1 A (pulse mode)
50μs Pulse MCSMU (B1514A)
 Software supports unique Oscilloscope view that enables you to monitor
voltage & current waveforms directly on B1500A without any additional
equipment
 Oscilloscope view permits waveform verification and timing parameter
optimization
Oscilloscope view
Pulse
Level
Programed waveform
Actual waveform
Measurement point
Risk that measurement is performed
before pulse reaches its peak.
Actual waveform does not match programmed
waveform due to capacitive loading, etc.
Time
Actual waveform can be monitored.
Page 13
The Traditional Solution for Fast Pulsed Measurement
A seemingly simple
measurement technique,
but…
This is not simple to
implement!
DC Bias Source and
System Controller
Shunt
Resistance
SMUs for DC bias
R
Voltage drop due to Id
Gate bias pulse
D
+
G
Id Vd
S
Oscilloscope
Pulse Generator
Id
Voltage drop due to Id
Shunt resistance (R)
Page 14
Challenges When Implementing a Pulsed IV System
Using Discrete Instruments
System accuracy
• The overall error is the sum of the individual instrument errors
• Basic scope resolution is only ~ 8 bits
Requires precision components & connectors
• The shunt resistance must be very precise
• The cabling needs to be matched and calibrated
• Connections need to be tightened to known a torque using a torque wrench
Software
• The amount of time and effort needed to create the software to integrate
everything together is not trivial
Compensation for Id Voltage Drop
• Actual Vd applied to transistor varies with Id, so compensation routines are
needed if a constant Vd is desired
Page 15
Agilent’s Solution for 10 ns Pulsed IV Measurement
Agilent DSO
Digital Storage Oscilloscope
Agilent 81110A Pulse Generator
Gate Pulse
Output Ch
Gate Pulse
Monitor Ch
D
G
Bias-T
Agilent B1500A
Semiconductor Device
Analyzer
Drain Current
Monitor Ch
S
DUT
DC Bias Ch from SMU
Convenient EasyEXPERT GUI
Optional 11713B Switch Controller:
Provides easy switching between DC
and Pulsed Measurements.
Page 16
Correlation to DC Measurement @ 10ns pulse width
using a bulk NMOS transistor w/o self heating
Id-Vd: DC vs. PLSDIV @ 10ns
Id-Vg: DC vs. PLSDIV @ 10ns
1.6E-02
2.E-02
1.4E-02
1.E-02
DC Vg = - 0.5V
1.2E-02
DC Vd = 1V
1.E-02
DC Vg = 0V
DC Vg = 1V
8.0E-03
10nsec Vg = - 0.5V
10nsec Vg = 0V
6.0E-03
DC Vd = 2V
1.E-02
DC Vg = 0.5V
Id (A)
Id (A)
1.0E-02
DC Vd = 3V
8.E-03
DC Vd = 4V
6.E-03
10nsec Vd = 1V
4.E-03
10nsec Vd = 2V
2.0E-03
2.E-03
10nsec Vd = 3V
0.0E+00
0.E+00
10nsec Vg = 0.5V
4.0E-03
10nsec Vg = 1V
10nsec Vd = 4V
0
1
2
3
Vd (V)
4
5
-1
-0.5
0
0.5
1
1.5
Vg (V)
IV curves measured using a 10 ns pulse width correlate
well with IV curves measured at DC (as they should).
Page 17
Key Specs of Agilent 10 ns Solution
Id-Vd, Id-Vg measurement with pulsed gate bias.
• Pulse bias sweep measurement using a single
pulse.
Variable pulse width
• 10 nsec to 1 sec.
• Pulse period is fixed as 100 sec (10 KHz)
Pulse level
• -4.5 V to +4.5V
• Maximum amplitude is up to 4.5V
• Positive pulse for NMOS FET and negative
pulse for PMOS FET
Vd Range
• Maximum 10 V
Id measurement range.
• Maximum 80 mA
• Minimum 1 A resolution (depends on
measurement range)
Page 18
An Alternative: Dedicated Hardware for Fast IV Measurement
Waveform Generator/Fast Measurement Unit (WGFMU)
Furnished
Cables
DUT
RSU
B1500A mainframe
w/B1530A modules
RSU
Voltage Monitor: BNC
Monitor waveforms using oscilloscope
Output: SMA
to/from DUT
Remote-sense and Switch Unit (RSU)
- Located near DUT to minimize signal delay
- Buffered output monitor function
- Can switch between SMU and WGFMU
SMU connection: Triaxial
DC measurement or debug using SMUs
Page 19
WGFMU: Basic Functionality and Specifications
Equivalent circuit of one WGFMU channel
(2 channels / module):
PG mode
50
V
Output
Arbitrary Linear
Waveform
Generator
A
V
Note: Fast IV mode eliminates
load line effects
Fast IV mode
PG mode:
Minimum 50 ns pulse width (50
Fast IV mode: Minimum 145 ns pulse width
Load)
Voltage ranges supported
– PG mode: -5 V to 5 V
– Fast IV mode: -5 V to 5 V, 0 V to 10 V,
-10 V to 0 V
Current measurement ranges (fixed)
– 1 A, 10 A, 100 A, 1 mA, 10 mA
Settling times for current measurement (0.6%)
– 10 mA Range
： 125ns
– 1 mA Range
： 200 ns
– 100 A Range ： 820 ns
– 10 A Range
： 5.8 s
– 1 A Range
： 37 s
Measurement resolution
– 14 bit ADC
Noise
– Max. 0.1 mVrms (V force)
– Max. 0.4 mVrms (V measure)
– <0.2% of Range (I measure)
Sampling rate
– 200 MSa/s (Interval: 5 ns or 10 ns to 1 s
w/avg.)
Memory length
– 4,000,000 points/channel
Page 20
Fast IV Sweep Measurement Made Using the Agilent’s
WGFMU
• A staircase sweep with 100 s per
step (50 s delay) was performed to
create a baseline
-1.E-03
-9.E-04
-8.E-04
• A staircase sweep with 1 s per step
(500 ns delay） correlates well with
the 100 s measurement
-7.E-04
Id (A)
-6.E-04
• A 1 s pulsed IV sweep （100 ns
rise/fall time, 500 ns delay, 2 s
period) also correlates well with the
other two measurements
-5.E-04
-4.E-04
-3.E-04
100 s Step (Reference)
1 s Step
1 s Pulse
-2.E-04
-1.E-04
• Averaging time: 50 ns
• Current measurement range: 10 mA
0.E+00
0
-0.5
-1
-1.5
Vg (V)
-2
-2.5
-3
This data shows that there is no dependency on step size or
pulsing; all measurements yield the same results.
Page 21
Rack & Stack Solution vs. Integrated Module
Discrete Instrument Solution:
• Extremely fast pulsing (2 ns rise/fall, 10 ns width)
• Complex calibration issues
• Requires very sophisticated software
• Can be subject to load line effects
• Can be expensive
Integrated Module:
• Easy to use
• No calibration issues (off-the-shelf product)
• Slower pulsing capability (10 ns rise/fall, 50 ns width)
• Eliminates load line effects
• Relatively less expensive
Page 22
PRACTICAL HIGH SPEED
MEASUREMENT ISSUES
Page 23
Proper Structure Design is Crucial to Achieving Clean
Pulses on Pulses <200 ns in Width
Gate
Source
Source
/Sub
Gate
Source
/Sub
Drain
Sub
Source
/Sub
Drain
Source
/Sub
Structure for conventional
DC measurement
Large overshoot and ringing
Structure optimized
for RF measurement
Clean pulse shape
Page 24
Pad Arrangement Good Down to ~200 ns
Coaxial Probe
Coaxial Probe
Signal
GND
Gate
Source
Drain
Substrate
Signal
GND
Long, non-50 Ohm current
path distorts the pulse shape.
Page 25
Pad Arrangement Good Down to ~100 ns
Coaxial Probe
Coaxial Probe
Signal
GND
Gate
Substrate
Drain
Source
Signal
GND
Note that a minor change in pad layout significantly improves
measurement results.
Page 26
Pad Arrangement Good Down to 10 ns
GND
Source/
Subs
Source/
Subs
GND
Coaxial
Probe
Coaxial
Probe
Signal
GND
Minimize the loss in
the gate pulse path
Gate
Drain
Source/
Subs
Source
/ Subs
Minimize the voltage offset caused by the
high-frequency impedance mismatch
between the source and substrate
Signal
GND
Minimize the loss in
the drain current path
Page 27
Important! Keep the Signal Path Clean
DC bias, ground and
control pads (if needed)
200 m
GSG
Pads
DUT
GSG
Pads
Signal Path
Minimum pad size:
50 m x 50 m
(Infinity Probes)
• Separate probes by at least 200 m to avoid cross-talk
• All grounds should be connected together
Page 28
Using DC Probes for High-Speed Measurements
Advantages:
• Cheaper than RF probes
• Bandwidth OK for WGFMU module
• Flexible pad layouts
Disadvantages:
• Minimum achievable pulse width ~100 ns
• Mechanical tension created on probes
• Not supported by all prober companies
To measurement equipment
To measurement equipment
16493R-101 or 102
16493R-202
SSMC(Plug) – SMA(m) 200 mm
16493R-202
SSMC (Plug) – SMA(m) 200 mm
Cable Accessories
Establishes return path
for Drain Current
Establishes return path
for Gate Pulse
Terminates Well
and Source
Page 29
Using RF Probes for High-Speed Measurements
Advantages:
• More than sufficient bandwidth
• Impossible to improperly connect
Disadvantages:
• Cost
• Fixed pad layout
To measurement equipment
SMA Connectors
RF Probe
( ex. Cascade Microtech Infinity Probe)
Source/
Well
Gate
Signal
Gnd
Gnd Signal
Gnd
Source/
Well
G
Source/
Well
Drain
Source/
Well
Page 30
Can SMUs be Used as Bias Sources in High-Speed
Measurements?
SMU #1
NO! SMUs cannot respond fast enough
when the FET is driven by a fast pulse.
WGFMU #1
WGFMU #2
A
SMU #2
WGFMU #1
Response time of SMU output
SMU #1
• It is best if you can keep the non-switching nodes
at ground
• If you need to vary the voltage on all nodes, then
use only high-speed equipment (e.g. WGFMU)
even if the node is held at a constant voltage
• If you must use SMUs, then only connect them to
terminals where there is little or no current flow
• Also if using SMUs, make sure that they are set to
their maximum current range for fastest response
t
Page 31
Wafer Chuck Considerations
Wafer Chuck
Chuck to ground
capacitance
（＞1000 pF）
• If left open the chuck will charge up and the
substrate potential may not be stable during
measurement (important if performing longduration reliability test)
• If the WGFMU module is connected to the
chuck then it will have a very long settling time
due to the large chuck capacitance
Difficult to change chuck voltage quickly
Vtop
Vchuck
Alternative method
Vtop
• Use a shorting plug to ground the wafer chuck
(do not leave it open!)
• If the chuck must be biased, keep the voltage
constant throughout your measurement
Vchuck
Page 32
Probe Contact Resistance
Maintaining low contact resistance is
critical for pulsed measurements
• High contact resistance combines with stray capacitance to
degrade pulse shape (sometimes quite significantly)
• High contact resistance also reduces both the amplitude of the
pulse voltage and the current flowing into the DUT
Page 33
Cable Capacitance Can Also Affect Measurement
Results
Measurement Distortion
A
Measured Id
Id
50
Rising Edge
Cable charging
current
Actual Id less than
measured by Ammeter
(or current probe)
A
Falling Edge
50
Vd
One way to avoid this issue (other than making
your cables as short as possible) is to measure
current at the source, since it is usually at a
stable voltage (i.e. zero volts).
Page 34
Issues Caused by Fixed 50
Vg
Device Impedance
changes
PGU Output Impedance
Vg
Device Impedance
changes
１
2
Vd
Vd
Conventional Pulse Generator
WGFMU Module (Fast IV Mode)
１ Voltage applied to DUT changes when device impedance
changes
2 Voltage applied to DUT does not match programmed
value even when device impedance becomes constant
No load lines effects
Electromagnetic Induction Noise
Loop Area: S_loop
Noise
current
V_ noise (t )
d
S _ loop B_ noise
dt
Magnetic Flux: B_noise
• Electromagnetic noise is proportional to the loop area
• To reduce noise, make the signal loop as small as possible
Page 36
Twist Cables to Minimize Noise
(B1500A WGFMU Module Example)
B1500A
Twist long cables between
the RSUs and the B1500A
to minimize signal area
RSU
RSU
RSU
RSU
16493R-101 or 102
16493R-202
SSMC (Plug) –
SMA(m) 200 mm
To make current
return path for gate
pulse signal.
16493R-202
SSMC(Plug) – SMA(m) 200
mm
To make current
return path for drain
current signal.
To shorten the
well and source
Cable accessories to connect probe shields
Must properly connect
probe shields
Page 37
Beware of “Hidden” Ground Loops
B1500A
Prober
I/F Plate
SMU Cable (Triaxial)
SMU
Chamber
WGFMU
Ground Loop
Wafer Chuck
GNDU
Frame
Circuit Common
Chassis Common
Connecting with multiple cables reduces the residual resistance,
but it increases total area of ground/signal loop
Page 38
Solution to Ground Loop Issue
B1500A
Prober
I/F Plate
SMU Cable (Triaxial)
SMU
WGFMU
Chamber
Wafer Chuck
GNDU
Frame
Circuit Common
Chassis Common
You may need to disconnect the instrument common from earth
(chassis) ground and/or do the same for the wafer prober.
Page 39
Filtering Noise (If Necessary)
Ferrite Cores
RSU
RSU
• Ferrite cores are an effective means of eliminating noise
• Cut-off frequencies need to be chosen carefully to avoid removing
the high-frequency components of the signal being measured
Page 40
HIGH-SPEED AND PULSED
MEASUREMENT EXAMPLES
Page 41
Negative Bias Temperature Instability
• Phenomena:
– Shift in Vth and degradation
(reduction) of Ion under negatively
biased gate voltage
– Dynamic recovery
The shift partially recovers if the stress is
removed
PMOS
ON
OFF
VDD
Out
H
L
IN
L
H
NMOS
OFF
ON
– More severe in PMOS transistors
• Accelerated under:
– High temperature
– High Vg bias
Page 42
Why Has NBTI Become a Major Issue?
• Process Vdds are lower
– At Vdd <= 1.2 V, even a 20-50 mV shift in Vth has a
big impact
• Many ICs are running much hotter than in the
past (circuit self heating)
• Advanced processing issues exacerbate the NBTI
mechanism
– Dependent on gate dielectric material
 High-k gate dielectrics have more defects than
standard materials
– Dependent on gate insulator thickness
 Effect grows exponentially worse as thickness
decreases
Page 43
NBTI Dynamic Recovery
Fast recovery from the stress condition
The defects generated by the stress recover rapidly after removal of the stress:
• The total number of defects consists of the combination of permanent defects and
fast recovering defects (different defect mechanisms).
• It is difficult to estimate the number of fast recovery defects prior to measurement
because they depend upon a variety of factors (gate material, process factors,
bias voltage and stress time).
Drain Current
|Id|
Voltage
Stress
Measurement
Gate Bias
Slow recovery
Rapid recovery immediately
after stress removal
Drain Bias
Time
Transition from stress
to measure
Time
Start of Measurement
Page 44
Ultra-fast NBTI Measurement Requirements
At the 2006 IRPS H. Reisinger (Infineon) questioned the NBTI data
taken via conventional methods. He stated that the dynamic
recovery time of charge trapped in the insulator or surface greatly
affects the results of the NBTI characterization.
The dynamic recovery time is highly
dependent on the gate insulation
material:
Conventional oxide…200 s
High-k dielectric... <1 s
Conclusion: NBTI measurements
made within 1 s after stress
removal are necessary!
by Reisinger：90nm Conventional
Page 45
Ultra-fast Id Spot Measurement Using WGFMU
Stress
Stress
Stress
Magnified
Vg
Measure
Vd
Id spot measurement within 1 s after removal of the stress*
*Note: 10 mA and 1 mA ranges. The measurement speed depends upon the measurement range settling time.
Page 46
Both AC & DC Stressing Capabilities are Needed
Stress
Vg
Vd
Stress
Stress
Meas
DC Stress
Stress
Vg
Vd
Stress
Stress
Meas
AC Stress (100 kHz, Duty cycle 50%)
• The only difference between the AC and DC cases is the shape of the
stress waveforms
• In both cases there is no delay in transitioning from stress to measure
and no glitching during the transition
Page 47
The Effects of DC & AC Stress on NBTI Device
Degradation Are Dramatically Different
100
100
DC
Id (%)
Id (%)
DC
Duty 50%
10
10
Duty 50%
Duty 25%
Duty 25%
1
1
1.E-04
1.E-02
1.E+00
1.E+02
(s)(sec)
Accumulated Absolute Stress Time
1.E+04
1.E-04
1.E-02
1.E+00
1.E+02
1.E+04
(s) (sec)
Accumulated Nominal Stress Time
• Pure DC stress causes the largest shift in the Id.
• AC stress is probably a more realistic representation of the stress
experienced by devices under normal operating conditions
Page 48
Why is RTS Noise* Important?
• As MOSFET device sizes shrink, RTS noise
becomes much more prominent at low frequencies
– RTS noise is believed to be caused by charge
trapping/de-trapping
– If RTS noise occurs it generally dominates all other
low-frequency noise components
• Active pixel sensors (aka CMOS image sensors)
are especially sensitive to RTS noise
– In CMOS image sensors RTS noise generates
erroneous white spots in what should be dark areas
• SRAM Cell Stability
– As lithographies and voltage levels have continued to
shrink, RTS noise is starting to impact SRAM cell
stability.
*Note: RTS noise (RTN) is also known as burst noise or popcorn noise.
Page 49
What is a Random Telegraph Signal (RTS)?
A random process that has the following properties:
1.
2.
X(t) = ±1
The number of zero crossings in the interval (0,t) is described by a
Poisson process.
+1
0
-1
Time
Page 50
WGFMU RTS Noise Measurement Technique
Output waveform
monitor (optional)
V
Gate
WGFMU
Drain
Time
(Measured with WGFMU)
I
Drain current sampling
Note: Sampling rates need to be in the nanosecond range, and hundreds of
thousands (or even millions) of measurement points may need to be recorded.
Page 51
Sample RTS Noise Measurements Made Using the
B1500A WGFMU Module
Id [A]
Measured sampling data
Zoom
Time [s]
Digitized data
Page 52
RTS Noise Power Spectrum Distribution
Slope is constant
at low frequencies.
Slope
1
f2
(At high frequencies)
Page 53
When are <100 ns Pulses Required?
Source Gate
Self-heating
effect
p
p
n+
SiO2
Drain
n+
p-Si
MOS-FET on SOI
SOI Transistors
– Short pulse width (under 100 ns) to
avoid heat generation.
– Very small duty cycle (< 0.1%) to allow
time for the device to cool.
An ultra short pulse
can be used to
measure the intrinsic
Id of a MOSFET.
Trapped
electrons
tunneling
through the
barrier oxide
Vd
Id
G
Vg
S
Ec MOSFETs Impacted by electron trapping
Gate
Ef
Ev
High-K
p-Si
Barrier Oxide
– Short pulse width to measure Id before any
electrons can get trapped
– Negative gate baseline voltage to remove
electrons before next pulsed measurement.
Page 54
Measurement Example Using 10 ns Pulsing
Charge trapping effects
are clearly visible in the
measurement results.
9.E-03
8.E-03
7.E-03
6.E-03
W = 10nsec
Id (A)
5.E-03
W = 100nsec
4.E-03
W = 1usec
3.E-03
DC
2.E-03
1.E-03
0.E+00
-1.E-03
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
Vg
SiON device with large interface trap density
Page 55
SUMMARY AND CONCLUSIONS
Page 56
What Are the Key Points to Remember for Successful
High-Speed Test?
 Equipment considerations
• Make sure you know what your fast measurement or pulsing needs are so
that you can chose the proper equipment to meet your requirements.
• If making on-wafer measurements, make sure that your prober supports the
necessary probes and that it has a low enough noise floor for your needs.
• Follow all suggestions in this presentation for on-wafer probing.
 Careful planning and device layout can prevent many headaches later
• Optimize layouts for high-speed
• Minimize contact resistance
 Follow these basic principles if building a system on your own
• Calibrate scope and pulse generator using precision meter
• Use high-quality cables with known delay times
• Keep cable lengths as short as possible
• Make sure all connections have the proper torque
Page 57
Agilent Parametric Handbook Has More Information
>200 pages of invaluable
information on parametric test
You can download the PDF file (Rev 3) from the web:
http://www.agilent.com/find/parametrichandbook
You can also request it after completing the evaluation form.
Page 58
Thank You for Your Kind Attention
Page 59
Questions
Page 60