Precision, Ultralow Noise, RRIO, Zero-Drift Op Amp ADA4528-1/ADA4528-2 Data Sheet PIN CONNECTION DIAGRAMS Low offset voltage: 2.5 µV maximum Low offset voltage drift: 0.015 μV/°C maximum Low noise 5.6 nV/√Hz at f = 1 kHz, AV = +100 97 nV p-p at f = 0.1 Hz to 10 Hz, AV = +100 Open-loop gain: 130 dB minimum CMRR: 135 dB minimum PSRR: 130 dB minimum Unity-gain crossover: 4 MHz Gain bandwidth product: 3 MHz at AV = 100 −3 dB closed-loop bandwidth: 6.2 MHz Single-supply operation: 2.2 V to 5.5 V Dual-supply operation: ±1.1 V to ±2.75 V Rail-to-rail input and output Unity-gain stable NIC 1 ADA4528-1 +IN 3 TOP VIEW (Not to Scale) V– 4 8 NIC 7 V+ 6 OUT 5 NIC NOTES 1. NIC = NO INTERNAL CONNECTION. Figure 1. ADA4528-1 Pin Configuration, 8-Lead MSOP NIC 1 8 NIC –IN 2 ADA4528-1 +IN 3 TOP VIEW (Not to Scale) V– 4 7 V+ 6 OUT 09437-102 5 NIC NOTES 1. NIC = NO INTERNAL CONNECTION. 2. CONNECT THE EXPOSED PAD TO V– OR LEAVE IT UNCONNECTED. APPLICATIONS Figure 2. ADA4528-1 Pin Configuration, 8-Lead LFCSP Thermocouple/thermopile Load cell and bridge transducers Precision instrumentation Electronic scales Medical instrumentation Handheld test equipment For ADA4528-2 pin connections and for more information about the pin connections for these products, see the Pin Configurations and Function Descriptions section. The ADA4528-1/ADA4528-2 are ultralow noise, zero-drift operational amplifiers featuring rail-to-rail input and output swing. With an offset voltage of 2.5 μV, offset voltage drift of 0.015 μV/°C, and typical noise of 97 nV p-p (0.1 Hz to 10 Hz, AV = +100), the ADA4528-1/ADA4528-2 are well suited for applications in which error sources cannot be tolerated. The ADA4528-1/ADA4528-2 have a wide operating supply range of 2.2 V to 5.5 V, high gain, and excellent CMRR and PSRR specifications, which make it ideal for applications that require precision amplification of low level signals, such as position and pressure sensors, strain gages, and medical instrumentation. The ADA4528-1/ADA4528-2 are specified over the extended industrial temperature range (−40°C to +125°C). The ADA4528-1 is available in 8-lead MSOP and 8-lead LFCSP packages. The ADA4528-2 is available in an 8-lead MSOP package. For more information about the ADA4528-1/ADA4528-2, see the AN-1114 Application Note, Lowest Noise Zero-Drift Amplifier Has 5.6 nV/√Hz Voltage Noise Density. VSY = 5V AV = 1 VCM = VSY/2 10 1 1 10 100 1k 10k 100k 1M FREQUENCY (Hz) 10M 09437-063 VOLTAGE NOISE DENSITY (nV/√Hz) 100 GENERAL DESCRIPTION Figure 3. Voltage Noise Density vs. Frequency Table 1. Analog Devices, Inc., Zero-Drift Op Amp Portfolio 1 Low Ultralow Micropower Power Type Noise (<20 µA) (<1 mA) Single ADA4528-1 ADA4051-1 AD8628 AD8538 Dual ADA4528-2 ADA4051-2 AD8629 AD8539 Quad AD8630 1 Rev. C –IN 2 09437-001 FEATURES 16 V Operating Voltage AD8638 30 V Operating Voltage ADA4638-1 AD8639 See www.analog.com for the latest selection of zero-drift operational amplifiers. Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. 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AD8606: Precision, Low Noise, RRIO, CMOS Op Amp (Dual) Amplifiers for Signal Conditioning - Section 3 AD8615: Precision 20 MHz CMOS Single RRIO Operational Amplifier MS-2066: Low Noise Signal Conditioning for Sensor-Based Circuits ADA4528-2: 5.0V Ultralow Noise, Zero-Drift, RRIO, Dual Op Amp Zero-drift Amplifier from Analog Devices Achieves Industry's Lowest Voltage Noise Zero-drift Amplifiers Peak High-speed Performance even at low power. It's why more engineers choose ADI Data Converters. RAQs index *This page was dynamically generated by Analog Devices, Inc. and inserted into this data sheet. Note: Dynamic changes to the content on this page (labeled ‘important links’) does not constitute a change to the revision number of the product data sheet. This content may be frequently modified. ADA4528-1/ADA4528-2 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Pin Configurations and Function Descriptions ............................8 Applications ....................................................................................... 1 Typical Performance Characteristics ........................................... 10 General Description ......................................................................... 1 Applications Information .............................................................. 19 Pin Connection Diagrams ............................................................... 1 Input Protection ......................................................................... 19 Revision History ............................................................................... 2 Rail-to-Rail Input and Output .................................................. 19 Specifications..................................................................................... 3 Noise Considerations ................................................................. 19 Electrical Characteristics—2.5 V Operation ............................ 3 Comparator Operation .............................................................. 21 Electrical Characteristics—5 V Operation................................ 5 Printed Circuit Board Layout ................................................... 22 Absolute Maximum Ratings ............................................................ 7 Outline Dimensions ....................................................................... 23 Thermal Resistance ...................................................................... 7 Ordering Guide .......................................................................... 23 ESD Caution .................................................................................. 7 REVISION HISTORY 9/12—Rev. B to Rev. C Changes to Features Section............................................................ 1 Added Comparator Operation Section ....................................... 21 Added Figure 65 to Figure 69; Renumbered Sequentially ........ 21 7/12—Rev. A to Rev. B Added ADA4528-2 ............................................................. Universal Changes to Features Section, Figure 1, Figure 2, and Table 1 .... 1 Added Pin Connection Diagrams Section and Figure 3; Renumbered Sequentially................................................................ 1 Changes to Table 2 ............................................................................ 3 Changes to Table 3 ............................................................................ 5 Change to Endnote 1 of Table 4 and Thermal Resistance Section ................................................................................................ 7 Added Pin Configurations and Function Descriptions Section, Figure 4, Figure 5, and Table 6 ........................................................ 8 Added Figure 6 and Table 7............................................................. 9 Changes to Input Protection Section ........................................... 19 Changes to Source Resistance Section and Caption of Figure 63 ....................................................................... 20 Changes to Residual Voltage Ripple Section and Caption of Figure 64....................................................................... 21 Changes to Ordering Guide .......................................................... 22 9/11—Rev. 0 to Rev. A Added 8-Lead LFCSP_WD Package ................................ Universal Changes to General Description Section ......................................1 Added Figure 2; Renumbered Sequentially ...................................1 Changes to Offset Voltage, Offset Voltage Drift, Power Supply Rejection Ratio, and Settling Time to 0.1% Parameters, Table 2 ...3 Changes to Thermal Resistance Section and Table 5 ...................5 Changes to Figure 41 and Figure 44 ............................................ 12 Changes to Figure 45 and Figure 48 ............................................ 13 Updated Outline Dimensions ....................................................... 18 Changes to Ordering Guide .......................................................... 18 1/11—Revision 0: Initial Version Rev. C | Page 2 of 24 Data Sheet ADA4528-1/ADA4528-2 SPECIFICATIONS ELECTRICAL CHARACTERISTICS—2.5 V OPERATION VSY = 2.5 V, VCM = VSY/2, TA = 25°C, unless otherwise specified. Table 2. Parameter INPUT CHARACTERISTICS Offset Voltage Symbol Test Conditions/Comments VOS VCM = 0 V to 2.5 V −40°C ≤ TA ≤ +125°C, MSOP package −40°C ≤ TA ≤ +125°C, LFCSP package −40°C ≤ TA ≤ +125°C, MSOP package −40°C ≤ TA ≤ +125°C, LFCSP package Offset Voltage Drift ΔVOS/ΔT Input Bias Current IB Min Typ Max Unit 0.3 2.5 4 4.3 0.015 0.018 400 600 800 1 2.5 μV μV μV μV/°C μV/°C pA pA pA nA V dB dB dB dB dB dB dB dB 0.002 220 −40°C ≤ TA ≤ +125°C Input Offset Current IOS 440 −40°C ≤ TA ≤ +125°C Input Voltage Range Common-Mode Rejection Ratio CMRR Open-Loop Gain AVO ADA4528-1 ADA4528-2 Input Resistance Differential Mode Common Mode Input Capacitance Differential Mode Common Mode OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Short-Circuit Current Closed-Loop Output Impedance POWER SUPPLY Power Supply Rejection Ratio Supply Current per Amplifier DYNAMIC PERFORMANCE Slew Rate Settling Time to 0.1% Unity-Gain Crossover Phase Margin Gain Bandwidth Product −3 dB Closed-Loop Bandwidth Overload Recovery Time VCM = 0 V to 2.5 V −40°C ≤ TA ≤ +125°C RL = 10 kΩ, VO = 0.1 V to 2.4 V −40°C ≤ TA ≤ +125°C RL = 2 kΩ, VO = 0.1 V to 2.4 V −40°C ≤ TA ≤ +125°C RL = 2 kΩ, VO = 0.1 V to 2.4 V −40°C ≤ TA ≤ +125°C 0 135 116 130 126 125 121 122 119 158 140 132 132 RINDM RINCM 225 1 kΩ GΩ CINDM CINCM 15 30 pF pF 2.495 V V V V mV mV mV mV mA Ω VOH VOL ISC ZOUT PSRR ISY SR tS UGC ΦM GBP f−3dB RL = 10 kΩ to VCM −40°C ≤ TA ≤ +125°C RL = 2 kΩ to VCM −40°C ≤ TA ≤ +125°C RL = 10 kΩ to VCM −40°C ≤ TA ≤ +125°C RL = 2 kΩ to VCM −40°C ≤ TA ≤ +125°C 2.49 2.485 2.46 2.44 5 20 RL = 10 kΩ, CL = 100 pF, AV = +1 VIN = 1.5 V step, RL = 10 kΩ, CL = 100 pF, AV = −1 VIN = 10 mV p-p, RL = 10 kΩ, CL = 100 pF, AV = +1 VIN = 10 mV p-p, RL = 10 kΩ, CL = 100 pF, AV = +1 VIN = 10 mV p-p, RL = 10 kΩ, CL = 100 pF, AV = +100 VIN = 10 mV p-p, RL = 10 kΩ, CL = 100 pF, AV = +1 RL = 10 kΩ, CL = 100 pF, AV = −10 Rev. C | Page 3 of 24 10 15 40 60 ±30 0.1 f = 1 kHz, AV = +10 VSY = 2.2 V to 5.5 V −40°C ≤ TA ≤ +125°C IO = 0 mA −40°C ≤ TA ≤ +125°C 2.48 130 127 150 1.4 0.45 7 4 57 3 6.2 50 1.7 2.1 dB dB mA mA V/μs µs MHz Degrees MHz MHz μs ADA4528-1/ADA4528-2 Parameter NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Current Noise Density Data Sheet Symbol Test Conditions/Comments en p-p en f = 0.1 Hz to 10 Hz, AV = +100 f = 1 kHz, AV = +100 f = 1 kHz, AV = +100, VCM = 2.0 V f = 0.1 Hz to 10 Hz, AV = +100 f = 1 kHz, AV = +100 in p-p in Rev. C | Page 4 of 24 Min Typ 97 5.6 5.5 10 0.7 Max Unit nV p-p nV/√Hz nV/√Hz pA p-p pA/√Hz Data Sheet ADA4528-1/ADA4528-2 ELECTRICAL CHARACTERISTICS—5 V OPERATION VSY = 5 V, VCM = VSY/2, TA = 25°C, unless otherwise specified. Table 3. Parameter INPUT CHARACTERISTICS Offset Voltage Symbol Test Conditions/Comments VOS Offset Voltage Drift Input Bias Current ADA4528-1 ΔVOS/ΔT IB VCM = 0 V to 5 V −40°C ≤ TA ≤ +125°C −40°C ≤ TA ≤ +125°C Min Typ Max Unit 0.3 2.5 4 0.015 μV μV μV/°C 200 300 250 350 pA pA pA pA 400 500 500 600 5 pA pA pA pA V dB dB dB dB dB dB 0.002 90 −40°C ≤ TA ≤ +125°C ADA4528-2 125 −40°C ≤ TA ≤ +125°C Input Offset Current ADA4528-1 IOS 180 −40°C ≤ TA ≤ +125°C ADA4528-2 250 −40°C ≤ TA ≤ +125°C Input Voltage Range Common-Mode Rejection Ratio CMRR Open-Loop Gain AVO Input Resistance Differential Mode Common Mode Input Capacitance Differential Mode Common Mode OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Short-Circuit Current Closed-Loop Output Impedance POWER SUPPLY Power Supply Rejection Ratio Supply Current per Amplifier DYNAMIC PERFORMANCE Slew Rate Settling Time to 0.1% Unity-Gain Crossover Phase Margin Gain Bandwidth Product −3 dB Closed-Loop Bandwidth Overload Recovery Time VCM = 0 V to 5 V −40°C ≤ TA ≤ +125°C RL = 10 kΩ, VO = 0.1 V to 4.9 V −40°C ≤ TA ≤ +125°C RL = 2 kΩ, VO = 0.1 V to 4.9 V −40°C ≤ TA ≤ +125°C 0 137 122 127 125 121 120 160 139 131 RINDM RINCM 190 1 kΩ GΩ CINDM CINCM 16.5 33 pF pF 4.995 V V V V mV mV mV mV mA Ω VOH VOL ISC ZOUT PSRR ISY SR tS UGC ΦM GBP f−3dB RL = 10 kΩ to VCM −40°C ≤ TA ≤ +125°C RL = 2 kΩ to VCM −40°C ≤ TA ≤ +125°C RL = 10 kΩ to VCM −40°C ≤ TA ≤ +125°C RL = 2 kΩ to VCM −40°C ≤ TA ≤ +125°C 4.99 4.98 4.96 4.94 5 20 RL = 10 kΩ, CL = 100 pF, AV = +1 VIN = 4 V step, RL = 10 kΩ, CL = 100 pF, AV = −1 VIN = 10 mV p-p, RL = 10 kΩ, CL = 100 pF, AV = +1 VIN = 10 mV p-p, RL = 10 kΩ, CL = 100 pF, AV = +1 VIN = 10 mV p-p, RL = 10 kΩ, CL = 100 pF, AV = +100 VIN = 10 mV p-p, RL = 10 kΩ, CL = 100 pF, AV = +1 RL = 10 kΩ, CL = 100 pF, AV = −10 Rev. C | Page 5 of 24 10 20 40 60 ±40 0.1 f = 1 kHz, AV = +10 VSY = 2.2 V to 5.5 V −40°C ≤ TA ≤ +125°C IO = 0 mA −40°C ≤ TA ≤ +125°C 4.98 130 127 150 1.5 0.5 10 4 57 3.4 6.5 50 1.8 2.2 dB dB mA mA V/μs µs MHz Degrees MHz MHz μs ADA4528-1/ADA4528-2 Parameter NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Current Noise Density Data Sheet Symbol Test Conditions/Comments en p-p en f = 0.1 Hz to 10 Hz, AV = +100 f = 1 kHz, AV = +100 f = 1 kHz, AV = +100, VCM = 4.5 V f = 0.1 Hz to 10 Hz, AV = +100 f = 1 kHz, AV = +100 in p-p in Rev. C | Page 6 of 24 Min Typ 99 5.9 5.3 10 0.5 Max Unit nV p-p nV/√Hz nV/√Hz pA p-p pA/√Hz Data Sheet ADA4528-1/ADA4528-2 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 4. Parameter Supply Voltage Input Voltage Input Current1 Differential Input Voltage Output Short-Circuit Duration to GND Storage Temperature Range Operating Temperature Range Junction Temperature Range Lead Temperature (Soldering, 60 sec) 1 Rating 6V ±VSY ± 0.3 V ±10 mA ±VSY Indefinite −65°C to +150°C −40°C to +125°C −65°C to +150°C 300°C θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages using a 4-layer JEDEC board. The exposed pad of the LFCSP package is soldered to the board. Table 5. Thermal Resistance Package Type 8-Lead MSOP (RM-8) 8-Lead LFCSP (CP-8-12) The input pins have clamp diodes to the power supply pins. Limit the input current to 10 mA or less whenever input signals exceed the power supply rail by 0.3 V. ESD CAUTION Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. C | Page 7 of 24 θJA 142 80 θJC 45 14 Unit °C/W °C/W ADA4528-1/ADA4528-2 Data Sheet PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS NIC 1 ADA4528-1 +IN 3 TOP VIEW (Not to Scale) V– 4 NIC 7 V+ 6 OUT 5 NIC NOTES 1. NIC = NO INTERNAL CONNECTION. 8 NIC –IN 2 ADA4528-1 +IN 3 TOP VIEW (Not to Scale) V– 4 5 NIC Figure 5. ADA4528-1 Pin Configuration, 8-Lead LFCSP Table 6. ADA4528-1 Pin Function Descriptions Mnemonic NIC −IN +IN V− OUT V+ EPAD 6 OUT NOTES 1. NIC = NO INTERNAL CONNECTION. 2. CONNECT THE EXPOSED PAD TO V– OR LEAVE IT UNCONNECTED. Figure 4. ADA4528-1 Pin Configuration, 8-Lead MSOP Pin No. 1, 5, 8 2 3 4 6 7 7 V+ 09437-102 –IN 2 8 09437-001 NIC 1 Description No Internal Connection. Inverting Input. Noninverting Input. Negative Supply Voltage. Output. Positive Supply Voltage. Exposed Pad (LFCSP Only). Connect the exposed pad to V− or leave it unconnected. Rev. C | Page 8 of 24 ADA4528-1/ADA4528-2 OUT A 1 –IN A 2 ADA4528-2 +IN A 3 TOP VIEW (Not to Scale) V– 4 8 V+ 7 OUT B 6 –IN B 5 +IN B 09437-103 Data Sheet Figure 6. ADA4528-2 Pin Configuration, 8-Lead MSOP Table 7. ADA4528-2 Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 8 Mnemonic OUT A −IN A +IN A V− +IN B −IN B OUT B V+ Description Output, Channel A. Inverting Input, Channel A. Noninverting Input, Channel A. Negative Supply Voltage. Noninverting Input, Channel B. Inverting Input, Channel B. Output, Channel B. Positive Supply Voltage. Rev. C | Page 9 of 24 ADA4528-1/ADA4528-2 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted. 100 100 VSY = 2.5V VCM = VSY/2 90 80 70 60 50 40 30 70 60 50 40 30 20 20 10 10 –0.8 –0.6 –0.4 –0.2 0.2 0 VOS (µV) 0.4 0.6 0.8 1.0 0 –1.0 09437-002 0 –1.0 Figure 7. Input Offset Voltage Distribution –0.6 –0.2 0 0.2 VOS (µV) 0.4 0.6 0.8 1.0 60 VSY = 2.5V VCM = VSY/2 VSY = 5V VCM = VSY/2 50 NUMBER OF AMPLIFIERS 50 40 30 20 10 40 30 20 0 3 6 9 12 09437-006 09437-003 10 0 0 15 0 3 TCVOS (nV/°C) 6 9 12 15 TCVOS (nV/°C) Figure 8. Input Offset Voltage Drift Distribution Figure 11. Input Offset Voltage Drift Distribution 1.0 1.0 VSY = 5V VSY = 2.5V 0.8 0.6 0.6 0.4 0.4 0.2 0.2 0 –0.2 0 –0.2 –0.4 –0.4 –0.6 –0.6 –0.8 –0.8 –1.0 0 0.5 1.5 1.0 2.0 2.5 VCM (V) Figure 9. Input Offset Voltage vs. Common-Mode Voltage –1.0 0 1 3 2 4 VCM (V) Figure 12. Input Offset Voltage vs. Common-Mode Voltage Rev. C | Page 10 of 24 5 09437-007 VOS (µV) 0.8 09437-004 VOS (µV) –0.4 Figure 10. Input Offset Voltage Distribution 60 NUMBER OF AMPLIFIERS –0.8 09437-005 NUMBER OF AMPLIFIERS 80 NUMBER OF AMPLIFIERS VSY = 5V VCM = VSY/2 90 Data Sheet ADA4528-1/ADA4528-2 400 400 VSY = 2.5V VCM = VSY/2 300 IB+ 200 200 IB+ 100 IB (pA) 100 IB (pA) VSY = 5V VCM = VSY/2 300 0 –100 0 I B– –100 –200 –300 –300 –25 0 25 50 75 100 125 TEMPERATURE (°C) –400 –50 09437-008 –400 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) Figure 13. Input Bias Current vs. Temperature 09437-110 I B– –200 Figure 16. Input Bias Current vs. Temperature 600 600 400 +85°C 400 +85°C –40°C 200 –40°C 200 IB (pA) IB (pA) +25°C +125°C 0 0 +25°C –200 +125°C –200 –400 –400 –600 0.5 1.0 1.5 2.0 2.5 VCM (V) 0 4 5 10 OUTPUT VOLTAGE (VOL) TO SUPPLY RAIL (V) VSY = 2.5V 1 100m –40°C +25°C +85°C +125°C 1m 0.01 0.1 1 LOAD CURRENT (mA) 10 100 09437-014 OUTPUT VOLTAGE (VOL) TO SUPPLY RAIL (V) 3 Figure 17. Input Bias Current vs. Common-Mode Voltage 10 0.1m 0.001 2 VCM (V) Figure 14. Input Bias Current vs. Common-Mode Voltage 10m 1 VS = 5V 1 100m 10m –40°C +25°C +85°C +125°C 1m 0.1m 0.001 0.01 0.1 1 LOAD CURRENT (mA) 10 100 Figure 18. Output Voltage (VOL) to Supply Rail vs. Load Current Figure 15. Output Voltage (VOL) to Supply Rail vs. Load Current Rev. C | Page 11 of 24 09437-017 0 –800 09437-009 –600 09437-012 VSY = 5V VSY = 2.5V ADA4528-1/ADA4528-2 Data Sheet 10 1 100m –40°C +25°C +85°C +125°C 1m 0.01 0.1 1 LOAD CURRENT (mA) 10 100m 100 Figure 19. Output Voltage (VOH) to Supply Rail vs. Load Current OUTPUT VOLTAGE (VOL) TO SUPPLY RAIL (mV) RL = 2kΩ 15 10 RL = 10kΩ 5 –25 0 25 50 75 TEMPERATURE (°C) 100 125 OUTPUT VOLTAGE (VOH) TO SUPPLY RAIL (mV) 25 RL = 2kΩ 20 15 10 RL = 10kΩ 5 0 –50 –25 0 25 50 75 TEMPERATURE (°C) 100 125 0.1m 0.001 0.01 0.1 1 LOAD CURRENT (mA) 10 100 45 VSY = 5V 40 RL = 2kΩ 35 30 25 20 15 RL = 10kΩ 10 5 –25 0 25 50 75 TEMPERATURE (°C) 100 125 Figure 23. Output Voltage (VOL) to Supply Rail vs. Temperature 25 VSY = 5V Figure 21. Output Voltage (VOH) to Supply Rail vs. Temperature RL = 2kΩ 20 15 10 RL = 10kΩ 5 0 –50 09437-015 OUTPUT VOLTAGE (VOH) TO SUPPLY RAIL (mV) Figure 20. Output Voltage (VOL) to Supply Rail vs. Temperature VSY = 2.5V 1m 0 –50 09437-016 OUTPUT VOLTAGE (VOL) TO SUPPLY RAIL (mV) VSY = 2.5V 0 –50 10m Figure 22. Output Voltage (VOH) to Supply Rail vs. Load Current 25 20 –40°C +25°C +85°C +125°C 09437-019 0.1m 0.001 1 –25 0 25 50 75 TEMPERATURE (°C) 100 125 Figure 24. Output Voltage (VOH) to Supply Rail vs. Temperature Rev. C | Page 12 of 24 09437-117 10m VSY = 5V 09437-013 OUTPUT VOLTAGE (VOH) TO SUPPLY RAIL (V) VSY = 2.5V 09437-010 OUTPUT VOLTAGE (VOH) TO SUPPLY RAIL (V) 10 Data Sheet ADA4528-1/ADA4528-2 2.0 2.00 +125°C 1.8 +85°C 1.50 ISY PER AMPLIFIER (mA) ISY PER AMPLIFIER (mA) 1.75 +25°C 1.25 –40°C 1.00 0.75 0.50 VSY = 5.0V 1.6 VSY = 2.5V 1.4 1.2 2.0 2.5 3.0 VSY (V) 3.5 4.0 4.5 5.0 5.5 1.0 –50 –25 0 25 Figure 25. Supply Current vs. Supply Voltage 75 100 125 Figure 28. Supply Current vs. Temperature 135 120 90 90 90 90 60 45 60 45 120 135 PHASE 0 VSY = 2.5V RL = 10kΩ CL = 100pF –30 1k GAIN 30 10k 100k –90 10M 1M 0 VSY = 5V RL = 10kΩ CL = 100pF 0 –45 09437-022 0 PHASE (Degrees) GAIN 30 OPEN-LOOP GAIN (dB) PHASE FREQUENCY (Hz) –30 1k –45 10k 100k Figure 29. Open-Loop Gain and Phase vs. Frequency 60 60 VSY = 2.5V VSY = 5V 50 50 AV = 100 CLOSED-LOOP GAIN (dB) AV = 100 40 30 AV = 10 20 10 AV = 1 0 40 30 AV = 10 20 10 AV = 1 0 –10 100 1k 10k 100k 1M FREQUENCY (Hz) 10M 09437-026 –10 –20 10 –90 10M 1M FREQUENCY (Hz) Figure 26. Open-Loop Gain and Phase vs. Frequency CLOSED-LOOP GAIN (dB) OPEN-LOOP GAIN (dB) 50 TEMPERATURE (°C) PHASE (Degrees) 1.5 1.0 09437-025 0.5 Figure 27. Closed-Loop Gain vs. Frequency –20 10 100 1k 10k 100k 1M FREQUENCY (Hz) Figure 30. Closed-Loop Gain vs. Frequency Rev. C | Page 13 of 24 10M 09437-029 0 09437-021 0 09437-024 0.25 ADA4528-1/ADA4528-2 Data Sheet 140 160 VSY = 2.5V 140 VSY = 5V VCM = VSY/2 120 120 CMRR (dB) 80 60 VCM = VSY/2 VCM = 1.1V 10k 100k 1M 10M FREQUENCY (Hz) 0 100 09437-126 1k 1k 10k 100k Figure 31. CMRR vs. Frequency 120 VSY = 5V 100 100 80 80 PSRR (dB) 60 PSRR+ 40 60 PSRR+ 40 PSRR– PSRR– 20 20 0 0 10k 100k 1M 10M FREQUENCY (Hz) –20 100 09437-032 1k 10k 100k 1M 10M FREQUENCY (Hz) Figure 32. PSRR vs. Frequency Figure 35. PSRR vs. Frequency 1k 1k VSY = 2.5V VSY = 5V 100 100 10 10 ZOUT (Ω) AV = 100 AV = 10 1 AV = 1 AV = 100 AV = 1 0.1 0.01 0.01 1k 10k 100k 1M FREQUENCY (Hz) 10M Figure 33. Output Impedance vs. Frequency AV = 10 1 0.1 09437-027 ZOUT (Ω) 1k 09437-035 PSRR (dB) VSY = 2.5V 0.001 100 10M Figure 34. CMRR vs. Frequency 120 –20 100 1M FREQUENCY (Hz) 09437-031 20 0 100 60 40 40 20 80 0.001 100 1k 10k 100k 1M FREQUENCY (Hz) Figure 36. Output Impedance vs. Frequency Rev. C | Page 14 of 24 10M 09437-030 CMRR (dB) 100 100 ADA4528-1/ADA4528-2 VOLTAGE (1V/DIV) TIME (20µs/DIV) TIME (20µs/DIV) Figure 40. Large Signal Transient Response VOLTAGE (50mV/DIV) VOLTAGE (50mV/DIV) Figure 37. Large Signal Transient Response VSY = ±2.5V VIN = 100mV p-p AV = 1 RL = 10kΩ CL = 100pF 09437-038 VSY = ±1.25V VIN = 100mV p-p AV = 1 RL = 10kΩ CL = 100pF TIME (1µs/DIV) TIME (1µs/DIV) Figure 38. Small Signal Transient Response Figure 41. Small Signal Transient Response 16 16 VSY = 2.5V VIN = 100mV p-p AV = 1 RL = 10kΩ 14 VSY = 5V VIN = 100mV p-p AV = 1 RL = 10kΩ 14 12 OS+ 10 8 OS– 6 10 8 6 4 4 2 2 1 10 100 1000 LOAD CAPACITANCE (pF) OS– 0 09437-033 0 OS+ 1 10 100 1000 LOAD CAPACITANCE (pF) Figure 39. Small Signal Overshoot vs. Load Capacitance Figure 42. Small Signal Overshoot vs. Load Capacitance Rev. C | Page 15 of 24 09437-036 OVERSHOOT (%) 12 OVERSHOOT (%) 09437-037 VSY = ±2.5V VIN = 4V p-p AV = 1 RL = 10kΩ CL = 100pF 09437-034 VSY = ±1.25V VIN = 2V p-p AV = 1 RL = 10kΩ CL = 100pF 09437-041 VOLTAGE (0.5V/DIV) Data Sheet INPUT VOLTAGE (V) Data Sheet VSY = ±1.25V AV = –10 VIN = 187.5mV RL = 10kΩ CL = 100pF OUTPUT 1 0 –1 TIME (10µs/DIV) –0.5 3 1 OUTPUT 0 –1 TIME (10µs/DIV) INPUT VOLTAGE (V) Figure 46. Positive Overload Recovery VSY = ±1.25V AV = –10 VIN = 187.5mV RL = 10kΩ CL = 100pF INPUT 0 –0.5 1 OUTPUT 0 –1 –2 TIME (10µs/DIV) –1 VSY = ±2.5V AV = –10 VIN = 375mV RL = 10kΩ CL = 100pF 09437-039 0 OUTPUT VOLTAGE (V) 1 OUTPUT –2 OUTPUT VOLTAGE (V) INPUT 0 0.5 09437-042 0.5 –3 TIME (10µs/DIV) Figure 47. Negative Overload Recovery Figure 44. Negative Overload Recovery INPUT INPUT VOLTAGE (2V/DIV) VSY = 2.5V RL = 10kΩ CL = 100pF DUT AV = –1 +7.5mV ERROR BAND POST GAIN = 5 0 –7.5mV +20mV OUTPUT 0 ERROR BAND POST GAIN = 5 –20mV 09437-047 OUTPUT VSY = 5V RL = 10kΩ CL = 100pF DUT AV = –1 09437-044 VOLTAGE (1V/DIV) INPUT VOLTAGE (V) VSY = ±2.5V AV = –10 VIN = 375mV RL = 10kΩ CL = 100pF 2 Figure 43. Positive Overload Recovery –0.5 INPUT 2 OUTPUT VOLTAGE (V) –0.5 0 OUTPUT VOLTAGE (V) INPUT 0 0.5 09437-043 0.5 09437-040 INPUT VOLTAGE (V) ADA4528-1/ADA4528-2 TIME (10µs/DIV) TIME (10µs/DIV) Figure 45. Positive Settling Time to 0.1% Figure 48. Positive Settling Time to 0.1% Rev. C | Page 16 of 24 Data Sheet ADA4528-1/ADA4528-2 VSY = 2.5V RL = 10kΩ CL = 100pF DUT AV = –1 +7.5mV OUTPUT 0 ERROR BAND POST GAIN = 5 INPUT VOLTAGE (2V/DIV) VOLTAGE (1V/DIV) INPUT VSY = 5V RL = 10kΩ CL = 100pF DUT AV = –1 +20mV ERROR BAND POST GAIN = 5 OUTPUT 0 –7.5mV TIME (10µs/DIV) TIME (10µs/DIV) Figure 49. Negative Settling Time to 0.1% Figure 52. Negative Settling Time to 0.1% 100 10 10 1 100 1k 10k FREQUENCY (Hz) VSY = 5V AV = 100 VCM = VSY/2 10 1 1 1k 10k Figure 53. Voltage Noise Density vs. Frequency 10 10 1 1 10 100 1k 10k FREQUENCY (Hz) 100k Figure 51. Current Noise Density vs. Frequency VSY = 5V AV = 100 VCM = VSY/2 1 0.1 1 10 100 1k 10k FREQUENCY (Hz) Figure 54. Current Noise Density vs. Frequency Rev. C | Page 17 of 24 100k 09437-153 CURRENT NOISE DENSITY (pA/√Hz) VSY = 2.5V AV = 100 VCM = VSY/2 09437-150 CURRENT NOISE DENSITY (pA/√Hz) 100 FREQUENCY (Hz) Figure 50. Voltage Noise Density vs. Frequency 0.1 10 09437-049 VOLTAGE NOISE DENSITY (nV/√Hz) VSY = 2.5V AV = 100 VCM = VSY/2 09437-046 VOLTAGE NOISE DENSITY (nV/√Hz) 100 1 09437-048 09437-045 –20mV ADA4528-1/ADA4528-2 Data Sheet VSY = 5V AV = 100 VCM = VSY/2 TIME (1s/DIV) TIME (1s/DIV) Figure 58. 0.1 Hz to 10 Hz Noise 10 1 1 0.1 0.001 0.001 0.1 VSY = 5V AV = 1 f = 1kHz RL = 10kΩ 0.01 VSY = 2.5V AV = 1 f = 1kHz RL = 10kΩ 0.01 0.1 1 10 AMPLITUDE (V p-p) 0.001 0.001 0.01 0.1 1 10 AMPLITUDE (V p-p) Figure 56. THD + N vs. Amplitude 09437-155 THD + N (%) 10 09437-152 Figure 59. THD + N vs. Amplitude 1 1 VSY = 2.5V AV = 1 RL = 10kΩ 80kHz LOW-PASS FILTER VIN = 2V p-p VSY = 5V AV = 1 RL = 10kΩ 80kHz LOW-PASS FILTER VIN = 2V p-p THD + N (%) 0.1 THD + N (%) 0.1 0.001 10 0.01 100 1k 10k FREQUENCY (Hz) 100k 09437-056 0.01 Figure 57. THD + N vs. Frequency 0.001 10 100 1k 10k FREQUENCY (Hz) Figure 60. THD + N vs. Frequency Rev. C | Page 18 of 24 100k 09437-057 THD + N (%) Figure 55. 0.1 Hz to 10 Hz Noise 0.01 09437-053 09437-050 INPUT VOLTAGE (20nV/DIV) INPUT VOLTAGE (20nV/DIV) VSY = 2.5V AV = 100 VCM = VSY/2 Data Sheet ADA4528-1/ADA4528-2 APPLICATIONS INFORMATION The ADA4528-1/ADA4528-2 feature rail-to-rail input and output with a supply voltage from 2.2 V to 5.5 V. Figure 61 shows the input and output waveforms of the ADA4528-1/ADA4528-2 configured as a unity-gain buffer with a supply voltage of ±2.5 V and a resistive load of 10 kΩ. With an input voltage of ±2.5 V, the ADA4528-1/ADA4528-2 allow the output to swing very close to both rails. Additionally, the parts do not exhibit phase reversal. 3 1 For more information about the chopper architecture of the ADA4528-1/ADA4528-2, see the AN-1114 Application Note, Lowest Noise Zero-Drift Amplifier Has 5.6 nV/√Hz Voltage Noise Density. 0 –1 INPUT PROTECTION –2 The ADA4528-1/ADA4528-2 have internal ESD protection diodes that are connected between the inputs and each supply rail. These diodes protect the input transistors in the event of electrostatic discharge and are reverse biased during normal operation. This protection scheme allows voltages as high as approximately 300 mV beyond the rails to be applied at the input of either terminal without causing permanent damage (see Table 4 in the Absolute Maximum Ratings section). When either input exceeds one of the supply rails by more than 300 mV, the ESD diodes become forward biased and large amounts of current begin to flow through them. Without current limiting, this excessive fault current causes permanent damage to the device. If the inputs will be subjected to overvoltage conditions, insert a resistor in series with each input to limit the input current to 10 mA maximum. However, consider the resistor thermal noise effect on the entire circuit. For example, at a 5 V supply voltage, the broadband voltage noise of the ADA4528-1/ADA4528-2 is approximately 6 nV/√Hz (at unity gain). A 1 kΩ resistor has thermal noise of 4 nV/√Hz. Adding a 1 kΩ resistor at the noninverting input pin increases the total noise by 30% root sum square (rss). VIN VOUT 2 VSY = ±2.5V AV = 1 RL = 10kΩ –3 TIME (200µs/DIV) 09437-059 Offset voltage errors due to common-mode voltage swings and power supply variations are also corrected by the chopping technique, resulting in a typical CMRR figure of 158 dB and a PSRR figure of 150 dB at 2.5 V supply voltage. The ADA4528-1/ ADA4528-2 have low broadband noise of 5.6 nV/√Hz (at f = 1 kHz, AV = +100, and VSY = 2.5 V) with no 1/f noise component. These features are ideal for amplification of low level signals in dc or subhertz high precision applications. RAIL-TO-RAIL INPUT AND OUTPUT VOLTAGE (V) The ADA4528-1/ADA4528-2 are precision, ultralow noise, zero-drift operational amplifiers that feature a patented chopping technique. This chopping technique offers ultralow input offset voltage of 0.3 µV typical and input offset voltage drift of 0.002 µV/°C typical. Figure 61. Rail-to-Rail Input and Output NOISE CONSIDERATIONS For more information about the noise characteristics of the ADA4528-1/ADA4528-2, see the AN-1114 Application Note, Lowest Noise Zero-Drift Amplifier Has 5.6 nV/√Hz Voltage Noise Density. 1/f Noise 1/f noise, also known as pink noise or flicker noise, is inherent in semiconductor devices and increases as frequency decreases. At low frequency, 1/f noise is a major noise contributor and causes a significant output voltage offset when amplified by the noise gain of the circuit. However, the ADA4528-1/ADA4528-2 eliminate the 1/f noise internally, thus making these parts an excellent choice for dc or subhertz high precision applications. The 0.1 Hz to 10 Hz amplifier voltage noise is only 97 nV p-p (AV = +100) at a supply voltage of 2.5 V. The low frequency 1/f noise, which appears as a slow varying offset to the ADA4528-1/ADA4528-2, is greatly reduced by the chopping technique. This reduction in 1/f noise allows the ADA4528-1/ADA4528-2 to have much lower noise at dc and low frequency compared to standard low noise amplifiers that are susceptible to 1/f noise. Figure 50 and Figure 53 show the voltage noise density of the amplifier with no 1/f noise. Rev. C | Page 19 of 24 ADA4528-1/ADA4528-2 Data Sheet Source Resistance Voltage Noise Density with Different Gain Configurations With 5.6 nV/√Hz of broadband noise at 1 kHz (VSY = 2.5 V and AV = +100), the ADA4528-1/ADA4528-2 are among the lowest noise zero-drift amplifiers currently available in the industry. Therefore, it is important to carefully select the input source resistance to maintain a total low noise. Figure 62 shows the voltage noise density vs. closed-loop gain of a zero-drift amplifier from a leading competitor. The voltage noise density of the amplifier increases from 11 nV/√Hz to 21 nV/√Hz as the closed-loop gain decreases from 1000 to 1. 24 These uncorrelated noise sources can be summed up in a root sum squared (rss) manner using the following equation: en total = [en2 + 4 kTRS + (in × RS)2]1/2 where: en is the input voltage noise of the amplifier (V/√Hz). k is the Boltzmann’s constant (1.38 × 10−23 J/K). T is the temperature in Kelvin (K). RS is the total input source resistance (Ω). in is the input current noise of the amplifier (A/√Hz). VSY = 5V f = 100Hz COMPETITOR A 20 16 12 8 4 09437-061 VOLTAGE NOISE DENSITY (nV/√Hz) The total input referred broadband noise (en total) from any amplifier is primarily a function of three types of noise: input voltage noise, input current noise, and thermal (Johnson) noise from the external resistors. 0 1 10 100 1000 CLOSED-LOOP GAIN (V/V) Figure 62. Competitor A: Voltage Noise Density vs. Closed-Loop Gain Figure 63 shows the voltage noise density vs. frequency of the ADA4528-1/ADA4528-2 for three different gain configurations. The ADA4528-1/ADA4528-2 offer a constant input voltage noise density of 6 nV/√Hz to 7 nV/√Hz, regardless of the gain configuration. where BW is the bandwidth in hertz. This analysis is valid for broadband noise calculation. If the bandwidth of concern includes the chopping frequency, more complicated calculations must be made to include the effect of the noise energy spectrum at the chopping frequency (see the Residual Voltage Ripple section). With a low source resistance of RS < 1 kΩ, the voltage noise of the amplifier dominates. As source resistance increases, the thermal noise of RS dominates. As the source resistance increases further, where RS > 100 kΩ, the current noise becomes the main contributor to the total input noise. A good selection table for low noise op amps can be found in the AN-940 Application Note, Low Noise Amplifier Selection Guide for Optimal Noise Performance. 100 VSY = 5V VCM = VSY/2 10 AV = 1 AV = 10 AV = 100 1 1 10 100 1k 10k FREQUENCY (Hz) Figure 63. Voltage Noise Density vs. Frequency with Different Gain Configurations Rev. C | Page 20 of 24 09437-062 en,rms = en total × √BW VOLTAGE NOISE DENSITY (nV/√Hz) The total equivalent rms noise over a specific bandwidth is expressed as Data Sheet ADA4528-1/ADA4528-2 Residual Voltage Ripple 1.8 Although autocorrection feedback (ACFB) suppresses the chopping related voltage ripple, higher noise spectrum exists at the chopping frequency and its harmonics due to the remaining ripple. Figure 64 shows the voltage noise density of the ADA4528-1/ ADA4528-2 configured in unity gain. A noise energy spectrum of 50 nV/√Hz can be seen at the chopping frequency of 200 kHz. This noise energy spectrum is significant when the op amp has a closed-loop frequency that is higher than the chopping frequency. 1.6 ISY PER AMPLIFIER (mA) 1.4 1.0 0.8 0.6 0.4 VSY = 5V AV = 1 VCM = VSY/2 ISY– ISY+ 0.2 0 0 1 2 3 4 5 VSY (V) 09437-066 100 Figure 66. Supply Current vs. Supply Voltage (Voltage Follower) 10 Figure 67 and Figure 68 show the ADA4528-1 configured as comparators, with 1kΩ resistors in series with the input pins. Figure 69 shows the supply currents for both configurations. Supply currents do not change significantly, where ISY+ = ISY− = 1.5 mA per amplifier at 5 V of supplies. +VSY 10 100 1k 10k 100k 1M FREQUENCY (Hz) 10M Figure 64. Voltage Noise Density vs. Frequency To further suppress the noise at the chopping frequency, it is recommended that a post filter be placed at the output of the amplifier. For more information about residual voltage ripple, see the AN-1114 Application Note, Lowest Noise Zero-Drift Amplifier Has 5.6 nV/√Hz Voltage Noise Density. ISY+ A1 1kΩ ADA4528-1 VOUT 1/2 1kΩ COMPARATOR OPERATION Figure 65 shows the ADA4528-1 configured as a voltage follower with an input voltage that is always kept at midpoint of the power supplies. A1 and A2 indicate the placement of ammeters to measure supply current. As shown in Figure 66, in normal operating condition, ISY+ = ISY− = 1.5 mA per amplifier with 5 V of supplies. ISY– A2 –VSY Figure 67. Comparator A +VSY +VSY A1 A1 ISY+ ISY+ 1kΩ ADA4528-1 VOUT 1/2 ADA4528-1 VOUT 1/2 1kΩ A2 1kΩ ISY– –VSY A2 ISY– –VSY Figure 68. Comparator B 09437-065 1kΩ Figure 65. Voltage Follower Rev. C | Page 21 of 24 09437-068 1 09437-067 1 09437-063 VOLTAGE NOISE DENSITY (nV/√Hz) 1.2 ADA4528-1/ADA4528-2 Data Sheet junction. The most common metallic junctions on a circuit board are solder-to-board trace and solder-to-component lead. 1.8 1.6 Figure 70 shows a cross section of a surface-mount component soldered to a PCB. A variation in temperature across the board (where TA1 ≠ TA2) causes a mismatch in the Seebeck voltages at the solder joints, thereby resulting in thermal voltage errors that degrade the ultralow offset voltage performance of the ADA4528-1/ADA4528-2. 1.2 1.0 0.8 0.6 COMPONENT LEAD 0.4 ISY– ISY+ VSC1 + 0 0 1 2 3 4 5 VSY (V) 09437-069 0.2 SURFACE-MOUNT COMPONENT VSC2 SOLDER + VTS2 PC BOARD Figure 69. Supply Current vs. Supply Voltage (Comparator A and Comparator B) TA1 COPPER TRACE For more details on op amps as comparators, refer to the AN-849 Application Note, Using Op Amps as Comparators. + VTS1 + TA2 IF TA1 ≠ TA2, THEN VTS1 + VSC1 ≠ VTS2 + VSC2 09437-154 ISY PER AMPLIFIER (mA) 1.4 Figure 70. Mismatch in Seebeck Voltages Causes Seebeck Voltage Error PRINTED CIRCUIT BOARD LAYOUT The ADA4528-1/ADA4528-2 are high precision devices with ultralow offset voltage and noise. Therefore, care must be taken in the design of the printed circuit board (PCB) layout to achieve the optimum performance of the ADA4528-1/ADA4528-2 at board level. To avoid leakage currents, keep the surface of the board clean and free of moisture. Coating the board surface creates a barrier to moisture accumulation and reduces parasitic resistance on the board. To minimize power supply disturbances caused by output current variation, properly bypass the power supplies and keep the supply traces short. Connect bypass capacitors as close as possible to the device supply pins. Stray capacitances are a concern at the outputs and the inputs of the amplifier. It is recommended that signal traces be kept at a distance of at least 5 mm from supply lines to minimize coupling. To minimize these thermocouple effects, orient resistors so that heat sources warm both ends equally. Where possible, the input signal paths should contain matching numbers and types of components to match the number and type of thermocouple junctions. For example, dummy components, such as zero value resistors, can be used to match the thermoelectric error source (real resistors in the opposite input path). Place matching components in close proximity and orient them in the same manner to ensure equal Seebeck voltages, thus canceling thermal errors. Additionally, use leads of equal length to keep thermal conduction in equilibrium. Keep heat sources on the PCB as far away from the amplifier input circuitry as practical. It is highly recommended that a ground plane be used. A ground plane helps to distribute heat throughout the board, maintains a constant temperature across the board, and reduces EMI noise pickup. A potential source of offset error is the Seebeck voltage on the circuit board. The Seebeck voltage occurs at the junction of two dissimilar metals and is a function of the temperature of the Rev. C | Page 22 of 24 Data Sheet ADA4528-1/ADA4528-2 OUTLINE DIMENSIONS 3.20 3.00 2.80 8 3.20 3.00 2.80 1 5.15 4.90 4.65 5 4 PIN 1 IDENTIFIER 0.65 BSC 0.95 0.85 0.75 15° MAX 1.10 MAX 0.40 0.25 0.80 0.55 0.40 0.23 0.09 6° 0° 10-07-2009-B 0.15 0.05 COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 71. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters 3.10 3.00 SQ 2.90 0.50 BSC 8 5 1.70 1.60 SQ 1.50 EXPOSED PAD 0.50 0.40 0.30 0.80 0.75 0.70 SEATING PLANE 0.30 0.25 0.20 1 4 BOTTOM VIEW TOP VIEW 0.05 MAX 0.02 NOM COPLANARITY 0.08 0.203 REF PIN 1 INDICATOR (R 0.15) FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. COMPLIANT TO JEDEC STANDARDS MO-229-WEED 07-06-2011-A PIN 1 INDEX AREA Figure 72. 8-Lead Lead Frame Chip Scale Package [LFCSP_WD] 3 mm × 3 mm Body, Very Very Thin, Dual Lead (CP-8-12) Dimensions shown in millimeters ORDERING GUIDE Model 1 ADA4528-1ARMZ ADA4528-1ARMZ-R7 ADA4528-1ARMZ-RL ADA4528-1ACPZ-R7 ADA4528-1ACPZ-RL ADA4528-2ARMZ ADA4528-2ARMZ-R7 ADA4528-2ARMZ-RL 1 Temperature Range −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C Package Description 8-Lead Mini Small Outline Package [MSOP] 8-Lead Mini Small Outline Package [MSOP] 8-Lead Mini Small Outline Package [MSOP] 8-Lead Lead Frame Chip Scale Package [LFCSP_WD] 8-Lead Lead Frame Chip Scale Package [LFCSP_WD] 8-Lead Mini Small Outline Package [MSOP] 8-Lead Mini Small Outline Package [MSOP] 8-Lead Mini Small Outline Package [MSOP] Z = RoHS Compliant Part. Rev. C | Page 23 of 24 Package Option RM-8 RM-8 RM-8 CP-8-12 CP-8-12 RM-8 RM-8 RM-8 Branding A2R A2R A2R A2R A2R A32 A32 A32 ADA4528-1/ADA4528-2 Data Sheet NOTES ©2011–2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D09437-0-9/12(C) Rev. C | Page 24 of 24