Massachusetts Institute of Technology
Department of Electrical Engineering and Computer Science
6.002 – Electronic Circuits
Fall 2002
Homework #5 Solutions
Problem 5.1 Answer:
(A) In the saturation regime, the equation for the drain current, i
D is i
D
=
K
( v
GS
−
V
T
2
)
2
Looking at the MOSFET charecteristics, we see that for v
GS
= 6V, the i
DS vs v
DS curve passes through the point i
D
= 8mA and v
DS
= 4V. This occurs along the parabola that seperates the triode region from the saturation region, so we additionally know that v
DS
= v
GS
−
V
T
.
Substitute numbers into the above equations to find v
DS
= v
GS
−
V
T
4V = 6V
−
V
T
V
T
= 2V and i
D
=
K
( v
GS
−
V
T
8mA =
2
K
K = 1
2
(4V)
2 mA
V
2
)
2
(B) (a) For this circuit, v
DS
= v
O
= V
S
−
R i
DS
=
V
R
S
1
. The slope of this line is
−
1
1
R 1 i
DS
. When i
DS
= 0, v
DS
= V
S
. When v
DS
= 0,
. It is plotted on the figure below.
i
DS
(mA)
14 v
GS
=7V
12
V
S
/R
1
10
8
-1/R
1
6 v
GS
=6V v
GS
=5V
4
2
0
0 2 4 6 v
DS
(V)
8 10
V
S
12 v
GS
=4V
14 v
GS
=3V

(b) For this circuit, v
DS
= V
S
− v i
DS
=
V
R
S
2
O
= V
S
−
R
. The slope of this line is
− 1
R 2
2 i
DS
. When i
DS
= 0, v
DS
= V
S
. When
. It is plotted on the figure below.
v
DS
= 0, i
DS
(mA)
14 v
GS
=7V
12
V
S
/R
2
10
8
-1/R
2
6 v
GS
=6V v
GS
=5V
4
2
0
0 2 4 6 v
DS
(V)
8 10
V
S
12 v
GS
=4V
14 v
GS
=3V
(c) For this circuit, v
DS
= V
S
−
( R i
DS
=
V S
R 1
+
R 2
1 + R 2 ) i
DS
. When i
DS
= 0, v
DS
= V
S
. When v
DS
= 0,
. Thes slope of this line is
− 1
R 1
+
R 2
. It is plotted on the figure below.
i
DS
(mA)
14 v
GS
=7V
12
V
S
/(R
1
+R
2
)
10
8
-1/(R
1
+R
2
)
6 v
GS
=6V v
GS
=5V
4
2
0
0 2 4 6 v
DS
(V)
8 10
V
S
12 v
GS
=4V
14 v
GS
=3V
(C) If the amplifier is operating in its saturation regime, we know that i
DS
=
K and V
T are the parameters we found in Part (A).
K
2
( v
GS
−
V
T
)
2
, where
(a) For this amplifier, v
GS
= v
I
. The output voltage is v
O
= V
S
− i
DS
R 1 . We can write v
O
= V
S
−
KR 1
2
( v
I
−
V
T
)
2
(b) This amplifier is more complicated to analyze. The output voltage is only v
O
= R 2 i
DS
.
The gate-source voltage is no longer v
I
, it is v
GS
= v
I
− v
O
. We can write v
O
=
KR 2
2
( v
I
−
V
T
− v
O
)
2

For simplicity, let v
X
= v
I
−
V
T
. Expand the quadratic above to get
KR 2
2 v
2
O
−
( KR 2 v
X
+ 1) v
O
+
KR 2
2 v
2
X
= 0
Use the quadratic equation to solve for v
O and find: v
O
=
KR 2 v
X
+ 1
±
( KR 2 v
X
+ 1)
2
KR 2
−
( KR 2 v
X
)
2
Substitute v
I
−
V
T back in for v
X and simplify: v
O
= v
I
−
V
T
1
+
KR 2
± v
I
−
V
T
1
+
KR 2
2
−
( v
I
−
V
T
)
2
This gives us two possible answers for v
O
, but which one is correct? We know that v
GS
> V
T
. We also knowthat v
GS
= v
I
− v
O
, consequently v
I
−
V
T
> v
O
. Given the expression for v
O above, this means that v
I
−
V
T
> v
I
−
V
T
1
+
KR 2
± v
I
−
V
T
1
+
KR 2
2
−
( v
I
−
V
T
)
2 or
0 >
1
KR 2
± v
I
−
V
T
1
+
KR 2
2
−
( v
I
−
V
T
)
2
Clearly, the
± should be a minus sign for our expression for v
O answer is then to make sense. The final v
O
= v
I
−
V
T
1
+
KR 2
− v
I
−
V
T
1
+
KR 2
2
−
( v
I
−
V
T
)
2
(c) The analysis of this amplifier is similiar. We can see that v
O
= V
S
−
R 1 that v
GS
= v
I
−
R 2 i
DS i
DS
. Also note
. We can’t just substitute into the equation for the drain current and solve, though, because v
GS above is written in terms of the drain current. Realize, though, that the voltage across R 2 does not depend on R 1 as long as the MOSFET is in the saturation region. From the voltage across R 2 we can find i
DS
, which gives v
O from the equation above. We knowthe voltage across R 2 from circuit (b) above. It is v
R 2
= v
I
−
V
T
1
+
KR 2
− v
I
−
V
T
1
+
KR 2
2
−
( v
I
−
V
T
)
2
Using this, v
O for this circuit is v
O
= V
S
−
R 1 v
O
= V
S
−
R 1 i
DS v
R 2
R 2 v
O
= V
S
−
R 1
R 2
 v
I
−
V
T
1
+
KR 2
− v
I
−
V
T
1
+
KR 2
2
−
( v
I

−
V
T
)
2 

(D) For each amplifier find dv o dv i by differentiating the expressions found for v
O in Part (C). Simplify this with the assumption that v
I
−
V
T
>>
1
2
KR 2
. F
(b) First, differentiate the expression for v
O in terms of v
I from Part (C) above for circuit (b) dv
O dv
I
= d dv
I

 v
I
−
V

T
+
1
KR 2
− v
I
−
V
T

+
1
KR 2
2
−
( v
I
−
V
T
)
2


= 1
− d

2( v
I
−
V
T
) 1
2
 dv
I
KR 2
+
KR 2
2
−
.
5
= 1
−
1
KR 2
2( v
I
−
V
T
)
+
1
KR 2
= 1
−
(2 KR 2 ( v
I
−
V
T
) + 1)
−
.
5
KR 2
If we assume that v
I
−
V
T simplifies to
>>
1
2
KR 2
, then 2 KR 2 ( v
I
−
V
T
) >> 1 and the expression above dv
O dv
I
= 1
(c) Recall that the drain current of this circuit, i
DS is equal to the output voltage of circuit
(b) divided by the resistanct R 2 . We can write the following, where v
O,b is the expression for the output voltage of circuit (b) dv
O dv
I
= d dv
I
=
−
R 1
R 2
V
S
−
R 1
R 2 v
O,b dv
O,b dv
I
We found dv O,b dv I above, it is just 1. So for circuit (c) the small signal gain dv O dv I is dv
O dv
I
=
−
R 1
R 2
(E) For all of the amplifiers, when v
I
< V
T the MOSFETS are all in the cutoff region, and the drain currents are zero. So, the lower bound on v
I is V
T
. That is, the MOSFETS are in saturation for v
I
> V
T
. The upper bound for each circuit depends on keeping v
GS
< v
DS
+ V
T
.
(a) For this amplifer, v
DS
= v
O and v
GS
= v
I
. Using our results from Part (C) for v
O
, the
MOSFET leaves the saturation regime when v
I
−
V
T
= V
S
−
KR 1
( v
I
−
V
T
2
)
2
Solve this quadratic (using the quadratic formula) to find that v
I
= V
T
+
−
1 +
√
1 + 2 KR 1 V
S
KR 1

So the MOSFET operates in the saturation region for
V
T
< v
I
< V
T
+
−
1 +
√
1 + 2 KR 1 V
S
KR 1 and
1 +
√
−
1 + 2 KR 1 V
S
KR 1
< v
O
< V
S
(b) For this circuit, v
DS
= V
S
− v
O and v
GS
= v
I
− v
O
. The MOSFET is in saturation for v
I
− v
O
< V
T
+ V
S
− v
O or v i
< V
T
+ V
S
So the MOSFET is in saturation for
V
T
< v
I
< V
T
+ V
S and
0 < v
O
< V
S
+
1
KR 2
−
1
V
S
+
KR 2
2
−
V
2
S
(c) Realize that at the saturation region’s boundary that v
GS
−
V
T i
D will be equal to
V S
R 1
− v
+
DS
R 2
. This gives
= v
DS
. We also knowthat
K
2 v
2
DS
=
V
S
− v
DS
R 1 + R 2
Use the quadratic equation to find this value of v
DS
, and call it v
∗
DS
.
v
∗
DS
=
−
1
K ( R 1 + R 2 )
+
K ( R 1
1
+ R 2 )
2
+
2 V
S
K ( R 1 + R 2 )
Given this, the output voltage at the saturation-triode boundary is v v v
O
O
O
=
=
= v v
∗
DS
∗
DS
R
+ R 2 i
DS
+ R 2
V
S
− v
DS
R 1 + R 2
1
R 1 + R 2 v
∗
DS

+
R 2
R 1 + R 2
V
S v
O
=
R 1
R 1 + R 2
 −
1
K ( R 1 + R 2 )
+
K ( R 1
1
+ R 2 )
2
+

2 V
S
K ( R 1 + R 2 )

+
R 2
R 1 + R 2
V
S
What about v
I at the boundary? Since v
GS
−
V
T
= v
DS at the boundary: v
∗
I
− v
∗
R 2
−
V
T
= v
∗
DS

so v
∗
I v
∗
I
= v
∗
O
+ V
T
= V
T
+
R 1
R 1 + R 2

 −
1
K ( R 1 + R 2 )
+
1
K ( R 1 + R 2 )
2
+

2 V
S
K ( R 1 + R 2 )

+
R 2
R 1 + R 2
V
S
Problem 5.2 Answer:
(A) Assume that v
DS of M3 is sufficient to keep it operating in the saturation region. The gatesource voltage of M3 is the voltage drop across the resistor R , w hich is
R
R
+8kΩ
20V. The current i
C is then i
C
=
1mA
2
/ V
2
20 R
R + 8kΩ
−
V
T
2
We can solve this for R :
2
2mA =
1mA
2
/ V
2
4V
2
=
20 R
R + 8kΩ
4 = 20
R
R + 8kΩ
8kΩ = 4 R
20 R
R + 8kΩ
2
−
2V
−
V
T
2kΩ = R
We will validate the assumption that M3 operates in saturation for v
I
= 0 in Part (B) below.
(B) With v
I
= 0, both M1 and M2 will have identical v
GS voltages. The currents through the two transistors will be idential (as long as they are both in the saturation region – we will prove this below). The sum of i
A and i
B is i
C
= 2mA, so i
A
= i
B
= 1mA. The gate-source voltage of M1 and M2 is equal to
− e
X
. We can solve the drain current equation for v
GS for M1 and find e
X
:
1mA =
2mA
1 =
− e
X
/V
2
2
−
2V
(
− e
X
−
3V = e
X
−
V
T
)
2
Note that the e
X
=
−
1 also satisfies the above quadratic, but it would mean that v
GS for both MOSFETs, putting them in the cutoff region.
< V
T
Let’s confirm that both M2 and M3 are operating, then, in their saturation regimes. For M3, v
DS
=
−
3 + 10 = 7V, which is greater than v
GS
−
V
T
= 2V, so it is operating in the saturation regime. For M2, v
O
= 10
−
5kΩ
∗
1mA = 5V. Then v
DS
= 5
− −
3 = 8V which is greater than v
GS
−
V
T
= 1V.
(C) We knowthat the sum of the currents i
A and i
B must be 2mA. We can write
K
2
( v
GS 1
−
V
T
)
2
+
K
2
( v
GS 2
−
V
T
)
2
= 2 mA

where v
GS
1 = v
I
− e
X and v
GS
2 =
− e
X
. Take the Taylor-series expasion of this to arrive at
K
2
( V
GS
1
−
V
T
)
2
+ K ( V
GS
1
−
V
T
) v gs
1 +
K
2
( V
GS
2
−
V
T
)
2
+ K ( V
GS
2
−
V
T
) v gs
2 = 2 mA
Now, subtract the first equation evaluated at the operating point determined by V
GS
1 and
V
GS
2 to get
K ( V
GS
1
−
V
T
) v gs
1 + K ( V
GS
2
−
V
T
) v gs
2 = 0
We knowthat V
GS
1 = V
I
−
E and v gs
2 =
− e x
X
=
−
E
X and that V
GS
2 =
−
E
. Substitute these into the above equation:
X
. We also knowthat v gs
1 = v i
− e x
K (
−
E
X
−
V
T
)( v i
− e x
) + K (
−
E
X
−
V
T
)(
− e x
) = 0
Solving this for e x yields e x
= v i
2
The output voltage v
O is v
O
= V
S
−
K
∗
5kΩ
2
(
− e
X
−
V
T
)
2
Take the Taylor-series expansion of this and subtract out the operating point to get v o
=
−
K
∗
5kΩ(
−
E
X
−
V
T
)(
− e x
)
Substitute values into this equation and take the derivative with respect to v i to find the small signal gain: dv o dv i
= d dv i d
= dv i
= d dv i
= 5
[
−
K
∗
5kΩ(
−
E
−
2
−
10 mA
V
2
− v
2 i
X
−
V
T
)(
− e x
∗
5kΩ(3
−
2)
− v i
2
)]
(D) When M2 enters the cutoff region, its v
GS voltage will be equal to V
T
. This means that e
X
=
−
V
T
. All of the current i
C will have to flow through M1 (because M2 is cutoff). Recall that M1’s v
GS
= v
I
− e
X
= v
I
+ V
T
. So, solve M1’s drain current equation for v
I
:
2mA / V
2
2mA =
√
2V = v
I
2
( v
GS
−
V
T
)
2
When v
I
= 1V MOSFET M2 will enter the cutoff region, and our model for the circuit is no longer valid.

Problem 5.3 Answer:
(A) MOSFET M1’s gate and drain terminals are tied together. This means that v
GS
= v
DS for
M1. This ensures that v
DS
> v
GS
−
V
T
, so M1 is always operating in its saturation region.
We can express its drain current, then, as a function of v
GS as follows: i
S
=
K
2
( v
GS
−
V
T
)
2
Solve this equation for v
GS to find v
GS
= V
T
+
2 i
S
K
From the circuit diagram we can see that v
GS of M1 is equal to v
GS of M2. As long as v
GS
− v
T
< 10V MOSFET M2 will operate in the saturation regime. This means that v
GS
−
V
T
< 10V
2 i
K
S
< 10V i
S
< 50mA
So as long as i
S
< 50mA M2 operates in the saturation region. Substitute the expression for v
GS above to find i
O
.
i i
O
O
=
=
K
2
( v
GS
−
V
T
)
2
K
2
V
T
+
2 i
K
S −
V
T i
O
=
K
2 i
O
= i
S
2 i
S
K
2
This circuit is called a “current mirror” because the output current is always equal to the input current. It is “mirrored” around the circuit by the MOSFETS. A graph of i
O vs.
i
S is shown below.
i
O
50mA
0
50mA i
S

(B) With a 1kΩ load resistor between the drain of M2 and the V
S rail, the v
DS of M2 is given by v
DS
= 10V
− i
O
∗
1kΩ
As long as this value stays greater than v
GS
−
V
T
(where v
GS is determined by i
S and M1)
M2 will operate in its saturation regime, and i
O
= i
S
. Substituting in the values for K and
V
T found from Problem 1 we find v
DS
> v
GS
−
V
T
100
− i
S
∗
2
×
10
10
− i
S
4
+ i
2
S
∗
1kΩ >
∗ ×
10
6
2 i
S
K
> i
S
∗
2
×
10
3
This inequality becomes false when i
S satisfies the polynomial i
2
S
×
10
6 − i
S
(2
×
10
4
+ 2
×
10
3
) + 100 = 0
Solving for i
S gives i
S
= 15 .
583mA or 6 .
417mA
Only the second answer to the quadratic above satisfies the inquality. For any current i
S less than this, the inequality will also be true. So, i
O
= i
S as long as i
S
< 6 .
417mA
A graph of i
O vs.
i
S is shown below.
i
O
6.417mA
0 6.417mA
i
S