UTC 074
LINEAR INTEGRATED CIRCUIT
LOW NOISE J-FET QUAD
OPERATIONAL AMPLIFIERS
DESCRIPTION
The UTC074 is a high speed J-FET input quad
operational amplifiers incorporating well matched,
high voltage J-FET and bipolar transistors in a
monolithic integrated circuit.
The device features high slew rates, low input
bias and offset currents , and low offset voltage
temperature coefficient.
FEATURES
* Wide common-mode and differential voltage range
ORDERING INFORMATION
* Low input bias and offset current
Device
* Low noise en=15nv/√Hz(typ)
Package
* Output short-circuit protection
UTC074
DIP-14-300-2.54
* High input impedance J-FET input stage
UTC074E
SOP-14-225-1.27
* Low harmonic distortion:0.01%(typ)
* Latch up free operation
* Internal frequency compensation
* High slew rate:13V/µs(typ)
BLOCK DIAGRAM
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UTC 074
LINEAR INTEGRATED CIRCUIT
ABSOLUTE MAXIMUM RATINGS (Ta=25°C)
Characteristic
Value
Unit
Vcc
Symbol
±18
V
Input Voltage-note2
Vi
±15
V
Differential Input Voltage –note3
Vi(diff)
±30
V
Power Dissipation
Pd
680
mW
Supply Voltage-note1
Output Short-Circuit Duration- note4
Infinite
Operating Free-air Temperature
Topr
0 to +70
°C
Storage Temperature Range
Tstg
-65 to 150
°C
1. All voltage values,except differential voltage ,are with respect to zero reference level (ground) of the supply
voltages where the zero reference level is the midpoint between Vcc+ and Vcc-.
2. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15
volts,whichiever is less .
3. Differential voltages are the non-inverting input terminal with respect to the inverting input interminal.
4. The output may be shorted to ground or to either supply. Temperature and/or supply voltages must be limited to
ensure that the dissipation rating is not exceeded.
ELECTRICAL CHARACTERISTICS
(Vcc=±15V,Ta=+25°C,unless otherwise specified)
Characteristic
Input Offset Voltage(Rs=50Ω)
Symbol
VIO
Test Condition
Ta=+25°C
Min
Typ.
3
Tmin≤Ta≤Tmax
Input Offset Voltage drift
DVIO
Input Offset Current
IIO
IBIAS
5
Ta=+25°C
30
Power Supply Rejection Ratio
Ta=+25°C
Tmin≤Ta≤Tmax
15
PSRR
Ta=+25°C
70
Tmin≤Ta≤Tmax
70
(Rs=50Ω)
Supply Current,no load,
Icc
per amplifier
Input Common-mode Voltage
25
Ta=+25°C
VI(R)
pA
10
nA
200
pA
nA
200
V/mV
86
dB
1.4
2.5
mV
2.5
Tmin<Ta<Tmax
±11
+15
V
-12
Range
Common-mode rejection Ratio
µF/°C
100
20
GV
(RL=2KΩ,V0=±10V)
mV
10
Ta=+25°C
Tmin≤Ta≤Tmax
Large Single Voltage Gain
Unit
10
13
Tmin≤Ta≤Tmax
Input Bias Current
Max
CMRR
Ta=+25°C
70
Tmin≤Ta≤Tmax
70
86
dB
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UTC 074
Output Shout-Circuit Current
Output Voltage Swing
LINEAR INTEGRATED CIRCUIT
Ios
±Vopp
Ta=+25°C
10
Tmin≤Ta≤Tmax
10
Ta=+25°C RL=2KΩ
RL=10KΩ
40
60
mA
60
10
12
12
13.5
V
Tmin≤Ta≤Tmax
Slew Rate
SR
RL=2KΩ
10
RL=10KΩ
12
Ta=+25°C
8
13
V/µs
0.1
µs
10
%
3
MHZ
1012
Ω
0.01
%
Vin=10V,RL=2KΩ,
CL=100pF, unity again
Rise Time
TR
Ta=+25°C
Vin=20mV,RL=2KΩ,
CL=100pF, unity again
Overshoot
KOV
Ta=+25°C
Vin=20mV,RL=2KΩ,
CL=100pF, unity again
Gain Band Product
GBP
Ta=+25°C
2
Vin=10mV,RL=2KΩ,
CL=100pF, f=100kHZ
Input Resisance
Ri
Total Harmonic Distortion
THD
Ta=+25°C
f=1kHZ ,RL=2KΩ,
CL=100pF, Av=20dB,Vo=2Vpp
Equivalent Input Noise Voltage
EN
Rs=100Ω,f=1KHz
15
nv
Hz
Phase Margin
ΦM
Channel Separation
Vo1/Vo2
Av=100
45
degree
120
dB
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LINEAR INTEGRATED CIRCUIT
TYPICAL APPLICATIONS
AUDIO DISTRIBUTION AMPLIFER
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UTC 074
LINEAR INTEGRATED CIRCUIT
POSITIVE FEEDBACK BANDPASS FILTER
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LINEAR INTEGRATED CIRCUIT
PACKAGE OUTLINE
DIP-14-300-2.54
UNIT: mm
0.25 0.05
2.54
6.35 0.25
±
7.62
±
+-
1.52 0.3
0
15 degree
±
4.36MAX
19.55 0.3
3.00MIN
0.5MIN
±
0.46 0.08
2.40MAX
SOP-14-225-1.27
UNIT: mm
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