EE40 Lec 18
Diode Circuits
Reading: Chap
Reading
Chap. 10 of Hamble
Hambley
Supplement Reading on Diode Circuits
http://www inst eecs berkeley edu/~ee40/fa09/handouts/EE40
http://www.inst.eecs.berkeley.edu/
ee40/fa09/handouts/EE40_MOS_Circuit.pdf
MOS Circuit pdf
EE40 Fall 2009
Slide 1
Prof. Cheung
Diodes Circuits
–Load Line Analysis
y
–Analysis of Diode Circuits by
assumed states
–Diode Logic Circuits
–Wave Shaping Circuits
–Rectifying
Rectifying Circuits
EE40 Fall 2009
Slide 2
Prof. Cheung
SOLVING CIRCUITS WITH NONLINEAR ELEMENTS
Look at circuits with a nonlinear element like this:
IL
INL
+
+
Nonlinear
Linear circuit
VL
VNL
element
A nonlinear element with its own I-V relationship, attached
to a linear circuit with its own I-V relationship.
1.
2.
3.
4.
IL = fL(VL)
INL = gNL(VNL)
INL = -IL
VNL = VL
EE40 Fall 2009
(linear circuit I-V relationship)
(nonlinear element I-V relationship)
Slide 3
Prof. Cheung
SOLVING CIRCUITS WITH NONLINEAR ELEMENTS
The 4 equations can be reduced to 2 equations in INL and VNL
INL = -fL(VNL) - the linear “loadline”
INL = gNL(VNL)
which we can equate and solve for VNL,
or…
graph the two equations and solve for the intersection.
EE40 Fall 2009
Slide 4
Prof. Cheung
EXAMPLE
1 kΩ
2V
+
-
IL
+
INL
VL
V_NL
_
+
1. IL = (VL- 2) / 1000
2.
(
Given : I0 = 10-15 A.
Find VNL
)
VNL / 0.026
−
15
INL = 10
e
−1
3 INL = -IIL
3.
4. VNL = VL
Substitute 1 and 2 in 3
(
10 −15 e
VNL / 0.026
)
− 1 = −[( VNL − 2) / 1000 ]
Solve by iteration, VNL ~ 0.725V
EE40 Fall 2009
Slide 5
Prof. Cheung
Graphical Solution
0.004
linear
nonlinear
0.0035
0.003
Loadline: I= - (V-2)/1000
0.0025
I_NL
0.002
0.0015
0.001
0.0005
Diode I-V
0
0.725V
-0.0005
-0.001
-1
-0.5
0
0.5
1
V_NL
EE40 Fall 2009
Slide 6
Prof. Cheung
Piecewise–linear Model of Nonlinear Devices
-5.5V
intercept
+1.5V
intercept
Segment A : i = v / 400
Segment
g
B : i = ( v − 1.5) / 100
Segment C : i = ( v + 5.5) / 800
EE40 Fall 2009
Slide 7
Prof. Cheung
Ideal Diode Model of PN Diode
Circuit symbol
ID
+
I-V characteristic
ID (A)
VD
–
Switch model
ID
forward bias
reverse bias
+
VD
–
VD (V)
Diode behaves like a switch:
• closed in forward bias mode
• open in reverse bias mode
•used when voltage of interest >> 0.6V
EE40 Fall 2009
Slide 8
Prof. Cheung
Piecewise Linear Model
Circuit symbol
ID
+
I-V characteristic
ID (A)
+
−
VD
–
Switch model
ID
+
forward bias
reverse bias
VDon
VD (V)
VDon
VD
–
For a Si pn diode, VDon ≅ 0.6 V
Diode behaves like a voltage source in series with a switch:
• closed in forward bias mode
• open iin reverse bias
bi mode
d
EE40 Fall 2009
Slide 9
Prof. Cheung
Zener Diode
A Zener diode is designed to operate in the breakdown mode.
reverse (leakage)
(l k
) currentt
breakdown voltage
ID (A)
VBD
forward
current
VD (V)
vs(t) >15V for all t
+
vs(t)
– VBD = 15V
EE40 Fall 2009
t
R
Slide 10
+
vo(t)
integrated
circuit
i it
–
Prof. Cheung
Piecewise-linear Model of a Zener Diode
EE40 Fall 2009
Slide 11
Prof. Cheung
Diode Circuit Analysis by Assumed Diode States
•1) Specify Ideal Diode Model or Piecewise-Linear
Diode Model
ID (A)
ID (A)
forward bias
forward bias
reverse bias
VD (V)
reverse bias
VDon
•2) Each diode can be ON or OFF
•3) Circuit containing n diodes will have 2n states
•4) The combination of states that works for ALL
di d ((consistent
diodes
i t t with
ith KVL andd KCL) will
ill be
b the
th
solution
EE40 Fall 2009
Slide 12
Prof. Cheung
Example Analysis by assumed Diode States
D1=on D2=on
×
1.75mA
0.5mA
D1=off D2=on
+3
+10
D1=off D2=off
0
+10
×
×
+3
D1=on D2=off
+6
+3
√
EE40 Fall 2009
Slide 13
Prof. Cheung
Transfer Function of Diode Circuits
Piecewise-Linear Model with 0.6V voltage drop
EE40 Fall 2009
Slide 14
Prof. Cheung
Diode Logic: AND Gate
• AND gate
Piecewise-Linear Model with 0.6V voltage drop
Vcc
RAND
A
VOUT
C
Inputs A and B vary between 0
Volts (“low”) and Vcc (“high”)
Between what voltage levels
does C vary with VCC=5V
5
B
Output
O
t t voltage
lt
C is
i hi
high
h
only if
both A and B are high
EOC
Slope =1
Shift 0.7V Up
0
0
EE40 Fall 2009
Slide 15
5
VIN
Prof. Cheung
Diode Logic: OR Gate
• OR gate
Piecewise-Linear Model with 0.6V voltage drop
Inputs A and B vary between 0
V lt (“low”)
Volts
(“l ”) and
d Vcc (“high”)
(“hi h”)
Between what voltage levels
does C vary with VCC=5V?
A
B
C
VOUT
ROR
5
EOC
Output voltage C is high if
either (or both) A and B are high
Slope =1
Shift 0.7V Down
0
0
EE40 Fall 2009
Slide 16
0.7V
5
Prof. Cheung
VIN
Diode Logic: Incompatibility and Decay
Signal Decays with each stage (Not regenerative)
AND gate
OR gate
output voltage is high only if
both A and B are high
output voltage is high if
either (or both) A and B are high
Vcc
A
RAND
A
B
EE40 Fall 2009
B
CAND
COR
ROR
0.6V drop
Slide 17
Prof. Cheung
Clipper Circuits
Assume forward diode
has 0 voltage drop
EE40 Fall 2009
Slide 18
Prof. Cheung
Peak Detector Circuit
Assume the ideal (perfect rectifier) model.
Vi(t)
+
+
Vi((t)) −
−
C
+
Vi
VC(t)
−
t
Idea:
The capacitor
charges
h
d
due tto one
way current behavior
of the diode.
EE40 Fall 2009
VC(t)
Slide 19
VC
Prof. Cheung
Peak Detector with Load Resister
EE40 Fall 2009
Slide 20
Prof. Cheung
Level Shift Circuit
VIN
C
-
VC
VIN
+
+
- VC +
t
VOUT
VOUT
1
3
VOUT = VC+ VIN
2
1) Diode =open, VC=0, VOUT = VIN
2) Diode =short, VC= -VIN , VOUT=0
, 3) Diode =open
=open, VC= -V
VIN (min) , VOUT= VIN+VC
EE40 Fall 2009
Slide 21
Prof. Cheung
t
Clamp Circuit (level shifter)
Max of vin(t)=5 sin(ωt)
is shifted by -5V
b the
by
h di
diode-voltage
d
l
source combination
EE40 Fall 2009
Slide 22
Prof. Cheung
Voltage Doubler Circuit
C1
R1
VIN
VOUT
R2
VOUT
-
-
-
C2
+ VC21 -
VIN
+
+
+
+
- VC1 +
-
Peak Detect
Level Shift
See Homework problem
Output is the peak to peak voltage of the input
input.
EE40 Fall 2009
Slide 23
Prof. Cheung
Half Wave Rectifier Equivalent circuit
V >0.6V, diode = short circuit
Æ Vo= VI - 0.6
06
V < 0.6V, diode = open
p circuit
Æ Vo =0
EE40 Fall 2009
Slide 24
Prof. Cheung
Adding a capacitor: what does it do?
+
Vm sin (ωt)
C
R
V0
-
EE40 Fall 2009
Slide 25
Prof. Cheung
Half-Wave Rectifier
Current
charging
up
capacitor
EE40 Fall 2009
Slide 26
Prof. Cheung
Full Wave Rectifier
EE40 Fall 2009
Slide 27
Prof. Cheung
Small –Signal Linear Equivalent Circuit
Suppose the nonlinear device has the functional
dependence I = i(v) is biased with a DC voltage vG at the Qpoint (quiescent point)
point). A small differential voltage ∆v is
added on top of vG. Using Taylor series expansion
di
i( v Q + ∆v ) = i( v Q ) +
dv
• ∆v + .........
vQ
We can define a dynamic resistance r at the Q point
i
1
r≡
di
dv v Q
∆i
∆v
∆i ≅
r
EE40 Fall 2009
Tangent line
∆v
vG
Slide 28
Prof. Cheung
v
Small –Signal Model of Diode
∆v
∆i ≅
r
Q2
∆i
Q1
∆i
∆v ∆v
EE40 Fall 2009
Slide 29
Prof. Cheung
Small –Signal Model Example
VC and RC
Determines rd at
Q point of diode
EE40 Fall 2009
Slide 30
Prof. Cheung
Small –Signal Model Example
The large capacitors and DC bias source are effective shorts
for the ac signal in small-signal
small signal circuits
* See Hambley for an application of voltage controlled Attenuator
EE40 Fall 2009
Slide 31
Prof. Cheung