Eleg 3131 Laboratory 2
Operational Amplifiers
I. Objectives
1. Demonstrate ability to design and build a “non-inverting amplifier” to meet a gain
specification.
2. Demonstrate the ability to design and build an “inverting amplifier” to meet a gain
specification.
3. Build and understand the use of a “voltage follower” amplifier
4. Build and understand the use of a “summing” amplifier
5. Design and build a circuit from a functional specification/drawing.
6. Develop and utilize tests to verify a circuit’s compliance with design specifications.
II. Pre-Lab Requirements
1. Introduction to Op-Amps
As you have learned in your Electric Circuits courses, operational amplifiers (op-amps)
are differential amplifiers having very high gain. This gain, which will be denoted by the
5
symbol “A” normally has a value greater than 10 . The value of the gain, “A”, typically
varies significantly among op-amps, and also with operating conditions, but in every case
its value remains high.
The output of an op-amp amplifier is given by the
equation:
Vout = A*(Vin+ - Vin-)
Equation 1
Figure 1. Op-Amp Amplifier
In this equation, Vout is the output voltage of the amplifier, Vin+ is the signal voltage
applied to the “plus” input terminal of the amplifier, and Vin- is the signal voltage applied
to its “minus” input terminal. To a first approximation, an op-amp may be modeled by a
controlled voltage source having a value Vo given by Equation 1. The input terminals to
which Vin+ and Vin- are applied are modeled as open circuits, that is, they draw no
current.
1 of 12
Even though the gain value ‘ A ’ may change, the fact that it is always very high allows us
to use op amps to construct circuits whose properties are controlled only by the passive
circuit elements (resistors, capacitors, or inductors) used to construct them. Thus, using
op-amps, it is relatively simple to design amplifiers having stable and easily controlled
properties.
2. Non-Inverting Op-Amp Amplifier
Consider the circuit of Figure 1. This circuit is known as a “non-inverting amplifier.”
Note that in Figure 1, the power supplies, Vcc and Vee are not shown simplicity. They
are required for the circuit to operate however.
3
4
Vcc
V+
LM324
+
Vi
-
11
2
1
Vo
V-
OUT
Vee
Ri
0
Rf
0
Figure 2. An Op-Amp Non-Inverting Amplifier.
The voltages Vcc and Vee are DC power supplied to the op-amp and must be connected
properly. The positive terminal of Vcc is connected to V+ and the negative terminal of
Vcc is connected to ground. The negative terminal of Vee is connected to V- and the
positive terminal is connected to ground. This power supply configuration is call a BiPolar supply and will be discussed later in the syllabus.
The voltage Vi is applied at the input of this amplifier and the output is taken at Vo . The
voltage gain is defined as:
G = Vo Vi
Equation 2
This voltage gain of this circuit may be derived by applying Kirchoff’s current law at the
“minus,” or “inverting” input of the amplifier, and then using equation (1 .
Summing currents at the inverting input terminal (Vin-), we have:
(V− − Vo )
R f + V − Ri = 0
2 of 12
Equation 3
Noting that Vin+ is equal to Vi , and applying Equation 1, then, Vin- = (Vi -Vout)/A.
Substituting this expression for Vin- into Equation 3 yields:
(Vi − Vo
A − Vo ) R f + (Vi − Vo A) Ri = 0 .
Equation 4
Equation 3 may be solved for the ratio G = Vo Vi (the gain of the non-inverting
amplifier) as:
G = Vo Vi =
1 + R f Ri
1 + R f Ri
1 +
A
Equation 5
It can be seen from Equation 5 that, if the op-amp gain “ A ” is much greater
than 1 + R f Ri , then that term becomes very small, approaches zero and can be
(
)
ignored. The gain Vo Vi for a non-inverting op-amp amplifier is then approximately
equal to:
G ≈1+ (Rf /Ri).
Equation 6
3. Inverting Op-Amp Amplifier
Next, let us consider the circuit shown in Figure 3. This circuit is known as an inverting
amplifier configuration, so-called because the sign of its gain is negative; that is, its
output voltage is equal to the input voltage multiplied by some negative number.
3
+
V+
LM324
4
0
Ri
Vcc
-
11
2
1
Vo
V-
OUT
Vee
Vi
Rf
0
Figure 3. An Op-Amp Inverting Amplifier
Again, by applying Kirchoff’s current law at the inverting input, and using Equation 1, it
can be shown that:
− R f Ri
G = Vo Vi =
Equation 7
1 + R f Ri
1 +
A
3 of 12
(
)
In Equation 7 if the op-amp gain “ A ” is much greater than 1 + R f Ri , then that term
becomes very small, approaches zero and can be ignored. The gain Vo Vi for an
inverting op-amp amplifier is then approximately equal to:
G ≈ -(Rf /Ri)
Equation 8
4. Unity Gain Op-Amp Amplifier (Voltage Follower)
Next let us consider the circuit shown in Figure 4. This circuit is known as a unit gain buffer.
It is known as this because its output is equal to its input. While an amplifier with a gain of
on 1 may seem useless, it actually is very useful due to its large (approximately 1 MΩ) input
impedance.
Figure 4. Unit Gain Buffer
As you will remember from your course work in Electric Circuits, if you have a voltage
divider as shown in Figure 5 with a load placed across R3, the voltage drop across RLoad
(shown in Figure 5 as Vout) will vary in accordance with Kirchhoff’s voltage and current
laws as RLoad is changed. What will happen is, as the load resistance is decreased from a
large value, say 1MΩ, Vout will also decrease. By connecting a unity gain amplifier across
the output of the voltage divider as shown in Figure 6 (this appears the same to the voltage
divider as placing a large resistor across R3) the voltage divider’s output will remain stable
regardless of the load variations at the output (Vout) of the unity gain amplifier.
Figure 5. Voltage Divider
4 of 12
Figure 6. Voltage Divider with Voltage Follower Output
5. Weighted Summer Amplifier
The circuit of Figure 6 is known as a weighted summer amplifier. Its output voltage is the
negative of a weighted sum of the input voltages (negative because it is based on the inverting
amplifier).
Rf
LM324
2
OUT
Ri3
Vi2
-
3
0
0
+
4
0
Vee
11
Ri2
Vos
1
V+
Vi1
V-
Ri1
Vcc
Vi3
0
Figure 7. Three input weighted summing amplifier.
It can be shown that the output of this summing amplifier is given by:
⎛R
Vos = − ⎜⎜ f Vi1
⎝ Ri1
+
Rf
Ri 2
Vi 2
+
⎞
Vi 3 ⎟⎟
Ri 3 ⎠
Rf
(3
A three input summing amplifier is shown, but, in principle, any number of inputs may be used.
th
In that case, the contribution of the k input voltage to the sum is given by R f Rik Vik .
(
5 of 12
)
6. Op-Amp Simulation Exercises
A. Non-Inverting Amplifier
1). Design a non-inverting amplifier using the schematic in Figure 2 as a guide. Design it
to the following specification:
a) Gain = 20
b) Rf = 36KΩ
c) Vcc = 15 Vdc
d) Vee = -15 Vdc
e) Vi = 1 Vpeak-peak Freq: 1000Hz
2). Perform a transient analysis of the circuit you designed. Submit your pre-lab report
with the following:
a) A schematic of your circuit design with all components labeled
b) Show your calculations for determination of the value of Ri.
b) A graphic of the PSpice simulation output that shows 10 cycles of the input
signal and output signal. Use the PSpice cursor function to mark and label the
value of Vin and Vout. Label your graph using the PSpice text label function
with the Pre-lab number, exercise name, date, your section, and your name.
B. Inverting Amplifier
1). Design an inverting amplifier using the schematic in Figure 3 as a guide. Design it to
the following specification:
a) Gain = -13
b) Rf = 13KΩ
c) Vcc = 15 Vdc
d) Vee = -15 Vdc
e) Vi = 2 Vpeak-peak Freq: 750Hz
2). Perform a transient analysis of the circuit you designed. Submit your pre-lab report
with the following:
a) A schematic of your circuit design with all components labeled
b) Show your calculations for determination of the value of Ri.
b) A graphic of the PSpice simulation output that shows 10 cycles of the input
signal and output signal. Use the PSpice cursor function to mark and label the
value of Vin and Vout. Label your graph using the PSpice text label function
with the Pre-lab number, exercise name, date, your section, and your name.
C. Weighted Summing Amplifier
1). Using PSpice, design a weighted summing amplifier using the schematic in Figure 7
as a guide. Use a 6200Ω resistor for Rf. Design it to the following specification:
Parameter
Interface Type
Value
Channel Gain
Vi1
Vi2
Vi3
Vcc
Vee
Sinusoidal Signal Input Sinusoidal Signal Input DC Signal Input DC Power Input DC Power Input
10K Hz
1V
2
200 Hz
8 Vp-p
0.25
6 of 12
1.5 Vdc
6
+15Vdc
-15Vdc
2). Perform a transient analysis of the weighted summer circuit you designed. Submit
your pre-lab report with the following:
a) A schematic of your circuit design with all components labeled
b) Show your calculations for determination of the value of Ri1, Ri2, and Ri3.
b) A graphic of the PSpice simulation output that shows the signal inputs and the
output signal. Use the PSpice cursor function to mark and label the value the
input and output signals. Label your graph using the PSpice text label function
with the Pre-lab number, exercise name, date, your section, and your name.
D. Voltage Follower
1). Using PSpice, evaluate the voltage divider output (Vout) shown in Figure 5 using the
following methodology:
a) Use a DC sweep analysis combined with a parametric sweep of the resistive
load RL. For the parametric sweep, sweep RL from 200Ω to 10KΩ in 100Ω
increments. Perform a DC sweep of V1 from 15Vdc to 15Vdc in 1 V
increments. This will allow you to observe load voltage for the different loads
at the V1 voltage of 15Vdc.
2). Using PSpice, evaluate the voltage divider with an Op-Amp voltage follower placed
across the voltage divider out put as shown in Figure 6. In this circuit the load (RL) is
now across the output of the voltage follower with the input to the voltage follower
placed across the output of the voltage divider. Evaluate Vout using the same
methodology as in the step above.
3). For your pre-lab report, submit the following:
a) A schematic of your voltage divider with the voltage follower output stage
from part D2 above.
b) A single graph displaying the simulation results from voltage divider (D1
above) and the simulation results from the voltage divider with voltage
follower (D2 above).
c) A short comment as to what the graph in 3b shows.
E. Design Problem
1) Review Lab requirement II 1 D, Design Problem – Weighted Summer and have your
design developed in accordance with Figure 10, simulated in PSpice, and ready for
assembly and verification testing during the lab.
7 of 12
II. Lab Requirements
1. Required Parts and Equipment
A.
B.
C.
D.
E.
F.
2 DC power supply.
Fluke hand-held DMM
Oscilloscope
One Proto-Board (PB-103)
One LN-324 Op-Amp
Resistors of the following values:
#
4
1
1
Value
510 Ω
1 KΩ
2 KΩ
#
1
1
1
Value
9.1KΩ
13KΩ
36KΩ
G. Wires and leads for circuit connections.
2. Required Information
None
3. Laboratory Procedure
A. Non-Inverting Amplifier.
1. Build the non-inverting op-amp amplifier that you designed in the pre-lab section
6A. Measure and record the actual resistor values. Power the circuit with your 2
power supplies connected in the bi-polar configuration. Use the signal generator
to provide Vi with the following parameters:
a) Vi = 1 Vpeak-peak
b) Vi frequency = 1000 Hz
c) Offset = 0
2. Place Vi on channel 1 of the oscilloscope and Vo on channel 2.
3. From your scope traces, measure the input and output to your amplifier. Capture
the scope picture for your report.
B. Inverting Amplifier.
1. Build the inverting op-amp amplifier that you designed in the pre-lab section 6B.
Measure and record the actual resistor values. Power the circuit with your 2 power
supplies connected in the bi-polar configuration. Use the signal generator to
provide Vi with the following parameters:
a) Vi = 2 Vpeak-peak
b) Vi frequency = 750Hz
c) Offset = 0
2. Place Vi on channel 1 of the oscilloscope and Vo on channel 2.
3. From your scope traces, measure the input and output to your amplifier. Capture
the scope picture for your report.
8 of 12
C. Unity Gain OpAmp Buffer Amplifier (Voltage Follower).
1. Build the voltage divider shown in Figure 8. Measure and record the actual
resistor values. Measure and record Vout in row 1 of Table 1.
Figure 8. Voltage Divider Circuit
2. Measure and record the actual values for the load resistors shown in Table 1.
Place each of the 4 load resistors across the output of the voltage divider (in
parallel with R3) then measure and record Vout associated with each resistive test
load.
Resistor RL
RL
Value Measured
(Ω)
Value (Ω)
Voltage
Divider Vout
(V)
Voltage Follower
Vout (V)
No load resistor across Vout
1
510
2
1000
3
2000
4
9100
Table 1. Load Resistors for Voltage Divider
3. Place the input of a buffer amplifier (voltage follower) across Vout of the voltage
divider of Figure 8 as shown in Figure 9
9 of 12
.
Figure 9. Voltage Divider with Voltage Follower Output
4. Place each of the 4 resistors in Table 1 across Vout and ground; measure and
record Vout associated with each of the 4 resistive test loads.
D. Design Problem - Weighted Summer
1. You are an electrical engineer on an integrated development team consisting of
one electrical engineer, one system engineer, and one mechanical engineer.
Tomorrow morning you have a design review with the program manager to
show the team’s progress in designing a Pick-off Interface Module for your new
chassis. The systems engineer left a top level block drawing for you to do the
detail circuit design from. She and the mechanical engineer then went to the
Javelina Cantina for happy hour with the KIIM-FM radio personality Pork
Chop. The block drawing is shown in Figure 10.
Figure 10. Pick-off Interface Module Block Drawing
2. Design and build a Pick-off Interface Module from the specifications shown in
Figure 10. In your design, make a concerted effort to minimize the number of
op-amps used. Develop and perform a test to show that you have met the
specification requirements of the drawing.
10 of 12
4. Data Reduction and Lab Report
The Lab 3 submittal will be an informal report. It shall be prepared in accordance with
guidelines listed below and submitted via Blackboard prior to the commencement of Lab
4.
The items listed below are the minimum that should be included in your report.
A. Experiment 1 Data: Non-Inverting Amplifier
1. Include in your report a schematic drawing that depicts:
A. Circuit components and measured values
B. Your name and section number placed on the schematic using the PSpice
“Text Label” function.
2. Include in your report a graphic of your captured oscilloscope picture showing:
A. Vp-p of Vi
B. Vp-p of Vo
C. Frequency of Vi
D. Frequency of Vo
3. Include in your report a PSpice simulation of your non-inverting amplifier using
the actual measured component values. On this simulation output, show peakto-peak values of Vo and Vin using the cursor function.
4. Include in your report your calculations for computing the amplifier gain. Show
your work.
5. Create an integrated table that displays Vi, Vo, and Gain for your computed data,
PSpice simulation data, and empirical data.
B. Experiment 2 Data: Inverting Amplifier
1. Include in your report a schematic drawing that depicts:
A. Circuit components and measured values
B. Your name and section number placed on the schematic using the PSpice
“Text Label” function.
2. Include in your report a graphic of your captured oscilloscope picture showing:
A. Vp-p of Vi
B. Vp-p of Vo
C. Frequency of Vi
D. Frequency of Vo
3. Include in your report a PSpice simulation of your non-inverting amplifier using
the actual measured component values. On this simulation output, show peakto-peak values of Vo and Vin using the cursor function.
4. Include in your report your calculations for computing the amplifier gain. Show
your work.
5. Create an integrated table that displays Vi, Vo, and Gain for your computed data,
PSpice simulation data, and empirical data.
11 of 12
C. Experiment 3 Data: Unity Gain OpAmp Buffer Amplifier (Voltage Follower)
1. Include in your report a schematic drawing that depicts your circuits (the voltage
divider circuit and the voltage divider with voltage follower output stage).
Include:
A. Circuit components and measured values
B. Your name and section number placed on the schematic using the PSpice
“Text Label” function.
2. Include in your report a table showing load resistance, Vout of the voltage
divider, and Vout for the voltage divider with voltage follower output stage.
3. Include in your report a single graph depicting load resistance on the X-axis and
Vout for the voltage divider, and Vout for the voltage divider with voltage
follower output stage on the Y-axis. Fully label your chart.
D. Experiment 4 Data: Weighted Summer Design Problem
1. Include in your report a schematic drawing that depicts your design of the Pickoff Interface Module. Include the following:
A. Circuit components and measured values
B. Your name and section number placed on the schematic using the PSpice
“Text Label” function.
2. Include adequate simulation results to show you have met the requirements of
Figure 10.
12 of 12