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Lecture 10 MOSFET (III) MOSFET Equivalent Circuit Models Outline • Low-frequency small-signal equivalent circuit model • High-frequency small-signal equivalent circuit model Reading Assignment: Howe and Sodini; Chapter 4, Sections 4.5-4.6 Announcements: 1. Quiz#1: March 14, 7:30-9:30PM, Walker Memorial; covers Lectures #1-9; open book; must have calculator • No Recitation on Wednesday, March 14: instructors or TA’s available in their offices during recitation times 6.012 Spring 2007 Lecture 10 1 Large Signal Model for NMOS Transistor Regimes of operation: VDSsat=VGS-VT ID linear saturation ID VDS VGS VGS VBS VGS=VT 0 0 • Cut-off VDS cutoff ID = 0 • Linear / Triode: ID = • W V µn Cox ⎡ VGS − DS − VT ⎤ • VDS ⎣ ⎦ L 2 Saturation I D = I Dsat = W 2 µn Cox [VGS − VT ] • [1 + λVDS ] 2L Effect of back bias VT (VBS ) = VTo + γ 6.012 Spring 2007 [ −2φ p − VBS − −2φp Lecture 10 ] 2 Small-signal device modeling In many applications, we are only interested in the response of the device to a small-signal applied on top of a bias. ID+id vgs + - VGS + vds + v - bs VBS VDS Key Points: • Small-signal is small – ⇒ response of non-linear components becomes linear • • Since response is linear, lots of linear circuit techniques such as superposition can be used to determine the circuit response. Notation: iD = ID + id ---Total = DC + Small Signal 6.012 Spring 2007 Lecture 10 3 Mathematically: i D (VGS , VDS , VBS ; v gs , vds , vbs ) ≈ I D (VGS , VDS , VBS ) + id (v gs , v ds , vbs ) With id linear on small-signal drives: id = gm vgs + go vds + gmb vbs Define: gm ≡ transconductance [S] go ≡ output or drain conductance [S] gmb ≡ backgate transconductance [S] Approach to computing gm, go, and gmb. gm ≈ ∂i D ∂vGS Q go ≈ ∂i D ∂vDS g mb ≈ Q ∂i D ∂vBS Q Q ≡ [vGS = VGS, vDS = VDS, vBS = VBS] 6.012 Spring 2007 Lecture 10 4 Transconductance In saturation regime: W 2 iD = µn Cox [vGS − VT ] • [1 + λVDS ] 2L Then (neglecting channel length modulation) the transconductance is: gm = ∂i D ∂vGS ≈ Q W µn Cox (VGS − VT ) L Rewrite in terms of ID: gm = 2 gm W µ nCox ID L saturation 0 0 6.012 Spring 2007 ID Lecture 10 5 Transconductance (contd.) Equivalent circuit model representation of gm: id G vgs S D + gmvgs - B 6.012 Spring 2007 Lecture 10 6 Output conductance In saturation regime: W 2 iD = µn Cox [vGS − VT ] • [1 + λVDS ] 2L Then: go = W ∂iD 2 = µnCox (VGS − VT ) • λ ≈ λID ∂v DS Q 2L Output resistance is the inverse of output conductance: ro = 1 1 = g o λID Remember also: 1 λ∝ L Hence: ro ∝ L 6.012 Spring 2007 Lecture 10 7 Output conductance (contd.) Equivalent circuit model representation of go: id G vgs S D + ro - B 6.012 Spring 2007 Lecture 10 8 Backgate transconductance In saturation regime (neglect channel length modulation): iD ≈ W 2 µn Cox [vGS − VT ] 2L Then: g mb ⎛ ∂V ⎞ ∂i D W = = − µn Cox (VGS − VT ) • ⎜ T ⎟ L ∂v BS Q ⎝ ∂v BS Q ⎠ Since: VT (vBS ) = VTo + γ [ −2φ p − v BS − −2φp ] Then : ∂VT ∂vBS = Q −γ 2 −2φp − VBS Hence: g mb = 6.012 Spring 2007 γ gm 2 −2φ p − VBS Lecture 10 9 Backgate transconductance (contd.) Equivalent circuit representation of gmb: id G vgs S D + gmbvbs - vbs B 6.012 Spring 2007 + Lecture 10 10 Complete MOSFET small-signal equivalent circuit model for low frequency: id G D + vgs S gmbvbs gmvgs ro - vbs B + ;;; ;; ;;;; ; ;;;; ;;;; ;;;; ; ; ; ;;; ;;;; + V DS − + V GS − metal interconnect to gate n+ polysilicon gate n+ source VBS + − 0 x y QN (y) n+ drain Xd (y) p-type ;;; ;;; ;;; ;;; ;;; ;;; ;;; ;;; ; metal interconnect to bulk 6.012 Spring 2007 Lecture 10 11 2. High-frequency small-signal equivalent circuit model ;; Need to add capacitances. In saturation: fringe electric field lines gate drain ;;; ; ;; ;;; source n+ n+ Csb qN (vGS) overlap LD overlap LD Cdb depletion region Cgs ≡ channel charge + overlap capacitance, Cov Cgd ≡ overlap capacitance, Cov Csb ≡ source junction depletion capacitance (+sidewall) Cdb ≡ drain junction depletion capacitance (+sidewall) ONLY Channel Charge Capacitance is intrinsic to device operation. All others are parasitic. 6.012 Spring 2007 Lecture 10 12 Inversion layer charge in saturation L vGS −VT 0 0 qN (vGS ) = W ∫ QN (y)dy = W ∫ dy QN (vC )• • dvC dvC Note that qN is total inversion charge in the channel & vC(y) is the channel voltage. But: dvC iD =− dy W µnQN (vC ) Then: W 2 µn qN (vGS ) = − • iD VGS −VT ∫ [QN (vC ) ] • dvC 2 0 Remember: QN (vC ) = −Cox [vGS − vC (y) − VT ] Then: W 2µ n q N (v GS ) = − • iD 6.012 Spring 2007 vGS −VT ∫ [vGS − vC (y) − VT ] 2 • dvC 0 Lecture 10 13 Inversion layer charge in saturation (contd.) Do integral, substitute iD in saturation and get: 2 qN (vGS ) = − WLCox (v GS − VT ) 3 Gate charge: qG (vGS ) = −qN (v GS ) − Q B, max Intrinsic gate-to-source capacitance: Cgs, i = dq G 2 = WLCox dv GS 3 Must add overlap capacitance: 2 C gs = WLC ox + WCov 3 Gate-to-drain capacitance — only overlap capacitance: Cgd = WCov 6.012 Spring 2007 Lecture 10 14 ; ; ; ; Other capacitances NRS = N (source) PS = 2 × Ldiff (source) = W NRD = N (drain) PD = 2 × Ldiff (drain) = W L Ldiff (source) Ldiff (drain) W AS = W × Ldiff (source) Source-to-Bulk capacitance: ( AD = W × Ldiff (drain) ) C sb = WLdiff C j + 2Ldiff + W C jsw where C j : Bottom Wall at VSB (F / cm 2 ) C jsw : Side Wall at VSB (F / cm) Drain-to-Bulk capacitance: ( ) C db = WLdiff C j + 2Ldiff + W C jsw where C j : Bottom Wall at VDB (F / cm2 ) C jsw : Side Wall at VDB (F / cm) Gate-to-Bulk capacitance: Cgb ≡ small parasitic capacitance in most cases (ignore) 6.012 Spring 2007 Lecture 10 15 What did we learn today? Summary of Key Concepts High-frequency small-signal equivalent circuit model of MOSFET id Cgd G vgs S D + Cgs gmvgs gmbvbs ro - vbs B Cgb Csb + Cdb In saturation: W gm ∝ ID L L ro ∝ ID Cgs ∝ WLCox 6.012 Spring 2007 Lecture 10 16