Instituto Tecnológico y de Estudios Superiores de Occidente
Departamento de Electrónica, Sistemas e Informática
Maestría en Diseño Electrónico
High-Frequency Electronics Design
Assignment 3
March 2009
Dr. J. E. Rayas Sánchez
Problem 1
The following circuit uses a transmission line with an inductance per-unit length L = 324.89 nH/m, a
capacitance per-unit length C = 129.96 pF/m, and a physical length l = 15.39 cm. A DC voltage VS = 1.5V
is applied to the transmission line at t = 0. Using bouncing diagrams, plot the voltage at the input of the
line (vI) and at the load (vL), from 0 to 8 ns, when RS = 10Ω, RL = 1KΩ.
Problem 2
An ideal negative voltage pulse with amplitude A = 5V and pulse width PW = 2.5ns is applied to the
following transmission line circuit. Using bouncing diagrams, plot vI and vL from 0 to 8ns. Assume RS =
15Ω, RL = 150Ω, Zo = 50Ω, εe = 9, and l = 10cm.
RS
vS
l
vI
e
vL
RL
Problem 3
In this problem you will investigate the transient effects of inductive discontinuities in transmission line
circuits with capacitive loads. The following circuit is a first-order model of two microstrip lines on
different layers connected through a vertical via. Each microstrip line is modeled with a lossless
transmission line, and the via is modeled with a lumped inductance Lv. The following parameter values
are used: VS = 3V, RS = 25 Ω, CL = 3 pF, Z1 = Z2 = 50 Ω, εe = 3, l1 = l2 = 8.6605 cm.
1
Periférico Sur 8585
45604 Tlaquepaque, Jal., México
Tel +52 33 3669 3598 / Fax 3669 3511
www.iteso.mx
Instituto Tecnológico y de Estudios Superiores de Occidente
Departamento de Electrónica, Sistemas e Informática
Maestría en Diseño Electrónico
a) Simulate the circuit in APLAC using Lv = 0 H. Plot VS, vI(t), and vL(t) from 0 to 10 ns. Verify that
vI(0 < t < 2td) = Vo+ and that vI(2td) = −ΓSVo+, where td is the total flight time (or time delay) from
the source to the load, and Vo+ is the initial incident voltage wave amplitude at the input of the
line.
b) Simulate the circuit in APLAC using Lv = 10 nH. Plot VS, vI(t), and vL(t) from 0 to 10 ns. Verify
that vI(0 < t < td) = Vo+ and that vI(2td) ≠ −ΓSVo+. Notice that there is a new transient effect on vI at
t = td due to the inductive discontinuity. Derive an expression to calculate vI(td) and compare your
result with APLAC result for vI(td).
Problem 4
The following circuit uses a driver and a load whose non-linear I-V characteristics are shown below. a)
Assuming a transmission line with Zo = 50 Ω, draw the corresponding Bergeron diagram; b) Plot the
voltage waveforms at the input (vI) and at the load (vL), from 0 to 5 flight times.
40
35
Current (mA)
30
Driver
Load
25
20
15
10
5
0
0
0.5
1
1.5
Voltage (V)
Submission deadline: Tuesday April 14, 2009.
2
Periférico Sur 8585
45604 Tlaquepaque, Jal., México
Tel +52 33 3669 3598 / Fax 3669 3511
www.iteso.mx