MC12080
1.1 GHz Prescaler
Description
The MC12080 is a single modulus divide by 10, 20, 40, 80 prescaler
for low power frequency division of a 1.1 GHz high frequency input
signal. Divide ratio control inputs SW1, SW2 and SW3 select the
required divide ratio of ÷10, ÷20, ÷40, or ÷80.
An external load resistor is required to terminate the output. An
820 W resistor is recommended to achieve a 1.2 Vpp output swing,
when dividing a 1.1 GHz input signal by the minimum divide by ratio
of 10, assuming a 8.0 pF load. Output current can be minimized
dependent on conditions such as output frequency, capacitive load
being driven, and output voltage swing required. Typical values for
load resistors are included in the Vout specification for various divide
ratios at 1.1 GHz input frequency.
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MARKING
DIAGRAM
8
8
1
1
A
L
Y
W
G
Features
•
•
•
•
•
1.1 GHz Toggle Frequency
Supply Voltage 4.5 to 5.5 V
Low Power 3.7 mA Typical at VCC = 5.0 V
Operating Temperature Range of −40 to 85°C
These Devices are Pb−Free and are RoHS Compliant
Symbol
Power Supply Voltage, Pin 2
Value
−0.5 to 7.0
Vdc
Operating Temperature Range
TA
−40 to 85
°C
Storage Temperature Range
Tstg
−65 to 150
°C
IO
10
mA
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
ESD Protection
Human Body Model
Machine Model
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Flammability Rating
Oxygen Index: 28 to 34
1
8
2
7
3
6
4
5
In
SW3
SW2
GND
(Top View)
FUNCTION TABLE
SW1
SW2
SW3
Divide Ratio
L
L
L
80
L
L
H
40
L
H
L
40
Value
L
H
H
20
> 1500 V
> 100 V
H
L
L
40
H
L
H
20
Level 1
H
H
L
20
H
H
H
10
Table 2. ATTRIBUTES
Characteristics
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
In
VCC
SW1
Out
Unit
VCC
Maximum Output Current, Pin 4
12080
ALYW
G
PIN CONNECTIONS
Table 1. MAXIMUM RATINGS
Rating
SOIC−8
D SUFFIX
CASE 751
UL 94 V−0
@ 0.125 in
NOTE: SW1, SW2 and SW3: H = VCC, L = Open.
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
© Semiconductor Components Industries, LLC, 2013
May, 2013 − Rev. 7
1
Publication Order Number:
MC12080/D
MC12080
Table 3. ELECTRICAL CHARACTERISTICS (VCC = 4.5 to 5.5 V; TA = −40 to 85°C, unless otherwise noted.)
Characteristic
Symbol
Min
Typ
Max
Unit
Toggle Frequency (Sine Wave)
ft
0.1
1.4
1.1
GHz
Supply Current Output (Pin 2)
ICC
−
3.7
5.0
mA
Input Voltage Sensitivity
100 to 250 MHz
250 to 1100 MHz
Vin
400
100
−
−
1000
1000
Divide Ratio Control Input High (SW1, SW2, SW3)
VIH
VCC − 0.5 V
VCC
VCC + 0.5 V
V
Divide Ratio Control Input Low (SW1, SW2, SW3)
VIL
Open
Open
Open
−
Output Voltage Swing (Note 1)
RL = 820 W, IO = 4.0 mA for ÷10
RL = 1.6 kW, IO = 2.1 mA for ÷20
RL = 3.3 kW, IO = 1.1 mA for ÷40
RL = 6.2 kW, IO = 0.57 mA for ÷80
Vout
0.8
1.2
−
Vpp
mVpp
1. Assumes 8.0 pF load and 1.1 GHz input frequency (typical), IO at VCC = 5.0 V and TA = 25°C.
In
In
D
Q
D
Q
D
C
Q
C
Q
C
Q
Q
1
D
Q
D
Q
D
Q
D
Q
C
Q
C
Q
C
Q
C
Q
0
Out
SW1
SW3
SW2
Figure 1. Logic Diagram
VCC = 4.5 to 5.5 V
C3
Sine Wave Generator
VCC
C1
SW1
In
SW2
50
W
SW3
C2
In
Out
Gnd
CL
RL
Figure 2. AC Test Circuit
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2
External Components
C1 = C2 = 1000 pF
C3 = 0.1 mF
CL = 8.0 pF (Including Scope and Jig Capacitance)
RL = 820 W for ÷10 at 1.1 GHz
MC12080
+15.0
+1257.40
+10.0
+707.11
ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ
0
+223.61
OPERATING
WINDOW
-5.0
AMPLITUDE (dBm)
+397.64
-10.0
-15.0
-20.0
+125.74
+70.71
+39.76
+22.36
-25.0
+12.57
-30.0
+7.07
-35.0
+3.98
-40.0
+2.24
-45.0
+1.26
-50.0
0
200
400
600
800
1000
1200
1400
mVrms
+5.0
+0.71
1800
1600
FREQUENCY (MHz)
Divide Ratio = 10; VCC = 5.0 V; TA = 25°C
Figure 3. Input Signal Amplitude versus Input Frequency
2000
1200
800
mVpp
1600
400
0
200
400
600
800
1000
1200
1400
1600
0
1800
FREQUENCY (MHz)
Figure 4. Output Amplitude versus Input Frequency
ORDERING INFORMATION
Device
MC12080DG
MC12080DR2G
Package
Shipping†
SOIC−8
(Pb−Free)
98 Units / Rail
2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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3
MC12080
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AK
−X−
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
A
8
5
S
B
0.25 (0.010)
M
Y
M
1
4
−Y−
K
G
C
N
DIM
A
B
C
D
G
H
J
K
M
N
S
X 45 _
SEATING
PLANE
−Z−
0.10 (0.004)
H
M
D
0.25 (0.010)
M
Z Y
S
X
J
S
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0_
8_
0.25
0.50
5.80
6.20
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0 _
8 _
0.010
0.020
0.228
0.244
SOLDERING FOOTPRINT*
1.52
0.060
7.0
0.275
4.0
0.155
0.6
0.024
1.270
0.050
SCALE 6:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
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limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
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For additional information, please contact your local
Sales Representative
MC12080/D