ESE319 Introduction to Microelectronics Class AB Output Stage ● ● ● ● Class AB amplifier Operation Multisim Simulations - Operation Class AB amplifier biasing Multisim Simulations - Biasing 2008 Kenneth R. Laker (based on P. V. Lopresti 2006) updated 11Nov08 KRL 1 ESE319 Introduction to Microelectronics Class AB Operation 2008 Kenneth R. Laker (based on P. V. Lopresti 2006) updated 11Nov08 KRL 2 ESE319 Introduction to Microelectronics Basic Class AB Amplifier Circuit Bias QN and QP into slight conduction when vI = 0. i L =i N −i P Ideally QN and QP are: 1. Matched (unlikely with discrete transistors). 2. Operate at same temperature. NOTE. This is base-voltage biasing with all its stability problems! 2008 Kenneth R. Laker (based on P. V. Lopresti 2006) updated 11Nov08 KRL 3 ESE319 Introduction to Microelectronics Class AB Circuit Operation for vi = 0 Output voltage: V BB for v i 0 v o=v i −v BEN ⇒ v o≈v i 2 V BB for v i 0 v o=v i − v EBP ⇒ v o ≈v i 2 V BB −v O 2 V BB v EBP =v O − 2 v BEN = Base-to base voltage is constant! v BEN v EBP =V BB v BEN vT i N =i P i L Bias: I N =I P =I Q = I S e Also: i N =I S e Using: i N =I S e , i P =I S e V BB 2VT v BEN vT & i P =I S e v EBP VT v EBP VT & I Q =I S e iN iP IQ V T ln V T ln =2 V T ln IS IS IS 2008 Kenneth R. Laker (based on P. V. Lopresti 2006) updated 11Nov08 KRL 4 V BB 2V T ESE319 Introduction to Microelectronics Class AB Circuit Operation - cont. i N =i P i L iN iP IQ V T ln V T ln =2 V T ln IS IS IS V T ln iN iP I 2S IQ =2V T ln IS V T ln i N i P −V T ln I 2S =2V T ln I Q −2 V T ln I S ln i N i P =ln I 2Q Constant base voltage condition: i N i P =I Q2 2008 Kenneth R. Laker (based on P. V. Lopresti 2006) updated 11Nov08 KRL 5 ESE319 Introduction to Microelectronics Class AB Circuit Operation - cont. Constant base voltage condition: i N i P =I Q2 i N =i P i L Kirchhoff's Current Law condition: i N =i P i L ⇒i P =i N −i L Combining equations: vO i L= RL i N i N −i L =I Q2 or i P i P i L =I 2Q for vI > 0 V for vI < 0 V Hence: 2 2 i 2N −i N i L −I Q2 =0 or i P i P i L −I Q =0 for vI > 0 V for vI < 0 V 2008 Kenneth R. Laker (based on P. V. Lopresti 2006) updated 11Nov08 KRL 6 ESE319 Introduction to Microelectronics Class AB Circuit Operation - cont. i L =i N −i P i N i P = I Q2 Observations: 1. Since with constant base voltage VBB: i N i P =I Q2 , if iP increases by i P =i P 1 i then iN decreases by i N =i N /1i , and vice-versa. 2. For vO > 0, the load current iL supplied by the complementary emitter followers QN and QP. As vO increases, iP decreases and for large, positive vO i.e. i =i −i =i − v O hence v O large⇒ i P 0 P N L N RL 3. For vO < 0, the load current iL supplied by the complementary emitter followers QN and QP. As vO decreases, iN decreases and for large, negative vO vO i.e. i N =i P i L =i P hence −v O −large ⇒i N 0 RL 2008 Kenneth R. Laker (based on P. V. Lopresti 2006) updated 11Nov08 KRL 7 ESE319 Introduction to Microelectronics Class AB Circuit Operation - cont. I 2Q where IQ is typically small. Write the product equation as: i P = iN For example let IQ = 1 mA and iN = 10 mA. 1⋅10−6 1 i P= =0.1 mA= iN −3 100 10⋅10 The Class AB circuit, over most of its input signal range, operates as if the QN or QP transistor is conducting and the QP or QN transistor is cut off. Using this approximation we see that a class AB amplifier acts much like a class B amplifier; but without the dead zone. 2008 Kenneth R. Laker (based on P. V. Lopresti 2006) updated 11Nov08 KRL 8 ESE319 Introduction to Microelectronics Class AB VTC Plot 2008 Kenneth R. Laker (based on P. V. Lopresti 2006) updated 11Nov08 KRL 9 ESE319 Introduction to Microelectronics Amplitude: 20 Vp Frequency: 1 kHz Class AB VTC Simulation VCC VBB/2 RSig VBB/2 RL -VCC 2008 Kenneth R. Laker (based on P. V. Lopresti 2006) updated 11Nov08 KRL 10 ESE319 Introduction to Microelectronics Class AB VTC Simulation - cont. Amplitude: 2 Vp Frequency: 1 kHz V BB =0.1V 2 V BB =0.5V 2 V BB =0.7V 2 2008 Kenneth R. Laker (based on P. V. Lopresti 2006) updated 11Nov08 KRL 11 ESE319 Introduction to Microelectronics Class AB Small-Signal Output Resistance Instantaneous resistance for the QN transistor - assume α 1: ac ground CN v BEN VT di N ISe iN = = dv BEN VT VT BN vI = 0 V EN <=> EP BP CP ac ground R out =r eN ∥r eP For the QP transistor: di P iP = dv EBP V T Hence: VT VT r eN = and r eP = iN iP for vI > 0 V: R out ≈r eN for vI < 0 V: R out ≈r eP 2008 Kenneth R. Laker (based on P. V. Lopresti 2006) updated 11Nov08 KRL 12 ESE319 Introduction to Microelectronics Small-Signal Output Resistance - cont. The two emitter resistors are in parallel: V T2 iN iP VT VT R out =r eN ∣∣r eP = = = VT VT i N i P i N i P iN iP iN iP iN iP At iN = iP (the no-signal condition i.e. vO = 0 => iL = 0): i N =i P =I Q VT R out = 2 IQ So, for small signals, a load current flows => no dead-zone! 2008 Kenneth R. Laker (based on P. V. Lopresti 2006) updated 11Nov08 KRL 13 ESE319 Introduction to Microelectronics Class AB Amplifier Biasing IQ IQ + QN VBB IQ QP IQ A straightforward biasing approach: D1 and D2 are diode-connected transistors identical to QN and QP, respectively. They form mirrors with the quiescent current set by R: 2V CC −1.4 V CC −0.7 I Q= = 2R R or: V CC −0.7 R= IQ Recall: With mirrors, the device temperature for all transistors needs to be matched! 2008 Kenneth R. Laker (based on P. V. Lopresti 2006) updated 11Nov08 KRL 14 ESE319 Introduction to Microelectronics Widlar Current Source IN = bias current for Class AB amplifier NPN R IREF VCC IO IO = IN Q2 = QN I REF V BE1=V T ln IS IO V BE2=V T ln IS emitter IO Re degeneration I REF I S I REF V BE1−V BE2=V T ln =V T ln IS IO IO V CC −V BE1 12V −0.7 V I REF = = =1 mA V BE1 =V BE2I O R e R 11.3k I REF Note: Pages 653-656 in Sedra & Smith Text. I O R e =V T ln IO + + - VBE1 VBE2- Note Re > 0 iff IO < IREF 2008 Kenneth R. Laker (based on P. V. Lopresti 2006) updated 11Nov08 KRL 15 ESE319 Introduction to Microelectronics Widlar Current Source - cont. R If IO specified (and IREF chosen by VT I REF designer): Re= ln IO IO IO IREF VCC IO Re I REF I O R e =V T ln IO If Re specified and IREF given: VT I O= ln I REF −ln I O Re Solve for IO graphically. Example Let IO = 10 µA & choose IREF = 10 mA, determine R and Re: V CC −V BE1 12 V −0.7 V R= = =1.13 k I REF 10 mA VT I REF 0.025V 10 m A Re= ln = ln IO IO 10 A 10 A .=2500 ln 1000=17.27 k R=1.13 k 2008 Kenneth R. Laker (based on P. V. Lopresti 2006) updated 11Nov08 KRL R e =17.27 k 16 ESE319 Introduction to Microelectronics Widlar Current Mirror Small-Signal Analysis .≈. v x −−v i x =g m v i ro=g m v ro r ≫1/ g m Rout is greatly enhanced by adding emitter degeneration. v =−r ∥Re i x v x r ∥R e i x vx i x =−g m r ∥R e i x − ⇒ R out = = Re∥r 1g m r o ro ro ix g m r o ≫1 2008 Kenneth R. Laker (based on P. V. Lopresti 2006) updated 11Nov08 KRL 17 ESE319 Introduction to Microelectronics Class AB Current Biasing Simulation Bias currents set at IREF and IO by R and emitter resistor(s) Re. I REF ≈4 mA NPN Widlar current mirror I O ≈2 mA R=2.8 kΩ IREF iN ION Re=10 Ω R =100 Ω L iIiLLL Re=10 Ω Amplitude: 0 Vp Frequency: 1 kHz R=2.8 kΩ IREF IOP V CC −V BE1 R= I REF VT I REF Re= ln IO IO PNP Widlar current mirror 2008 Kenneth R. Laker (based on P. V. Lopresti 2006) updated 11Nov08 KRL 18 ESE319 Introduction to Microelectronics Class AB IREF = 4 mA Current Bias Simulation Amplitude: 0 Vp Frequency: 1 kHz NPN Widlar current mirror 4.031m 2.329m Quiescent Power Dissipation vI = 0 V: P Disp =P D−av =76.31 mW 75.53 mW .=151.84 mW 2.270m 4.025m PNP Widlar current mirror 2008 Kenneth R. Laker (based on P. V. Lopresti 2006) updated 11Nov08 KRL 19 ESE319 Introduction to Microelectronics Class AB 4 mA Current Bias Simulation - cont. Amplitude: 12 Vp Frequency: 1 kHz For linear operation: - 9 V < vO < +9 V VTC has no dead-zone. 2008 Kenneth R. Laker (based on P. V. Lopresti 2006) updated 11Nov08 KRL 20 ESE319 Introduction to Microelectronics Class AB VTC Limits Linear VTC for vI-max ≤ vI ≥ 0 => 1. Q2, Q3 forward-active iREF Q2 Q3 vI Q4 vO iP Q1 Q2 ≠ Saturation => v CE2=V CC −i N Re −v O ≥ V CE2sat where v O =−i N Re v I v CE2=V CC −v I ≥ V CE2sat v I ≤ V CC −V CE2sat =v I −max1 2. Q3 ≠ Cutoff => v BQ3 ≥ v I 0.7V v BQ3=V CC −i REF R v I ≤ V CC −i REF R−0.7 V =v I −max2 v I −max =max v I −max1 , v I −max2 2008 Kenneth R. Laker (based on P. V. Lopresti 2006) updated 11Nov08 KRL 21 ESE319 Introduction to Microelectronics Class AB 4 mA Current Bias Simulation - cont. 3.324m I REFN V BQ3 PD+av 0.018m 309 mW I ON V BQ3 VI 2.697m PD+av PL-av VO PLav I OP PD-av 1.776u 4.734m PD-av NOTE: 1. Linear operation up to VI = 9 V: PDav = 946mW, PLav = 510mW => P Lav 510 mW = = =0.540.785 P Dav 946 mW 2. At VI = 10 V: VBEQ3 = VBN – VI = -0.1V NPN Q3 is cutoff for VI ≥ 9.5 V. 3. By symmetry PNP Q4 is cutoff for VI ≤ -9.5V . 2008 Kenneth R. Laker (based on P. V. Lopresti 2006) updated 11Nov08 KRL 22 ESE319 Introduction to Microelectronics Conclusions ADVANTAGE: Class AB operation improves on Class B linearity. DISADVANTAGES: 1. Emitter resistors absorb output power. 2. Power Conversion Efficiency is less than Class B. 3. Temperature matching will be needed – more so. if emitter resistors are not used. TRADEOFFS: Tradeoffs - involving bias current - between power efficiency, power dissipation and output signal swing need to be addressed. 2008 Kenneth R. Laker (based on P. V. Lopresti 2006) updated 11Nov08 KRL 23