ESE319 Introduction to Microelectronics Common Emitter BJT Amplifier 2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL 1 ESE319 Introduction to Microelectronics Adding a signal source to the single power supply bias amplifier Desired effect – addition of bias and signal sources Starting point single dc source 2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL 2 ESE319 Introduction to Microelectronics Wrong Way to Combine Sources <=> =100 Source with low output impedance upsets bias. =100 Thevenin equivalent at base: 2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL 3 ESE319 Introduction to Microelectronics Wrong Way - Continued V th = Vth To analyze, 1. Isolate base circuit, 2 .Use superposition, 3. Apply Thevenin equivalent again for the base bias source, VB: 50 5 V B≈ VB 2000050 2000 Rth= R'B= RB∥RS = 50⋅20000 ≈50 5020000 We effectively “short out” the bias source! The signal source essentially is unaffected. (Why? What is its Thevenin equivalent?) 2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL 4 ESE319 Introduction to Microelectronics The Right Way – Use a “Blocking” Capacitor iCb vCb + Cb =100 For convenience lets continue to use the “base bias Thevenin equiv”. A capacitor is an OPEN at dc and RS does not affect the bias! The capacitor charges to the dc bias source, VB, to satisfy Kirchoff's voltage law and the dc bias is in series with the signal source. DESIGN GOAL: for f ≥ fmin, set the value of Cb so that its voltage drop vCb is negligible at the lowest operating frequency fmin. 2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL 5 ESE319 Introduction to Microelectronics Blocking Capacitor Selection ic ib apply ie =100 evaluate <=> ib ib vbg r bg = ib r bg Use the small signal equivalent circuit and superposition to estimate the input resistance of the transistor. ie ic i e =i b i b vbg = i b r i e RE =i b r i b 1 RE vbg r bg = = r 1 RE ≈1 RE ib 2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL 6 ESE319 Introduction to Microelectronics Capacitor Selection- continued The signal source “sees” the 20 k bias source resistance in parallel with r bg. So the signal source equivalent circuit is: iCb vCb + Cb vsig =100 r bg ≈100 RE =400 k Therefore: 400 RB∣∣r BG= 20≈20 k = RB 420 The capacitor voltage drop is: 1 vCb= i Cb j Cb Where the capacitor current is: 1 v sig = i Cb RS RB∥r bg j Cb v sig vsig iCb≈ => vCb≈ 1 j C b RB1 RB j Cb 2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL 7 ESE319 Introduction to Microelectronics Capacitor Selection - continued vsig 1 = vCb≈ Cb C b RB j C b RB1 or iCb DESIGN GOAL: Choose Cb for negligible voltage vCb + - drop at vCb for f ≥ fmin, i.e. Cb OR vsig v sig for f ≥ fmin vCb≈ ≤ j C b RB1 10 vsig 10 vCb ≤ ⇒ min C b RB ≥10⇒ C b ≥ 10 2 f min RB DESIGN GOAL: Choose Cb so that Cb=0.1 min , i.e. 1 10 Cb= =0.1 min ⇒ C b = C b RB 2 f min RB 2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL 8 ESE319 Introduction to Microelectronics Capacitor Selection - continued Select the LOWEST frequency of interest. This sets the lower bound on Cb. Using fmin = 20 Hz frequency for our example circuit: 2 f min=2 20≈6.28⋅20=125.6 sec−1 Cb ≥ 10 2 f min RB 10 C b −min= 2 f min RB 10 10−6 C b −min= = =4 F 3 125.6⋅20⋅10 0.25 ANY capacitor larger than 4 F will do the job! This is an inequality, not an equality! Choose Cb = 5 F 2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL 9 ESE319 Introduction to Microelectronics Common Emitter Unity Gain Amplifier Cb 5 uF Cb 5 uF Equivalent circuits How can we achieve reasonable gain with this circuit? Solution: Split RE and use capacitor bypassing. 2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL 10 ESE319 Introduction to Microelectronics Bypass for Gain Cb 5 uF + ie vRE1 + vZE2 - =100 Z E2 = RE2∥ 1 j C byp Procedure: 1. Split the emitter resistor in two. Later, we will show that the voltage gain will be close to -RC/RE1. 2. Bypass RE2 with a capacitor Cbyp that looks like a near “short circuit” at the lowest frequency of interest (fmin). i.e. |vZE2| << |vRE1| for f ≥ fmin) 2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL v RE1=i e RE1 & v ZE2=i e Z E2 11 ESE319 Introduction to Microelectronics Bypass for Gain - continued Rb 20 k Ohm + Rb vRE1 + 20 k Ohm vZE2 - =100 =100 Small signal circuit Desired circuit for f ≥ fmin i.e. DESIGN GOAL: Choose Cbyp s.t. |vZE2| << |vRE1| for f ≥ fmin 2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL 12 ESE319 Introduction to Microelectronics Rs||Rb c b ib ic e ie where + vRE1 + vZE2 (Thevenin resistance) R Need to develop a design equation for Cbyp s.t. DESIGN GOAL: |vRE1| >> |vZE2| or DESIGN GOAL: | 1/ j C byp | << RCbyp RE2 Z E2 = j C byp RE2 1 v ZE2 Z E2 RE2 / RE1 1 | |=| |=| | ≤ vRE1 RE1 j C byp RE2 1 10 Cbyp i e =1 i b =100 r e ≪ RE1 vRE1=i e RE1 & v ZE2=i e Z E2 RE2 1 10 C byp ≥10 = RE1 2 f min RE2 2 f min RE1 10 C byp− min= 2 f min RE1 2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL 13 ESE319 Introduction to Microelectronics DESIGN GOAL: |1/ j C byp| << RCbyp set v-sig = 0 RS∥RB RCbyp= RE2∥ RE1 r e ≈ RE2∥ RE1 1 1 1 ≪ RE2∥RE1= RE2∥ RE1 10 C byp (Thevenin resistance) 10 10 C byp ≥ = min RE2∥ RE1 2 f min RE2∥RE1 =100 2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL 14 ESE319 Introduction to Microelectronics C byp− min= 10 10 = F =79.6 F 2 f min RE1 2 x 20 x 1000 Choose Cbyp = 100 F Final Design Cb 5 uF 2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL 15 ESE319 Introduction to Microelectronics Gain Calculation in Passband Simple gain calculation: + vout - v sig v sig i b= ≈ Rs r 1 RE1 1 RE1 vout =− RC i c =− RC i b − RC vout = v sig 1 RE1 =100 Passband model v out RC G= ≈− =−4 vsig RE1 2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL 16 ESE319 Introduction to Microelectronics Multisim Simulation 20 Hz Gain I kHz Gain 2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL 17 ESE319 Introduction to Microelectronics What if R E is Fully Bypassed? vout RC G= ≈− =∞ ? vsig RE1 0 2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL 18 ESE319 Introduction to Microelectronics What if R E is Fully Bypassed? v sig vsig i b= = Rs r 1 RE1 RS r Cb 5 uF 0 vout vout =− RC i c =− RC i b − RC − RC vout = v sig ≈ vsig RS r r I C =1 mA g m=0.04 S r =/ g m=2.5 k =100 2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL − RC .= v =− g m RC vsig / g m sig vout G= ≈− g m RC =−160 vsig 19