Voltage divider bias
+V CC C 1 R 1 R C C 2
in R 2 R E C 3 This is the biasing circuit wherein, I CQ and V CEQ are almost independent of .
The level of I BQ will change with so as to maintain the values of I CQ and V CEQ almost same, thus maintaining the stability of Q point.
Two methods of analyzing a voltage divider bias circuit are:
– can be applied to any voltage divider circuit
– direct method, saves time and energy, can be applied in most of the circuits.
In this method, the Thevenin equivalent network for the network to the left of the base terminal to be found.
To find Rth: From the above circuit,
R th = R1 R2 = R1 R2 / (R1 + R2)
To find Eth
From the above circuit, E th = V R2 = R 2 V CC / (R1 + R2) In the above network, applying KVL ( E th – V BE ) = I B [ R th +( + 1) R E ] I B = ( E th – V BE ) / [ R th +( + 1) R E ]
Analysis of Output loop
KVL to the output loop: V CC = I C R C + V CE + I E R E I E I C Thus, V CE = V CC – I C (R C + R E ) Note that this is similar to emitter bias circuit
For the circuit given below, find I C and V CE .
Given the values of R 1 , R 2 , R C , R E and = 140 and V CC = 18V.
For the purpose of DC analysis, all the capacitors in the amplifier circuit are opened.
Considering exact analysis: 1. Let us find 2. Then find 3. Then find IB 4. Then find 5. Then find R th = R1 R2 = R1 R2 / (R1 + R2) = 3.55K
E th = V R2 = R2V CC / (R1 + R2) = 1.64V
I B = ( Eth – V BE ) / [ Rth +( + 1) R E ] = 4.37 A I C = I B = 0.612mA
V CE = V CC – I C (RC + RE) = 12.63V
The input section of the voltage divider configuration can be represented by the network shown in the next slide.
The emitter resistance R E is seen as ( +1)R E at the input loop.
If this resistance is much higher compared to R 2 , then the current I B is much smaller than I 2 through R 2 .
This means, Ri >> R2 OR ( +1)R E 10R2 OR R E 10R2 This makes I B to be negligible.
Thus I 1 through R 1 is almost same as the current I 2 through R 2 .
Thus R 1 and R 2 can be considered as in series.
Voltage divider can be applied to find the voltage across R 2 ( V B ) V B = V CC R 2 / ( R 1 + R 2 ) Once V B is determined, V E is calculated as, V E = V B – V BE After finding V E , I E is calculated as, I E = V E / R E I E I C V CE = V CC – I C ( R C + R E )
Given: V CC = 18V, R 1 = 39k , R 2 = 3.9k , R C = 4k , R E = 1.5k and = 140. Analyse the circuit using approximate technique.
In order to check whether approximate technique can be used, we need to verify the condition, 1.
R E 10R 2
R E = 210 k and 10R 2
k Thus the condition R E 10R 2
• Thus approximate technique can be applied. Find V B = V CC R 2 / ( R 1 + R 2 ) = 1.64V Find V Find I E Find V E = V = V CE B E = V – 0.7 = 0.94V / R CC E – = 0.63mA = I I C (R C + R E C ) = 12.55V
Comparison Exact Analysis Approximate Analysis I C = 0.612mA
I C = 0.63mA
V CE = 12.63V
V CE = 12.55V
Both the methods result in the same values for I C and V CE since the condition R E 10R 2 is satisfied.
It can be shown that the results due to exact analysis and approximate analysis have more deviation if the above mentioned condition is not satisfied.
For load line analysis of voltage divider network, Ic,max = V CC / ( R C +R E ) when V CE = 0V and V CE max = V CC when I C = 0.