SD 192 - Digital Systems TA Lab, Office Hour and Tutorial Schedule, 2008
Week
start date
LAB
Description
1
06-May
no lab
(no labs; students should get
organized into groups of 3)
2
13-May
1
Lab 1 — Introduction
3
20-May
no lab
(no formal lab; students
encouraged to simulate Lab 2)
4
27-May
2
Lab 2 — Circuit Simulation
5
03-Jun
3
6
10-Jun
4
7
17-Jun
midterm
(midterm week; students encouraged
to start work on Lab 5)
8
24-Jun
5
Lab 5 — Combinational
Circuits: Programmable Logic
9
01-Jul
no lab
(no formal lab; students encouraged
to prepare for Lab 6)
10
08-Jul
6
11
15-Jul
7
12
22-Jul
8
13
29-Jul
no lab
TA's
Bai, Rong
Fakih, Adel
Logan, Andrew
Parsaei, Hossein
Lab 3 — Combinational
Circuits: Logic Gates
Lab 4— Combinational
Circuits: Multiplexers
Lab 6 — Sequential Circuits:
Flipflops
Lab 7 — Sequential Circuits:
FPGA
Lab 8 — Sequential Circuits:
Programmable Logic
(no formal lab; students
complete Lab 8)
Lab & Office
Hours
Tutorial
Adel & Andrew
Adel & Andrew
Rong & Hossein
Rong & Hossein
Adel & Andrew
Adel & Andrew
Rong & Hossein
Rong & Hossein
Adel & Andrew
Adel & Andrew
Adel & Andrew
Rong & Hossein
Rong & Hossein
Rong & Hossein
Adel & Andrew
Adel & Andrew
Rong & Hossein
Rong & Hossein
Adel & Andrew
Rong & Hossein
Email
rbai@engmail.uwaterloo.ca
afakih@engmail.uwaterloo.ca
aslogan@engmail.uwaterloo.ca
hparsaei@engmail.uwaterloo.ca
Notes:
1. TA's doing lab and office hour duty will also grade the labs.
2. Office Hour is in the lab.
3. Lab's are due one week after the student's lab day. Example if student group 2 lab day
is Wednesday May 21 then group 2's lab is due Wednesday May 28.
4. Students wanting to meet with a TA during a week with no lab should arrange a time
via email with a TA that is giving the tutorial for that week.