Introduction to CMOS VLSI Design

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Introduction to CMOS VLSI Design
Introduction
Course relevance
2007 world wide sales of chips: ~250B$
Primarily digital
High-margin business
Basis for systems
In US, most ECE graduates work in
VLSI design: Intel, Qualcomm
System design: HP, Cisco
Software: Microsoft, Google
Introduction
CMOS VLSI Design
Course Goals
Learn to design and analyze digital VLSI chips using CMOS technology
Designing chips containing lots of transistors
How basic components work (transistors, gates, flops, memories, adders,
Employ hierarchical design methods
Understand design issues at the layout, transistor and logic level
Use integrated circuit cells as building blocks
Book: Weste and Harris, CMOSVLSI Design: A Circuits and Systems Perspective, AW,
3rd edition
Introduction
CMOS VLSI Design
General Principles
Technology changes fast => important to understand
general principles
optimization, tradeoffs
Concepts remain the same:
tubes -> bipolar transistors -> MOS transistors
Introduction
CMOS VLSI Design
Types of IC Designs
IC Designs can be Analog or Digital
Digital designs can be one of three groups
Full Custom
Every transistor designed and laid out by hand
ASIC (Application-Specific Integrated Circuits)
Designs synthesized automatically from a high-level language
description
Semi-Custom
Mixture of custom and synthesized modules
Introduction
CMOS VLSI Design
MOS Technology Trends
Introduction
CMOS VLSI Design
Steps in Design
Designer
Tasks
Define Overall Chip
Architect
C/RTL Model
Tools
Text Editor
C Compiler
Initial Floorplan
Behavioral Simulation
Logic
Designer
Logic Simulation
Synthesis
Datapath Schematics
RTL Simulator
Synthesis Tools
Timing Analyzer
Power Estimator
Cell Libraries
Circuit
Designer
Circuit Schematics
Circuit Simulation
Megacell Blocks
Schematic Editor
Circuit Simulator
Router
Layout and Floorplan
Physical
Designer
Place and Route
Parasitics Extraction
DRC/LVS/ERC
Introduction
CMOS VLSI Design
Place/Route Tools
Physical Design
and Evaluation
Tools
System on a Chip
Source: ARM
Introduction
CMOS VLSI Design
Need for transistors
Cannot make logic gates with voltage/current source, RLC
components
Consider steady state behavior of L and C
Need a “switch”: something where a (small) signal can
control the flow of another signal
Introduction
CMOS VLSI Design
Bell Labs
1940: Ohl develops the PN Junction
1945: Shockley's laboratory established
1947: Bardeen and Brattain create point contact transistor
(U.S. Patent 2,524,035)
Diagram from patent application
Introduction
CMOS VLSI Design
Bell Labs
1951: Shockley develops a junction transistor
manufacturable in quantity (U.S. Patent 2,623,105)
Diagram from patent application
Introduction
CMOS VLSI Design
1950s – Silicon Valley
1950s: Shockley in Silicon Valley
1955: Noyce joins Shockley Laboratories
1954: The first transistor radio
1957: Noyce leaves Shockley Labs to form Fairchild with Jean Hoerni and
Gordon Moore
1958: Hoerni invents technique for diffusing impurities into Si to build
planar transistors using a SiO2 insulator
1959: Noyce develops first true IC using planar transistors, back-to-back
PN junctions for isolation, diode-isolated Si resistors and SiO2 insulation
with evaporated metal wiring on top
Introduction
CMOS VLSI Design
The Integrated Circuit
1959: Jack Kilby, working at TI, dreams up the idea of a
monolithic “integrated circuit”
Components connected by hand-soldered wires and
isolated by “shaping”, PN-diodes used as resistors (U.S.
Patent 3,138,743)
Diagram from patent application
Introduction
CMOS VLSI Design
Integrated Circuits
1961: TI and Fairchild introduce the first logic ICs
($50 in quantity)
1962: RCA develops the first MOS transistor
Fairchild bipolar RTL Flip-Flop
Introduction
RCA 16-transistor MOSFET IC
CMOS VLSI Design
Computer-Aided Design
1967: Fairchild develops the “Micromosaic” IC using CAD
Final Al layer of interconnect could be customized for different
applications
1968: Noyce, Moore leave Fairchild, start Intel
Introduction
CMOS VLSI Design
RAMs
1970: Fairchild introduces 256-bit Static RAMs
1970: Intel starts selling1K-bit Dynamic RAMs
Fairchild 4100 256-bit SRAM
Introduction
CMOS VLSI Design
Intel 1103 1K-bit DRAM
4004
First microprocessor (1971)
For Busicom calculator
Characteristics
10 µm process
2300 transistors
400 – 800 kHz
4-bit word size
16-pin DIP package
Masks hand cut from Rubylith
Drawn with color pencils
1 metal, 1 poly (jumpers)
Diagonal lines (!)
Case Study: Intel Processors
CMOS VLSI Design
8008
8-bit follow-on (1972)
Characteristics
10 µm process
3500 transistors
500 – 800 kHz
8-bit word size
18-pin DIP package
Note 8-bit datapaths
Individual transistors visible
Case Study: Intel Processors
CMOS VLSI Design
8080
16-bit address bus (1974)
Used in Altair computer
(early hobbyist PC)
Characteristics
6 µm process
4500 transistors
2 MHz
8-bit word size
40-pin DIP package
Case Study: Intel Processors
CMOS VLSI Design
8086 / 8088
16-bit processor (1978-9)
IBM PC and PC XT
Revolutionary products
Introduced x86 ISA
Characteristics
3 µm process
29k transistors
5-10 MHz
16-bit word size
40-pin DIP package
Microcode ROM
Case Study: Intel Processors
CMOS VLSI Design
80286
Virtual memory (1982)
IBM PC AT
Characteristics
1.5 µm process
134k transistors
6-12 MHz
16-bit word size
68-pin PGA
Regular datapaths and
ROMs
Bitslices clearly visible
Case Study: Intel Processors
CMOS VLSI Design
80386
32-bit processor (1985)
Modern x86 ISA
Characteristics
1.5-1 µm process
275k transistors
16-33 MHz
32-bit word size
100-pin PGA
32-bit datapath,
microcode ROM,
synthesized control
Case Study: Intel Processors
CMOS VLSI Design
80486
Pipelining (1989)
Floating point unit
8 KB cache
Characteristics
1-0.6 µm process
1.2M transistors
25-100 MHz
32-bit word size
168-pin PGA
Cache, Integer datapath,
FPU, microcode,
synthesized control
Case Study: Intel Processors
CMOS VLSI Design
Pentium
Superscalar (1993)
2 instructions per cycle
Separate 8KB I$ & D$
Characteristics
0.8-0.35 µm process
3.2M transistors
60-300 MHz
32-bit word size
296-pin PGA
Caches, datapath,
FPU, control
Case Study: Intel Processors
CMOS VLSI Design
Pentium Pro / II / III
Dynamic execution (1995-9)
3 micro-ops / cycle
Out of order execution
16-32 KB I$ & D$
Multimedia instructions
PIII adds 256+ KB L2$
Characteristics
0.6-0.18 µm process
5.5M-28M transistors
166-1000 MHz
32-bit word size
MCM / SECC
Case Study: Intel Processors
CMOS VLSI Design
Pentium 4
Deep pipeline (2001)
Very fast clock
256-1024 KB L2$
Characteristics
180 – 90 nm process
42-125M transistors
1.4-3.4 GHz
32-bit word size
478-pin PGA
Units start to become
invisible on this scale
Case Study: Intel Processors
CMOS VLSI Design
Summary
104 increase in transistor count, clock frequency over 30
years!
Case Study: Intel Processors
CMOS VLSI Design
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