Proceedings of the International Conference on Electrical, Electronics, Computer Engineering and their Applications, Kuala Lumpur, Malaysia, 2014
Push-Pull Class-E Power Amplifier with a Simple Load Network Using an Impedance
Matched Transformer
Jinhee Kwon, Hwiseob Lee, Wooseok Lee, Mincheol Seo, and Youngoo Yang
School of Information and Communication Engineering, Sungkyunkwan University
Suwon, 440-746, Republic of Korea
yang09@skku.edu
I1
ABSTRACT
This paper presents a push-pull class-E power
amplifier based on a simple load network using the
impedance matched transformer. The proposed load
network consists of an impedance matched
transformer and series LC filter. The transformer
which is made of a ferrite core and an enamelcoated wire was used to match to the optimal load
impedance as well as to convert a balanced output
signal to a single-ended signal. The proposed power
amplifier achieved low second harmonic distortion
with push-pull structure and low third harmonic
using LC filter, which includes a shunt capacitor.
The designed and implemented power amplifier
showed an efficiency of 83.8% at an output power
of 37.4 dBm using 6.78 MHz input signal. At the
same output power level, the second and third
harmonic distortions are -43.58 dBc and -40.52
dBc, repectively.
KEYWORDS
Class-E power amplifier, switching amplifier,
transformer,
push-pull
amplifier,
harmonic
distortion
1 INTRODUCTION
Since the power amplifiers (PAs) dissipate
significant power in the transmitter, the PAs
have been designed for higher efficiency [1],
[2].
The switching mode amplifiers, such as
class–E and –D, can theoretically deliver 100%
efficiency by removing non-zero drain voltage
while they have non-zero current. Due to high
efficiency and simple design procedure, the
class-E PA has been widely used in many
applications [3]-[7]. However, when the
ISBN: 978-1-941968-02-4 ©2014 SDIWC
Z1
I2
+
+
V1
Z2 V2
-
N1
N2
Figure 1. Equivalent circuit of an ideal transformer.
transistor acts as a switch, it generates
undesirable harmonic distortion.
Many studies have been done on push-pull
structure to reduce harmonic distortion. Pushpull structure is capable of providing lower
even harmonics although more components are
needed [8]-[10].
In this paper, a push-pull class-E PA with a
simple load network is proposed using an
impedance
matched
transformer.
The
transformer is built by winding enamel-coated
wires around a ferrite core. It works as an
impedance transformer as well as a balun.
In addition, by applying dc supply voltage
through the center tap in the primary coil, RF
chokes can be eliminated. Series LC circuit
between transistor outputs is deployed not only
for filtering out the third harmonic signal but
also for a shunt capacitor at the fundamental
frequency.
The proposed push-pull class-E PA was
designed and implemented using a MOSFET.
The experimental results of the proposed PA
were compared to those from the previous
works.
2 IMPEDANCE MATCHED
TRANSFORMER
21
Proceedings of the International Conference on Electrical, Electronics, Computer Engineering and their Applications, Kuala Lumpur, Malaysia, 2014
I 2  I1 ( N1 / N2 ) .
(2)
Since Z2 = V2/I2 and Z1 = V1/I1, the
impedance ratio can be expressed using the turn
ratio of a transformer.
0
Insertion loss (dB)
Figure 1 shows an equivalent circuit of an
ideal transformer.
The voltage and current of an ideal
transformer is directly related to the ratio of the
winding turns as follows.
V2 V1 ( N2 / N1 ) ,
(1)
at 6.78 MHz
-0.34 dB (4:6)
-0.32 dB (6:9)
-5
-10
-15
4:6 transformer
6:9 transformer
-20
1
2
Magnitude difference (dB)
6
100
190
at 6.78 MHz
180.17 (4:6)
179.96 (6:9)
4
180
2
170
at 6.78 MHz
0.02 dB (4:6)
0.01 dB (6:9)
0
160
4:6 transformer
6:9 transformer
-2
1
Phase difference ()
Z1  N1 
(3)

 .
Z2  N2 
To match the impedance from 50 Ω to the
optimum load impedance using the transformer
without other matching circuits, the turn ratio of
2:3 was chosen in this work. Due to the
frequency-dependent permeability of the ferrite
core, an insertion loss becomes unacceptable at
high frequency. To keep a low insertion loss at
6.78 MHz, a ferrite having high permeability of
1,500 was selected. Inductances of the coils in
the transformer are also determined by a
permeability of the ferrite core and the number
of turns. To get an optimal load reactance
which is affected by the inductances of the
coils, the number of turns was adjusted.
To realize a turn ratio of 2:3, two
transformers were implemented and compared.
One has 4 primary turns and 6 secondary turns,
while the other has 6 primary turns and 9
secondary turns. The measured frequency
characteristics of the implemented transformers
are shown in Figure 2. Both transformers show
low insertion losses of about 0.3 dB, magnitude10j
differences of less than 0.02 dB and phase
differences of within ± 0.2° from 180°.
Figure 3 shows the measured impedances
looking into the implemented transformers and
the extracted optimum load impedance. From
the load-pull simulation, the optimum extracted
load impedance at 6.78 MHz is 22 + j*23 Ω for
the best efficiency. When the number of turns
are 6 and 9, the input impedance of the
transformer with 50  load is 22.3 + j*24.9 Ω-10j
a t 6.78 MHz whi c h i s ve r y c l ose t o t h e
10
Frequency (MHz)
(a)
150
10
100
Frequency (MHz)
(b)
50j
Figure 2. Measured performances of the implemented
transformers according to the frequency: (a) insertion
losses and (b) magnitude and phase differences
25j
2nd
100j
3rd
3rd
2nd
Fund
20.5 + j*14
Fund
22.3+j*24.9
Optimum load impedance
22 + j*23
4:6 transformer
6:9 transformer
10
25
50
100
250
Figure 3. Measured impedances looking into the
implemented transformers.
optimum load impedance. Hence, the 6:9
transformer is selected for the proposed PA.
ISBN: 978-1-941968-02-4 ©2014 SDIWC
22
-25j
-100j
Proceedings of the International Conference on Electrical, Electronics, Computer Engineering and their Applications, Kuala Lumpur, Malaysia, 2014
Differential
current
buffer
6.78 MHz
OSC
VGS2
10
Vdd
VGS2
VGS1
Output
Fund: shunt C
3rd harmonic: short
Vgs (V)
VGS1
VCC
15
Impedance
matched
transformer
VCC
Vdd
Output
-5
0
50
100
150
200
250
Time (nsec)
300
Figure 6. Measured voltage waveforms at the switching
transistors’ gates.
DC block
Vds (V)
30
Line: Simulated
Scatter: Measured
Vds
Ids
1.5
20
1.0
10
0.5
Ids (A)
Impedance
matched
transformer
9.89 V
0
Figure 4. Schematic diagram of the designed push-pull
class-E PA.
Fund :shunt C
rd
3 harmonic filter
Differential
current buffer
5
Figure 5. A photograph of the implemented push-pull
class-E PA
0
0
3 DESIGN OF THE PROPOSED POWER
AMPLIFIER
Figure 4 shows an overall schematic diagram
of the proposed push-pull class-E PA. The
proposed PA is driven by a differential current
buffer with a 6.78 MHz square wave. The
square wave is generated by an oscillator. The
differential buffer makes the single-ended to a
differential signal that has a peak voltage of 10
V.
A simple load network using the impedance
matched transformer is adopted for the
proposed push-pull class-E PA. The drain bias
voltage, VDD of 8 V, is applied through the
center tap of the transformer.
By adding an inductor to the shunt capacitor
in series, a series resonance at the 3rd harmonic
frequency was realized to suppress the 3 rd
ISBN: 978-1-941968-02-4 ©2014 SDIWC
50
100
150
200
Time (nsec)
250
0.0
300
Figure 7. Simulated and measured voltage and current
waveforms at the drain of the switching transistor.
harmonic signal. The LC circuit acts as a shunt
capacitor at the fundamental frequency.
4 IMPLEMENTATION AND
EXPERIMENTAL RESULTS
A photograph of the implemented push-pull
class-E PA is shown in Figure 5. The proposed
PA was implemented on a FR4 substrate using
Infineon’s low-cost switching MOSFET of
BSZ42DN25NS3.
Figure 6 shows the measured voltage
waveforms at the switching transistors’ gates.
These input signals with a peak voltage of
9.89V, which are generated by the differential
23
45
100
42
80
39
60
36
40
33
20
Pout
DE
30
5
6
DE (%)
Pout (dBm)
Proceedings of the International Conference on Electrical, Electronics, Computer Engineering and their Applications, Kuala Lumpur, Malaysia, 2014
0
7
8
9
10
Drain bias voltage (V)
(a)
11
Harmonics (dBc)
-35
Table 1. Performance comparison to the previous works
Device
Frequency
(MHz)
Pout (W)
VDD (V)
Efficiency (%)
Harmonics
(dBc)
[7]
[11]
MOSFET
GaN
This
work
MOSFET
13.56
13.56
6.78
15.66
N/A
84.6
1.6
20
82
5.5
8
83.8
N/A
N/A
2nd : -43.58
3rd : -40.52
-40.5 dBc respectively. Table 1 summarizes the
measured results of the proposed PA in
comparison to the previously published class-E
PAs.
-40
-45
5 CONCLUSIONS
-50
2nd
3rd
4th
-55
5
6
7
8
9
10
Drain bias voltage (V)
(b)
11
Figure 8. Measured performances according to the dc
supply voltage: (a) output power and drain efficiency, (b)
harmonic distortion.
current buffer circuit, are applied to the
switching transistors.
Figure 7 shows the simulated and measured
drain voltage and current waveforms for the
drain bias voltage, VDD, of 8V. The
measurement results are in good agreement
with those obtained from the simulation using
ADS. The simulated and measured peak drain
voltages are 23.3 V and 22 V, respectively.
The measured performances according to the
drain bias voltage of from 5 to 11 V are shown
in Figure 8. From the measurement results, the
implemented PA exhibited output power levels
of up to 10 W and efficiencies of from 81.6 to
84.2%.
It also showed that the second and third
harmonic distortion levels are less than -40 and
ISBN: 978-1-941968-02-4 ©2014 SDIWC
In this paper, we proposed a push-pull classE PA based on a simple load network using the
impedance matched transformer. The load
network employs a transformer which has coils
having 6 primary turns and 9 secondary turns
for optimal load impedance matching.
A 6.78 MHz input signal generated by an
oscillator is applied to the differential current
buffer which generates differential output
voltage. The implemented amplifier exhibited
very similar waveforms to the simulated ones.
For the dc supply voltage of from 5 V to 11
V, an output power of up to 10 W and a drain
efficiency of from 81.6 to 84.2% were achieved.
Due to the push-pull structure and resonant
third harmonic filter, the PA also showed low
harmonic distortion levels. The proposed PA
has a very simple structure and good
performances compared to the previously
published class-E PAs.
ACKNOWLEDGEMENT
This work was supported by the National Research
Foundation of Korea (NRF) grant funded by the Korean
government (MSIP) (2014R1A5A1011478).
24
Proceedings of the International Conference on Electrical, Electronics, Computer Engineering and their Applications, Kuala Lumpur, Malaysia, 2014
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ISBN: 978-1-941968-02-4 ©2014 SDIWC
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