Chapter 3
Single-Stage Amplifiers
Chen Xiaofei
2010 HUST
Chen Xiaofei
CMOS Chapter3
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Overview
•
Reading
– Chapter 3
•
Introduction
In this lecture, we study the low-frequency behavior of single-stage
CMOS amplifiers. Analyzing both the large-signal and the small-signal
characteristics of each circuit, we develop intuitive techniques and
models that prove useful in understanding more complex systems.
Following a brief review of basic concepts, we describe in this
chapter four types of amplifiers:
---Common-Source Amplifier
---Common-Gate Amplifier
---Source Followers
---Cascode
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CMOS Chapter3
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Table of Content
• Analog Design
• Common-Source Amplifier
• Source Followers
• Common-Gate Amplifier
• Cascode
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CMOS Chapter3
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Single-Stage Amplifiers
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3.1 Analog Design
Tradeoffs
Most of these parameters
trade with each other. Such
trade-offs lead to many
challenges in the
design of high performance
amplifiers.
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CMOS Chapter3
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DC and ac Analysis
• DC Analysis (Large-Signal Analysis)
--- Determine the exact biasing.
• ac Analysis (Small-Signal Analysis)
--- Obtain the expression of the voltage gain,
small-signal input and output impedance.
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3.2 Common Source
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CMOS Chapter3
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Common-Source Amplifier
Table of Content
• Common Source (CS) with Resistive Load
• CS stage with diode-connected MOS load
• CS with Current Source Load
• CS with Triode Region Load
• CS with source degeneration
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3.2.1 Common Source (CS) with Resistive Load
• Resistive Load is often used in high-speed circuit because of
the linearity of resistance, and also the output voltage swing
may reach up to VDD.
Fig. 3.1 (a) CS Stage; (b) input-output characteristic; (c) equivalent circuit in deep triode region
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DC Analysis
• DC Analysis (Large-Signal Analysis)
(1) When V in < VTH , M1 is in cut-off region, Id=0, Vout=VDD-IdRD=VDD
(2) When V in > VTH , and V in < V in1 , M1 is in saturation region.
Vout = VDD −
μnCox W
2
L
(Vin −VTH )2 RD
Here we have neglected channel length modulation.
(3) When Vin − VTH = Vout , M1 is at the boundary of saturation and triode regions.
μnCox W
Vin1 − VTH = VDD −
(Vin1 − VTH ) 2 RD
2 L
From which Vin1-VTH and hence Vout can be calculated.
1 + 4αVDD − 1
Vin1 =
+ VT H where
2α
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W
1
W
) RD = k PN ( ) RD
L
2
L
k P = μCox ....Technology parameter
1
2
α = μ nCox (
CMOS Chapter3
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DC Analysis (Cont.)
(4) For Vin > Vin1, M1 is in the triode region,
Vout = VDD −
μnCox W
2
L
2
RD[2(Vin −VTH )Vout −Vout
]
As VGS has less control on Id when transistor M1 works in triode region,
we usually leave M1 in saturation for a large voltage gain.
If Vin is high enough to drive M1 into deep triode region. Vout<<2(Vin-VTH),
and,
Vout = VDD
Ron
VDD
=
Ron + RD 1+ μ C W R (V −V )
n ox
D in
TH
L
In very deep triode range, Ron→0, Vout →0
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AC Analysis
• AC Analysis (Small-Signal Analysis)
(1) Derivation at the operation point
Assuming that the transistor is biased in strong inversion, active region
Vout = VDD −
μnCox W
2
L
(Vin −VTH )2 RD
Taking the derivative of Vout with respect to Vin, we get,
dVout
W
Av =
= −RDμnCox (Vin −VTH ) = −gmRD
dVin
L
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AC Analysis (Cont.)
(2) Finding the gain using the small-signal equivalent circuit
Fig. 3.2 (a) CS Stage;
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(b) small-signal equivalent circuit
CMOS Chapter3
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AC Analysis (Cont.)
(3)
Intuitive observation
Av = − g m RD
This result can be directly derived from the observation that
M1 converts an input voltage change ΔVin to a drain current
change gm ΔVin , and hence an output voltage change - gmRD
ΔVin .
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AC Analysis (Cont.)
• Taking the effect of channel length modulation in M1 into account,
the small-signal equivalent circuit is modified as following,
Fig.3.3 small-signal equivalent circuit including the output resistance of M1
Av = −gm (RD ro )
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Intrinsic Gain
• Intrinsic Gain
If RD=∞, then
Av = −gmro
called the “intrinsic gain” of a transistor, this quantity
represents the maximum voltage gain that can be
achieved using a single device. For ideal long-channel
device, ro→ ∞, intrinsic gain → ∞; however, in today’s
Fig 3.4
CMOS technology, intrinsic gain of short-channel device
is between roughly 10 and 30. Thus, we usually assume 1/gm << ro .
Question?: In Fig.3.4, Kirchhoff’s current law (KCL) requires that ID1 = I1. Then, how
can Vin change the current of M1 if I1 is constant?
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Common-Source Amplifier
Table of Content
• Common Source (CS) with Resistive Load
• CS stage with diode-connected MOS load
• CS with Current Source Load
• CS with Triode Region Load
• CS with source degeneration
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3.2.2 CS stage with diode-connected MOS load
A MOST can operate as a small-signal resistor if its gate and drain are shorted,
called “diode-connected”.
•
what is the impedance of the following circuit seen from the source side of
transistor M1?
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The small-signal equivalent resistance of diodeconnected MOS load
is = −gmvgs − gmbvb s + vs gds
= gmvs + gmbvs + gdsvs
= (gm + gmb + gds )vs
Seen from source terminal, the small signal conductance is given by
is
yin = = ( g m + g mb + g ds )
vs
or, the resistance is
rin =
1
1
1
=
≈
ym g m + g mb + g ds g m + g mb
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CMOS Chapter3
(1/gm << ro)
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Gain (Av)
Av = − gm1
1
gm1 1
=−
gm2 1 + η
gm2 + gmb2
(W / L)1 1
Av = −
(W / L)2 1 + η
un (W / L)1
Av = −
up (W / L)2
Gain is independent of bias current!
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Voltage swing constraint
I D1 = I D 2 , ∴
⎛W⎞
⎛W ⎞
2
un
(VGS1 − VTH1 ) = up
(VGS2 − VTH2 )2
⎝ L ⎠1
⎝ L ⎠2
un (W / L)1 | V GS2 − VTH2 |
Av = −
=
up (W / L)2 (VGS1 − VTH1 )
This implies substantial voltage swing constraint.
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Advantage of CS with diode-connected load
• Advantage of CS with diode-connected load: linearity
(W / L)1 1
Av = −
(W / L)2 1 + η
This equation imply: if the variation of ηwith the output voltage
is neglected, the gain is independent of the bias currents and voltages
(so long as the M1 stays in saturation. In other words, as the input
and output signal levels vary, the gain remains relatively constant,
indicating that the input-output characteristic is relatively linear.
• Homework: Please do large-signal analysis of this circuit to
determine the biasing range.
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Large-signal analysis
Vin − VTH ≤ Vout ≤ Vout max
Vout
Vout,max
=VDD-VTH
VTH ≤ Vin ≤ Vin ,max
Vout=Vin-VTH
Vout,swing
At point P,
Vout,min=
Vin,max-VTH
P
I1 =
VTH
Vin,max’
Vin
Vin,swing
=
2
1
⎛W ⎞
μnCOX ⎜ ⎟ (Vin ,max − VTH )
2
⎝ L ⎠1
1
μnCOX
2
I 2 = I1 =
1
μnCOX
2
⎛W ⎞ 2
⎜ ⎟ Vout ,min
⎝ L ⎠1
2
⎛W ⎞
−
V
V
⎜ ⎟ ( GS 2 TH )
⎝ L ⎠2
2
1
⎛W ⎞
= μnCOX ⎜ ⎟ (VDD − Vout ,min − VTH )
2
⎝ L ⎠2
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Example: CS with any type of load
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Example: CS with any type of load (cont.)
• Loads in series :
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Example: CS with any type of load (cont.)
• Loads in parallel :
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Example 3.3
What is the voltage gain of the amplifier ?
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Common-Source Amplifier
Table of Content
• Common Source (CS) with Resistive Load
• CS stage with diode-connected MOS load
• CS with Current Source Load
• CS with Triode Region Load
• CS with source degeneration
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3.2.3 CS with Current Source Load
Av = −gm ro1 || ro2
Assuming ro2 large,
⎛
⎜
⎜
ox D ⎜
⎝
W ⎟⎞ 1
⎟
Av = −gmro1 = − 2 μn C I
L ⎟⎠ 1 λI D
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CS with Current Source Load (cont.)
• Discussions:
(1) Gain increasing:
a) increase ro1 and ro2 ,
1
ro1 =
λID
1
λ∝
L
ro ∝
so increase L is an effective method.
b) increase gm1,
g m1 = μnCox
L
ID
W
(VGS − VTH )
L
Increasing W while keeping the Vov and L constant, gm1 increases.
Note: increasing Vov is no use, as I D ∝ (VGS − VTH ) 2
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CS with Current Source Load (cont.)
• (2) Design consideration:
a) When requiring a large voltage gain, we usually design the
device with a large L2 of load M2 and a large W1 of M1, large
L1 is not must.
b) If L1 is scaled by a factor n (>1), then W1 may need to be
scaled proportionally as well. This is because, if W1 is not
scaled, the overdrive voltage increases, limiting the output
voltage swing.
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CS with Current Source Load (cont.)
• Classroom Exercise: Please do large-signal analysis of this
circuit to determine the biasing range.
• Advantage of CS with current source Load : the output
impedance and the minimum required VDS of M2 are less
strongly coupled than the value and voltage drop of a resistor.
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Common-Source Amplifier
Table of Content
• Common Source (CS) with Resistive Load
• CS stage with diode-connected MOS load
• CS with Current Source Load
• CS with Triode Region Load
• CS with source degeneration
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3.2.4 CS with Triode Region Load
Av = −gm RON2
RON 2 =
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1
μ pC
CMOS Chapter3
⎛W
ox ⎜⎜
⎝ L
⎞
⎟⎟
⎠2
(VDD − Vb − | VTHP |)
34
Common-Source Amplifier
Table of Content
• Common Source (CS) with Resistive Load
• CS stage with diode-connected MOS load
• CS with Current Source Load
• CS with Triode Region Load
• CS with source degeneration
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CS with source degeneration
•
•
•
•
•
•
•
•
•
The transconductance of the circuit---Gm
The small-signal equivalent circuit（ Assuming λ =γ = 0 ）
Linearity discussion
Intuitive analysis and large-small characteristic
Example 3.5
Gm （ λ ≠ 0 ，γ ≠ 0 ）
Output Resistance
Gain (Av)
Example 3.6
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3.2.5 CS with source degeneration
• In some applications, the square-law dependence of the drain
current upon the overdrive voltage introductions excessive
nonlinearity, making it desirable to “soften” the device
characteristic.
• In 3.2.2, we noted the linear behavior of a CS stage using a
diode-connected load, but this topology has substantial voltage
swing constraint.
• Some other method?
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The transconductance of the circuit---Gm
•Define: Gm----the transconductance of the circuit when the output is
shorted to ground.
Gm =
∂V
∂I D
∂I ∂V
= D ⋅ GS = g m GS
∂Vin ∂VGS ∂Vin
∂Vin
VGS = Vin − I D RS
∂VGS
∂I
= 1 − D RS = 1 − Gm RS
∂Vin
∂Vin
Gm = g m (1 − Gm RS )
Gm =
gm
1 + g m RS
g m RD
AV = −Gm RD = −
1 + g m RS
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The small-signal equivalent circuit
If we ignore λ and γ :
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Linearity discussion
•
With source degeneration, the transconductance is more linear !!
As Rs increases, Gm becomes a weaker function of gm and hence the
drain current.
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Intuitive analysis and large-small characteristic
− g m RD
RD
Av =
=−
1 + g m RS
1 / g m + RS
Drain current and transconductance of a CS device (a) without and (b) with source degenaration.
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Example 3.5
•
Assuming λ =γ = 0 for both M1 and M2. Calculate the small signal gain.
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Example 3.5 (cont.)
• Recall the result from common source stage with source
degeneration :
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Gm of CS with source degeneration
• What is the transconductance of the circuit (Gm) if we do not
ignore λand γ ?
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Gm of CS stage with source degeneration (cont.)
or,
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Gm =
g m ro
Rs + [1 + ( g m + g mb ) Rs ]ro
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Output Resistance
•Another importance consequence of source degeneration is the increase of the
output impedance of the stage.
rout = [1 + ( g m + g mb )ro ]Rs + ro
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Gain (Av)
Av =
vout
g m ro RD
=−
vin
RD + Rs + ro + ( g m + g mb ) Rs ro
Av = −Gm ( RD || rout )
Lemma: In a linear circuit, the voltage gain is equal to -GmRout
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Example 3.6
Av = −Gm RD || rout
gm ro
Gm =
RS + [1+ (gm + gmb )RS ]ro
RD || rout = ∞ || {[1 + ( g m + g mb )ro ]Rs + ro }
Av = −gmro
!
Why? Please explain this result.
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Homework2
• Exercises: 3.1 3.2 3.3 3.12
3.14
• Reading: Chapter3 3.3
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Table of Content
• Analog Design
• Common-Source Amplifier
• Source Followers
• Common-Gate Amplifier
• Cascode
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3.3 Source Follower (Common Drain Amplifiers)
• Our analysis of the CS stage indicates that, to achieve a high
voltage gain with limited supply voltage, the load impedance
must be as large as possible. If such a stage is to drive a lowimpedance load, then a “buffer” must be placed after the
amplifier so as to drive the load with negligible loss of the
signal level. The source follower (also called the commondrain stage) can operate as a voltage buffer.
• The common drain stage exhibits high input impedance and
low output impedance. After an analysis of relevant port
characteristics, we will discuss some potential applications and
also drawbacks of this circuit.
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Source Follower (cont.)
Input terminal: gate; output terminal: source.
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Large signal behavior
• Large signal behavior
•
•
•
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When Vin<VTH, M1 is off, and
Vout is 0.
When Vin>VTH, M1 turns on in
saturation. As Vin increases
further, Vout follows Vin with a
difference of VGS.
When Vin increases to a certain
voltage (exceeding VDD), M1
enters triode region, the output
voltage flattens out and clips at
VDD.
53
Small signal analysis
• Small signal analysis
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Small signal analysis (cont.)
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Small signal analysis (cont.)
Av =
gm
1
gm +
RLtot
RLtot = Rs
1 1
g ds g m b
• Interesting cases
– Rs→∞, ro→∞, gmb=0
• PMOS, source tied to body, ideal current source
– Rs→∞, ro→∞, gmb≠0
• NMOS, ideal current source) (typically ≅ 0.8)
– ro→∞, gmb=0, Rs finite
• PMOS, source tied to body, load resistor
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Small Signal Output Resistance
• Small signal diagram for calculating output resistance
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Small Signal Output Resistance (cont.)
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Application 1: Level Shifter
• Output quiescent point is roughly VTH+Vov lower than input
quiescent point
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Application 2: Buffer
•
Low frequency voltage gain of the above circuit is ~gmRbig
– Would be ~gm(Rsmall||Rbig) without CD buffer stage
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Issues
• Several sources of nonlinearity
– VTH is a function of Vo (NMOS, without S to B connection)
– ID and thus Vov changes with Vo
! Gets worse with small RL
•
Reduced input and output voltage swing
– Consider e.g. VDD=1V, VTH=0.3V, VOV=0.2V
! CD buffer stage consumes 50% of supply headroom!
– In low VDD applications that require large output swing, using a CD
buffer is often not possible
– CD buffers are more frequently used when the required swing is small
! E.g. pre-amplifiers or LNAs that turn μV into mV at the output
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Homework 3
• Exercises: 3.15
• Reading: Chapter3 3.4
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Table of Content
• Analog Design
• Common-Source Amplifier
• Source Followers
• Common-Gate Amplifier
• Cascode
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3.4 Common Gate Stage
Fig.1 CG stage with (a) direct coupling at input (b) capacitive coupling at input.
•
In a common-gate amplifier, the input signal is applied to the source
terminal, as is shown in Fig.1. It senses the input at the source and generate
the output at the drain. The gate is connected to a dc voltage to establish
proper operating conditions. Note that in Fig.1(b) the bias current of M1
flows through the input signal source.
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Large signal behavior
•
•
When Vin>VB-VTH, M1 is off, and Vout is VDD.
As Vin decreases, so does Vout, M1 is in saturation until
•
After that, M1 is driven into the triode region.
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Small signal analysis (1)---- CG Current Transfer
Define: gm’ = gm + gmb
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CG Current Transfer (cont.)
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Small signal analysis (2)---- Voltage Gain
vout
( g m + g mb )ro + 1
=
RD
Av =
vin ro + ( g m + g mb )ro RS + RS + RD
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Small Signal Input Resistance
RD itst + ro [itst − ( g m + g mb )vts t ] = vtst
Thus,
rin =
vtst
RD + ro
=
itst 1 + ( g m + g mb )ro
RD
1
≈
(1 +
) (If (gm+gmb)ro>>1)
ro
( g m + g mb )
Two interesting cases:
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– RD<<ro:
rin ≈
1
( g m + g mb )
– RD>>ro:
rin ≈
RD
( g m + g mb )ro
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Small Signal Output Resistance
rout = [1 + ( g m + g mb )ro ]RS + ro
(Very high if (gm+gmb)RS>>1
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CG Summary
• Current gain is unity up to very high frequencies
• Input impedance is very low
– At least when the output is also terminated with some
reasonable impedance
• Can achieve very high output resistance
• In summary, a common gate stage is ideal for turning a decent
current source into a much better one
– Seems like this is something we can use to improve our
common source stage
• Which is indeed nothing but a decent (voltage
controlled) current source
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Homework 4
• Reading: Chapter3 3.4
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Table of Content
• Analog Design
• Common-Source Amplifier
• Source Followers
• Common-Gate Amplifier
• Cascode
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Overview
• We will cover different cascode amplifiers, including
– 1. Simple cascode amplifier
– 2. Multi-level cascode amplifier
– 3. Folded cascode amplifier
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Simple cascode amplifier
• Large signal behavior (Vin fixed to VG1, Vout (VDS) sweeping from 0 to 3V)
Simple cascode amplifier
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Region I: M1B and M2B both in triode; Region II, M1B in
saturation, M2B in triode; Region III, M1B and M2B both
in saturation
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Small Signal Output Resistance
rout = [1 + ( g m 2 + g mb 2 )ro 2 ]ro1 + ro 2
≈ [ro1ro 2 ( g m 2 + g mb 2 )]
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Transconductance Gm
iout
iout = g m1vin
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ro1
= g m1vin
1
ro1 +
ro 2
g m 2 + g mb 2
Gm =
ro1
1
ro1 +
ro 2
g m 2 + g mb 2
g m1ro1[ro 2 ( g m 2 + g mb 2 ) + 1]
ro1ro 2 ( g m 2 + g mb 2 ) + ro1 + ro 2
= g m1[1 −
CMOS Chapter3
g ds1
]
g m 2 + g mb 2 + g ds 2 + g ds1
77
Transconductance Gm (cont.)
• Observation: Compared with a single-transistor common source
amplifier with a transconductance of |Gm|=gm1 (Note that Gm is the
transcoducance of the amplifier, and gm is the transcoducance of the
transistor), the transcoductance of cascode amplifier is slightly less,
whose transconductance Gm is given by
g ds1
Gm = g m1[1 −
] = (90% ~ 99%) g m1
g m 2 + g mb 2 + g ds 2 + g ds1
• DC voltage gain (when the output is open)
Av = −Gm rout = − g m1ro1[( g m 2 + g mb 2 )ro 2 + 1]
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Multi-level cascode amplifier
•
Triple cascode amplifier
rout = ( g m 3 + g mb 3 ){[1 + ( g m 2 + g mb 2 )ro 2 ]ro1 + ro 2 }ro 3 + ro 3
g ds1
]
Gm ≈ − g m1[1 −
g m 2 + g mb 2 + g ds 2 + g ds1
Av = g m1ro1[1 + ( g m 2 + g mb 2 )ro 2 ][( g m 3 + g mb 3 )ro 3 + 1]
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Supply Headroom Issue
• Even if we adjust VB such
that VDS1 is small, adding
a cascode reduces the
available signal swing
• This can be a big issue
when designing circuits
with VDD ≅ 1V
– Typically need each
VDS > ~0.2V
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Folded-cascode amplifier
Fig.1 (a) Simple folded cascode, (b) folded cascode with proper biasing, (c) folded
cascode with NMOS input
•
Why choose folded-cascode amplifier instead of telescopic configuration?
– More freedom to choose the DC input voltage at vin (such as Fig. 1(a)).
– Convenience in shorting the input and the output in feedback
configurations.
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Large signal behavior
Fig. 2 Large-signal characteristics of folded cascode
•
Suppose in Fig.1(b), I1 is the current flowing through M3 and is equal to the
sum of ID1 and ID2.
– Vin > VDD-|VTH1|, M1 is off and M2 carries all of I1, yielding Vout=VDD-I1RD.
– For Vin<VDD-| VTH1 |, M1 turns on in saturation.
– As Vin drops, ID2 decreases further, falling to zero if ID1=I1 (Vin=Vin1).
– If Vin<Vin1, M1 enters triode.
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Small signal Analysis
• The small-signal operation is as follows: If vin becomes more
positive, |id1| decreases, forcing id2 to increase and hence vout to
drop. The voltage gain and output resistance of the circuit can
be obtained as calculated for the telescopic-cascode. This
approximation approach is sufficient, because, in fact, current
source Iss is a MOS constant current source and it’s output
resistance is very large, while CG stage’s input resistance is
relatively small, thus the shunting of Iss from the small-signal
current can be ignored.
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Folded-cascode amplifier summary
• Why choose folded-cascode amplifier instead of
telescopic configuration?
– More freedom to choose the DC input voltage at vin
(such as Fig. 1(a)).
– Convenience in shorting the input and the output in
feedback configurations.
• Disadvantages:
-- The total bias current in folded-cascode amplifier
must be higher than that in telescopic configuration to
achieve comparable performance.
-- Other disadvantages will be discussed in Chapter 6.
Chen Xiaofei
CMOS Chapter3
84
Homework 5
• Exercises: 3.19 (a) (d)
3.20 (a) (b) (c)
3.21 (a) (b) (c) (d)
3.24
• Reading: Chapter4
Chen Xiaofei
4.1 4.2
CMOS Chapter3
85