Data Acquisition
ET 228
DC Performance
Chapter 9.0 – 9.10
• Input Bias and Offset Currents
• Effect of Bias Currents on Output Voltage
• Effect of Offset Currents on Output Voltage
• Input Offset Voltage
• Input Offset Voltage for Adder Circuit
• Nulling-Out Effect of Offset Voltage & Bias
Currents
• Drift
• Measuring of Offset Voltage & Bias Currents
• Differential Op-Amps and CMRR/CMR

Data Acquisition
ET 228
DC Performance
Chapter 9.0 – 9.10
• Characteristics
• Op amps are widely used to amplify AC and DC signals and outputs are effected by errors
• Errors due to non ideal characteristics of Op amps
• Ideally DC Output should be equal to the Input times the amplifiers closed-loop-gain
• Factors that effect DC output signals
• Input Bias and Offset Currents
• Input Offset Voltage
• Drift
• See Table 9-1 on page 254
• Input Bias and Offset Currents
• Input Bias Currents
• Base and Collector currents required by transistors on the Op amps input - See Figure 9-1 on page 255

Data Acquisition
ET 228
DC Performance
Chapter 9.0 – 9.10
• Input Bias and Offset Currents
• Input Bias Currents
• Both inputs will have a bias current and they usually aren’t equal. I
B+ and I
B-
Usually specified as the average
I
B
= (|I
B+
| and |I
B-
| )
2
• Typical Ranges of I
•
B
General Purpose Op amps -- 1 A
• Op amps wit FET inputs -- 1pA
• Electrometer Op amps -- 60 x 10 -15 A
• Input Offset Current
• Equals the difference between the two input bias currents
I
OS
= | I
B+
| - | I
B-
|
• Typically les than 25% of I
B

Data Acquisition
ET 228
DC Performance
Chapter 9.0 – 9.10
• Input Bias and Offset Currents
• Input Offset Current
• Example Problem 9-1 on page 256
• Related Chapter Problem 9-2 on page 272
• Effect of Bias Currents on Output Voltage
• Simplify Assumption - All considered factors of output error are assumed to be acting alone
• Effect of (-) Input Bias Current
• Basic Voltage Follower Amp -- Fig 9-2a
• Assume I
B+
=0
• Assume Input Offset voltage is zero
•
• Assume the E i
V
R f
O source has zero DC resistance becomes what ever is necessary to deliver I
Bamps through

Data Acquisition
ET 228
DC Performance
Chapter 9.0 – 9.10
• Effect of Bias Currents on Output Voltage
• Effect of (-) Input Bias Current
• Basic Inverting Amp -- Fig 9-2b
• Assume I
B+
=0
• Assume Input Offset voltage is zero
• Assume the E i source has zero DC resistance and 0 volts
• Assume the E d
= zero
•
• V
O becomes what ever is necessary to deliver I
B-
No current through R i through R since no voltage drop across it f
• Example 9-2 on page 257
• Related Problems 9-3 and 9-5 on page 272
• Effect of (+) Input Bias Current
• Assumptions- See Fig 9-3 on page 258
• R f
= 0
• Assume the E i
= 0

Data Acquisition
ET 228
DC Performance
Chapter 9.0 – 9.10
• Effect of Bias Currents on Output Voltage
• Effect of (+) Input Bias Current
• Assumptions - See Fig 9-3 on page 258
• V
O becomes what ever is necessary to deliver I
B+
• See Example 9-3 on page 258 through R
G
• Related Chapter Problem 9-4 on page 272
• Effect of Offset Currents on Output Voltage
• Current Compensating the Voltage Follower
• See Fig 9-4a
V
O
= R
G
(| I
B+
| - | I
B-
|) = R
G
I
OS
= 0 for | I
B+
| = | I
B-
| and R
G
= R f
• Current Compensating Other Amplifiers
• Inverting Amplifiers
• See Figure 9-4b on page 259

Data Acquisition
ET 228
DC Performance
Chapter 9.0 – 9.10
• Effect of Offset Currents on Output Voltage
• Current Compensating Other Amplifiers
• Inverting Amplifiers
• Resister R should always be added to the (+) Input
» R = R i
|| R f
• Non Inverting and General case
• If more than one resistor connected to (+) Input
» Assume all voltage sources replaced by DC resistance
» Assume Output terminal is ground reference
» DC resistance from both the (+) and (-) input terminals to ground reference should be equal
• Example Problem 9-4 on page 260
• Similar Chapter Problems 9-6 through 9-8
• Input Offset Voltage
• Model Circuit and Definition
• See Figure 9-5 on page 261

Data Acquisition
ET 228
DC Performance
Chapter 9.0 – 9.10
• Input Offset Voltage
• Model Circuit and Definition
• With the Circuit in 9-5a V
O small value should be 0 volts but it has some
• Due to the net effect of all the internal imbalances inside the
Op amp
• Polarity varies per individual Op amp
• Model as an input on the (+) terminal called V io
- Fig 9-5b
• Measurement of Input Offset Voltage
• See Fig 9-6 to measure V io
V io
= V
O
/(1+ R f
/R i
)
• Example Problem 9-5 on page 262
• Similar Chapter Problems 9-6 through 9-8

Data Acquisition
ET 228
DC Performance
Chapter 9.0 – 9.10
•
• Input Offset Voltage can over come small inputs in an adder
• See Figure 9-7 on page 264
• Gain on the Offset goes up with the addition of an input thus the error component of the output increases
•
• Design or analysis sequence to minimize DC errors
• Select a bias compensating resistor (Per Section 9-4.3)
• Select an Op amp with a small enough Input Offset voltage
• If not available follow the nulling procedure on page 267

Data Acquisition
ET 228
DC Performance
Chapter 9.0 – 9.10
•
• The offset currents and voltages will change over time due to:
• Component aging
• Temperature changes
• Power Supply Voltage changes
• Changes due to Supply Voltage Changes can be minimized by using well regulated power supplies
• Minimize changes due to temperature changes by:
• Holding ambient temperature constant
• Selecting Op amps with offset voltages and currents that have minimal changes with temperature changes
• Example Problem 9-6 on page 268

Data Acquisition
ET 228
DC Performance
Chapter 9.0 – 9.10
• Measuring of Offset Voltage & Bias Currents
• V io
• R i
- use circuit in Fig 9-10a and R f are small
• Adding small R for current compensation minimizes the effect of I
OS
• V io
= V
O
/[(R on the output voltage f
+ R i
)/ R i
]
• I
B-
- use circuit in Fig 9-10b
• I
B-
= (V
O
- V io
)/ R f
• I
B+-
- use circuit in Fig 9-10c
• I
B+
= -(V
O
- V io
)/ R f
• Example Problem 9-7 on page 270
• Differential Op-Amps
• Key Aspects
• Basic Differential Circuits

Data Acquisition
ET 228
DC Performance
Chapter 9.0 – 9.10
• Differential Op-Amps
• Key Aspects
• Common Mode Voltage
• Common Mode Rejection
• Basic Differential Circuits
• Characteristics
• Can measure and amplify small signals buried in much larger signals
• Simple construction using precession resistors - See page 218
• Voltage Out
• m(E
1
-E
2
)
• Superposition analysis
» V
OE2
= - mE
2
= - [mR/R]E
2
» V
OE1
» V
O
= [mR/(R+mR)] x E
= mE
1
- mE
2
= m(E
1
1
- E
2 x [(R + mR)/R] = mE
)
1

Data Acquisition
ET 228
DC Performance
Chapter 9.0 – 9.10
• Differential Op-Amps
• Common Mode Voltage
• Characteristics
• V
O should be ZERO when E
• Can be found using
1
= E
2
• V d
= E
1
- E
2
E cm

E
1

E
2
2
• Common Mode Rejection (CMR)
• Can be expressed in dBs or as a ratio CMR Ratio (CMRR)
CMRR

A
A
V
V ( d
( cm
)
)
V
O

V
O
V d
( cm )
V i ( cm )
CMR

20 Log { CMRR }

Data Acquisition
ET 228
DC Performance
Chapter 9.0 – 9.10
• Differential Op-Amps
• Common Mode Rejection Ratio (CMRR)
• Usually greater than 100dB for Op amps
• OP-177 has a CMRR of 130dB
• CMR = 20 log (CMRR) aka CMRR in dB
See Lab 22 handout