Department of Electrical Engineering
ESE572/ESE419: Analog Integrated
Circuits
Fall 2007
Do not print copies of this material on the CETS printers.
Description
Design of analog circuits and subsystems using bipolar and MOS technologies at the
transistor and higher levels. Transistor level design of building block circuits such as op
amps, comparators, sample and hold circuits, voltage and current references, capacitors
and resistor and class AB output stages. Using these elemental circuits, the design and
implementation of mixed signal monolithic filters and oscillators are discussed. The
graduate course relies heavily on Spice simulation and will require some use of CAD
systems to generate integrated circuit layouts as part of a capstone project.
General Information
Instructor:
Professor: D. Nelson, Ph.D.
Innovative Wireless Technologies
Reading, PA
Phone : 610-966-1401 or 610-462-2475 (cell)
Tuesdays: 215 573-2812
email : dnelson4@seas.upenn.edu
TA
tba
Lecture Time and Location
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Tuesday, 4.30 to 7:30 pm, Room tbd
Office Hours
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Hour before every class in the Towne 276; constant availability by email.
Prerequisite
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For ESE419: ESE319
ESE572: Mature understanding of electronic circuits and devices
Main texts
1. "Analysis and Design of Analog Intergrated Circuits", Gray, Hurst, Lewis, and
Meyer, Fourth Ed. J. Wiley Publ. New York
Additional texts
1. "Analog Integrated Circuit Design" by David A. Johns and Ken Martin, J. Wiley
Publishers.
2. "Design of Analog CMOS Integrated Circuits" by Behzad Razavi, 1st Ed,
McGraw Hill
3. "CMOS Analog Circuit Design" by P. Allen and D. Holberg, 2nd Ed., Oxford
University Press, Oxford, New York
4. "Mixed analog-digital VLSI devices and technology", Y.P. Tsividis, McGraw
Hill, 1996
5. "Analog Integrated Circuits" (collection of papers), edited by P.R. Gray, R.G.
Meyer and R.W. Brodersen, IEEE Press.
Syllabus
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Introduction to mixed signal applications and functions
MOS transistor models and passive components
Feedback and sensitivity
Operational amplifiers
Other analog functions
Continuous-time and sampled data circuits
Behavioral modeling of mixed-signal circuits
Design Project
Policies
Grading policy:
The final grade will be based on homeworks, one midterm, a capstone project and the
final exam, according to the following weights:
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Homeworks: 25%
Midterm: 20%
Project: 25%
Final: 30%
There will be two midterms. The examinations will be closed book. Using or attempting
to use unauthorized assistance, material or study aids in examinations is a violation of the
Code of Academic Integrity and will result in a zero grade for the exam. This exam will
not be dropped for the calculation of the overall grade.
Collaboration: you are allowed to work in groups and discuss the approach to the
solutions of the assignments. However, each has to write up his own solution and fully
understand them. The same is true for the computer assignments. Each has to write the
input code, run the simulations and give a brief discussion about it.
Solutions to midterms will be distributed when the exams are returned, usually within one
week of the exam.
Questions about grading of the midterm must be presented to the instructor within one
week after the homeworks or tests have been returned. After this week, no changes of
grade will be made.
Lab Homework
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Cadence Design System, Circuit Simulation with Spectre
Project
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Final project for Fall 2007 will be assigned in class
MOS models for MOSIS (to be used for homework and projects)
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Level49 MOS Model Files to be used for the project
Level3 MOS models (for hand calculations)
Old Exams
Exam Dates
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To be announced
Any questions: Email Dale Nelson at <dnelson4@seas.upenn.edu
First Created by J. Van der Spiegel: August 16, 1997;
Updated by Sameer Sonkusale 17th November 2001
Updated by D. Nelson 19 August 2004, 13 Sept. 2005, 1 Nov. 2005, 27 Apr. 2007