Laboratory 4
Diode Applications
OBJECTIVES
To investigate the full-wave bridge rectifier, the DC restorer, and the voltage doubler
circuits. To learn to select a filter capacitor C to meet prescribed specifications on the
ripple voltage of a bridge rectifier.
BACKGROUND
Bridge rectifier with filter capacitor
Fig. 4-1 depicts a full wave diode bridge rectifier with a filter capacitor. The diode
bridge consists of four diodes D1, D2, D3, and D4. The resistor R is the load resistor and
the capacitor C is the filter capacitor. The ac signal to be rectified, v(t) = Vmcos(2πft), is
fed to the bridge by a transformer.
Fig.4 -1: Full-wave bridge rectifier with filter capacitor
Let us first assume that the filter capacitor C is not present. Diodes D1 and D2 conduct
during the positive half-cycle of the ac source. Diodes D3 and D4 conduct during the
negative half-cycle of the ac source. The diode polarities are such that the voltage vo(t)
across the load is always positive. The full-wave rectified signal is depicted in Fig. 4-2.
The peak value Vp of this rectified sinusoid is about 1.4V lower than Vm due to the
voltage drops across two conducting diodes. The period of the full-wave rectified signal
is T/2, where T = 1/f and f is the frequency of the ac source.
Let us now assume that a suitably large filter capacitor C (with zero initial voltage across
it) is placed across the load resistor. During the positive half-cycle (D1, D2 conducting)
the capacitor charges up to the peak voltage Vp as the ac source voltage climbs to its peak
value Vm. When the source voltage drops below Vm, the diodes D1 and D2 become
reverse-biased and turn off. The capacitor then discharges through the load resistor R.
The capacitor voltage decays exponentially from its initial value Vp to a final value of
αVp as depicted in Fig. 4-2 (note that 0< α < 1). At this final instant, the source voltage
is large enough in magnitude to forward bias the diodes D3 and D4. The capacitor again
charges up (sinusoidally) to the peak value of Vp. When the source voltage drops from
its peak, the diodes cut off, and the capacitor again begins to discharge exponentially.
The conduction period tx of the diodes is indicated in Fig. 4-2. The load voltage
(depicted in Fig. 4-2 with a heavy line) consists of exponential decays followed by
sinusoidal rises, and is relatively smooth. The filter capacitor thus smoothens the load
voltage. The load voltage ripple is Vp - αVp = (1-α)Vp. If the time constant τ = RC is
large relative to T/2, the ripple voltage will be small. Given a load resistance R, the filter
capacitance C can be selected to keep the ripple voltage as low as desired. For example, if
10% ripple can be tolerated, a value of C can be chosen to yield α = 0.9.
Fig. 4-2: Output voltage waveforms of full-wave rectifier
The DC restorer circuit
Fig. 4-3 depicts a DC restorer circuit. Consider a periodic input signal v(t) which varies
Fig. 4-3: DC restorer circuit
between voltage levels -V1 and V2, where V1 is a positive voltage. Neglecting the
voltage drop across the diode, we see that the capacitor voltage reaches vc = V1 during the
negative half cycle. Now, the output voltage is vo = v(t) + vc. Thus the output voltage vo
varies between zero and V1+V2. The output voltage is thus always positive. Due to the
diode drop, the lowest peak of the output voltage is clamped to about -0.7V rather than
0V.
Voltage doubler circuit
Fig. 4-4 depicts a voltage doubler circuit. The input signal is a sinusoid that varies
between voltage levels -Vp and Vp. Assuming ideal diodes, the output signal is vo = -2Vp
(a DC voltage equal to twice the amplitude of the input signal). The first stage is a DC
restorer; the voltage vd varies sinusoidally between 0 and 2Vp. The second stage is a
peak rectifier ⎯ the capacitor voltage is thus vc = 2Vp. The output voltage of the circuit
is thus vo = -2Vp.
Fig. Error! No text of specified
style in document -3: DC
Fig. 4-4: Voltage doubler circuit
PRELAB
1. Assume that a full-wave diode bridge rectifier feeds a 1 kΩ resistive load, and that the
peak value of the load voltage waveform is Vp volts. Use your knowledge of RC
circuit response to select a filter capacitor which when placed in parallel with the load
would smooth the load voltage waveform, causing it to vary between Vp and 0.9Vp
volts. Show all your design work.
2. Simulate the full-wave rectifier (without the filter capacitor) using PSpice, with a
sinusoidal input signal of amplitude 21V and frequency 60Hz. Obtain a printout of
the load voltage waveform. What is the value of Vp?
3. Simulate the full-wave rectifier with the filter capacitor designed in step 1 included.
Obtain a plot of the load voltage waveform (using the 60Hz, 21V amplitude
sinusoidal input). What is the range of variation of the load voltage? How does this
compare with your design requirements?
4. Use PSpice to simulate the dc restorer circuit of Fig. 4-3. Use a sinusoidal input
signal (of amplitude 8V) and obtain plots of the output voltage vo and the capacitor
voltage. Between what voltage levels does the output signal vary?
5. The voltage doubler circuit of fig. 4-4 accepts a sinusoidal input signal of amplitude
Vp and produces a DC output voltage approximately equal to –2Vp. Use PSpice to
simulate the voltage doubler circuit. Use a sinusoidal input of amplitude 8V and
frequency 60Hz. Obtain plots of the output voltage waveform and any other
intermediate signals you are curious about. Does the circuit perform as expected?
What is the final value of the output voltage?
IN LAB
Full-wave rectifier
Observe the output voltage waveform of the transformer provided on the oscilloscope.
What is the amplitude Vm of the output signal? Construct the full-wave rectifier and
connect a 1 kΩ load to it. Use the transformer to power the rectifier. Obtain a plot of the
resulting load voltage waveform. What is the peak value Vp of the load voltage? Note:
Before powering up the circuit, consider how much power the 1 kΩ resistor has to
dissipate.
Full-wave rectifier with filter capacitor
Connect the filter capacitor designed in your prelab across the load resistor. Obtain a plot
of the resulting load voltage. What is the range of variation of the load voltage? How
does this compare with the design specification (variation between Vp and 0.9Vp)?
DC restorer
Construct the dc restorer circuit. Test the circuit with an 8V amplitude (16V p-p)
sinusoid. Obtain a plot of the oscilloscope screen with the input and output signals.
Between what voltages does the output signal vary? How do your results compare with
the PSpice simulation? Also test the restorer circuit with a square wave input and
document your results.
Voltage doubler
Construct the voltage doubler circuit. Test the circuit with a 60Hz, 8V amplitude (16V pp) sinusoidal input. Obtain a plot of the oscilloscope screen with the input and output
signals. Does the circuit perform as expected? What is the output voltage produced by
the circuit?